CN205545203U - A clock circuit for intelligent relay protection tester - Google Patents
A clock circuit for intelligent relay protection tester Download PDFInfo
- Publication number
- CN205545203U CN205545203U CN201620217076.4U CN201620217076U CN205545203U CN 205545203 U CN205545203 U CN 205545203U CN 201620217076 U CN201620217076 U CN 201620217076U CN 205545203 U CN205545203 U CN 205545203U
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- resistance
- crystal oscillator
- circuit
- amplifier
- outfan
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- 239000013078 crystal Substances 0.000 claims abstract description 45
- 238000010586 diagram Methods 0.000 description 3
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
Abstract
The utility model discloses a clock circuit for intelligent relay protection tester, include crystal oscillator circuit and the phase -locked loop circuit of being connected with the crystal oscillator circuit output, crystal oscillator circuit include first inductance L1, crystal oscillator X, first resistance R1 and first electric capacity C1, crystal oscillator X's power input end is connected to working power supply through first inductance L1, and crystal oscillator X's NC holds earthing terminal ground connection unsettled, crystal oscillator X, and crystal oscillator X's output is connected with the phase -locked loop through first resistance R1, still be provided with the grounded capacitance between crystal oscillator X's output and the first resistance R1. The utility model provides a clock circuit for intelligent relay protection tester adopts active crystal oscillator, does not need the inside oscillator of CPU, and the signal is of high quality, and the connected mode is simple, and has included the phase -locked loop circuit in the clock circuit, and the signal is stable.
Description
Technical field
This utility model relates to a kind of clock circuit for intelligence relay-protection tester.
Background technology
Owing to the information feedback amount of tradition transformer station is little; fault message is difficult to Macro or mass analysis; wiring complexity is loaded down with trivial details; and have the problems such as security risk for on-the-spot test operations staff; and in these years the developing rapidly of information, communication and network technology; people have begun to attempt researching and developing corresponding product and match, the therefore generation of intelligence relay-protection tester.
And clock circuit has vital impact for normally working of intelligence relay-protection tester, but in the most intelligent relay-protection tester, the passive crystal oscillator of employing produces clock mostly, needs CPU internal oscillator, and jitter.
Utility model content
The purpose of this utility model is to overcome the deficiencies in the prior art, it is provided that a kind of clock circuit for intelligence relay-protection tester, uses active crystal oscillator; need not CPU internal oscillator, signal quality is good, and connected mode is simple; and clock circuit includes phase-locked loop circuit, signal stabilization.
The purpose of this utility model is achieved through the following technical solutions: a kind of clock circuit for intelligence relay-protection tester, including crystal oscillating circuit and the phase-locked loop circuit that is connected with crystal oscillating circuit outfan；Described crystal oscillating circuit includes the first inductance L1, crystal oscillator X, the first resistance R1 and the first electric capacity C1；The power input of crystal oscillator X is connected to working power by the first inductance L1, and the NC end of crystal oscillator X is unsettled, the earth terminal ground connection of crystal oscillator X, and the outfan of crystal oscillator X is connected with phaselocked loop by the first resistance R1；It is additionally provided with ground capacity between outfan and the first resistance R1 of crystal oscillator X.
Described phase-locked loop circuit includes phase frequency detector, electric charge pump, loop filter and voltage controlled oscillator；The first input end of phase frequency detector is connected with crystal oscillating circuit；The outfan of phase frequency detector passes sequentially through electric charge pump, loop filter and voltage controlled oscillator and carries out signal output；The outfan of described voltage controlled oscillator is also connected with the feedback signal input terminal of phase frequency detector.
Described loop filter includes amplifier A1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the second electric capacity C2, the 3rd electric capacity C3 and the 4th electric capacity C4；The reverse input end of amplifier A1 is connected with the signal input part of loop filter；The positive input of amplifier A1 is connected to working power by the 4th resistance R4, and one end of the 5th resistance R5 is connected between the 4th resistance R4 and the positive input of amplifier A1, the other end ground connection of the 5th resistance R5；One end of second resistance R2 is connected with the reverse input end of amplifier A1；The other end of the second resistance R2 is connected to the outfan of amplifier A1 by the 3rd electric capacity C3；Circuit and the second electric capacity C2 of the second resistance R2 and the 3rd electric capacity C3 composition are in parallel；And second the two ends of electric capacity C2 be connected with amplifier A1 reverse input end and outfan respectively；The outfan of amplifier A1 is connected to the signal output part of loop filter by the 3rd resistance R3；It is additionally provided with ground capacity C4 between 3rd resistance R3 and the signal output part of loop filter.
Described phase frequency detector uses ultrahigh speed phase frequency detector AD9901.
The beneficial effects of the utility model are: use active crystal oscillator, it is not necessary to CPU internal oscillator, and signal quality is good, and connected mode is simple, and includes phase-locked loop circuit, signal stabilization in clock circuit.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of crystal oscillating circuit；
Fig. 2 is the theory diagram of phase-locked loop circuit；
Fig. 3 is the schematic diagram of loop filter.
Detailed description of the invention
The technical solution of the utility model is described in further detail below in conjunction with the accompanying drawings, but protection domain of the present utility model is not limited to the following stated.
As it is shown in figure 1, a kind of clock circuit for intelligence relay-protection tester, including crystal oscillating circuit and the phase-locked loop circuit that is connected with crystal oscillating circuit outfan；Described crystal oscillating circuit includes the first inductance L1, crystal oscillator X, the first resistance R1 and the first electric capacity C1；The power input VCC of crystal oscillator X is connected to the working power of 3.3V by the first inductance L1, and the NC end of crystal oscillator X is unsettled, the earth terminal GND ground connection of crystal oscillator X, and the outfan OUT of crystal oscillator X is connected with phaselocked loop by the first resistance R1；It is additionally provided with ground capacity between outfan and the first resistance R1 of crystal oscillator X.
As in figure 2 it is shown, described phase-locked loop circuit includes phase frequency detector, electric charge pump, loop filter and voltage controlled oscillator；The first input end of phase frequency detector is connected with crystal oscillating circuit；The outfan of phase frequency detector passes sequentially through electric charge pump, loop filter and voltage controlled oscillator and carries out signal output；The outfan of described voltage controlled oscillator is also connected with the feedback signal input terminal of phase frequency detector.
As it is shown on figure 3, described loop filter includes amplifier A1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the second electric capacity C2, the 3rd electric capacity C3 and the 4th electric capacity C4；The reverse input end of amplifier A1 is connected with the signal input part of loop filter；The positive input of amplifier A1 is connected to working power by the 4th resistance R4, and one end of the 5th resistance R5 is connected between the 4th resistance R4 and the positive input of amplifier A1, the other end ground connection of the 5th resistance R5；One end of second resistance R2 is connected with the reverse input end of amplifier A1；The other end of the second resistance R2 is connected to the outfan of amplifier A1 by the 3rd electric capacity C3；Circuit and the second electric capacity C2 of the second resistance R2 and the 3rd electric capacity C3 composition are in parallel；And second the two ends of electric capacity C2 be connected with amplifier A1 reverse input end and outfan respectively；The outfan of amplifier A1 is connected to the signal output part of loop filter by the 3rd resistance R3；It is additionally provided with ground capacity C4 between 3rd resistance R3 and the signal output part of loop filter.
Described phase frequency detector uses ultrahigh speed phase frequency detector AD9901.
Further, 4th resistance R4 and the 5th resistance R5 resistance are equal, loop filter is identical with the working power voltage of electric charge pump, this just can enable operational amplifier the output of electric charge pump is forced with charge pump power supply voltage general near, thus the current mismatch of electric charge pump reduction.
In the course of the work, using active crystal oscillator, it is not necessary to CPU internal oscillator, signal quality is good, and connected mode is simple, carries out power filter by the first inductance LI and the first electric capacity C1, and outfan uses the first resistance R1 trap signal.
In view of the stability of clock, clock circuit adds phase-locked loop circuit, improve the stability of clock signal.
Charge pump type phaselocked loop is used at phaselocked loop, in phaselocked loop, phase frequency detector uses ultrahigh speed phase frequency detector AD9901, one key property of AD9901 is can to input with medium standard frequency frequency ratio relatively phase/frequency, and without pre-divider, save the cost of phase-locked loop circuit, by its complexity low；In loop filter, the filter network that the second electric capacity C2, the 3rd electric capacity C3 and the second resistance R2 form is arranged on the feedback circuit of amplifier A1, it is achieved low-pass filtering function；Meanwhile, the filter network being made up of the 3rd resistance R3 and the 4th electric capacity is filtered further.
Claims (4)
1. the clock circuit for intelligence relay-protection tester, it is characterised in that: include crystal oscillating circuit and the phase-locked loop circuit being connected with crystal oscillating circuit outfan；Described crystal oscillating circuit includes the first inductance L1, crystal oscillator X, the first resistance R1 and the first electric capacity C1；The power input of crystal oscillator X is connected to working power by the first inductance L1, and the NC end of crystal oscillator X is unsettled, the earth terminal ground connection of crystal oscillator X, and the outfan of crystal oscillator X is connected with phaselocked loop by the first resistance R1；It is additionally provided with ground capacity between outfan and the first resistance R1 of crystal oscillator X.
A kind of clock circuit for intelligence relay-protection tester the most according to claim 1, it is characterised in that: described phase-locked loop circuit includes phase frequency detector, electric charge pump, loop filter and voltage controlled oscillator；The first input end of phase frequency detector is connected with crystal oscillating circuit；The outfan of phase frequency detector passes sequentially through electric charge pump, loop filter and voltage controlled oscillator and carries out signal output；The outfan of described voltage controlled oscillator is also connected with the feedback signal input terminal of phase frequency detector.
A kind of clock circuit for intelligence relay-protection tester the most according to claim 2, it is characterised in that: described loop filter includes amplifier A1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the second electric capacity C2, the 3rd electric capacity C3 and the 4th electric capacity C4；The reverse input end of amplifier A1 is connected with the signal input part of loop filter；The positive input of amplifier A1 is connected to working power by the 4th resistance R4, and one end of the 5th resistance R5 is connected between the 4th resistance R4 and the positive input of amplifier A1, the other end ground connection of the 5th resistance R5；One end of second resistance R2 is connected with the reverse input end of amplifier A1；The other end of the second resistance R2 is connected to the outfan of amplifier A1 by the 3rd electric capacity C3；Circuit and the second electric capacity C2 of the second resistance R2 and the 3rd electric capacity C3 composition are in parallel；And second the two ends of electric capacity C2 be connected with amplifier A1 reverse input end and outfan respectively；The outfan of amplifier A1 is connected to the signal output part of loop filter by the 3rd resistance R3；It is additionally provided with ground capacity C4 between 3rd resistance R3 and the signal output part of loop filter.
A kind of clock circuit for intelligence relay-protection tester the most according to claim 2, it is characterised in that: described phase frequency detector uses ultrahigh speed phase frequency detector AD9901.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620217076.4U CN205545203U (en) | 2016-03-21 | 2016-03-21 | A clock circuit for intelligent relay protection tester |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620217076.4U CN205545203U (en) | 2016-03-21 | 2016-03-21 | A clock circuit for intelligent relay protection tester |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205545203U true CN205545203U (en) | 2016-08-31 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620217076.4U Expired - Fee Related CN205545203U (en) | 2016-03-21 | 2016-03-21 | A clock circuit for intelligent relay protection tester |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205545203U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105827239A (en) * | 2016-03-21 | 2016-08-03 | 成都天进仪器有限公司 | Clock circuit for intelligent relay protection tester |
-
2016
- 2016-03-21 CN CN201620217076.4U patent/CN205545203U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105827239A (en) * | 2016-03-21 | 2016-08-03 | 成都天进仪器有限公司 | Clock circuit for intelligent relay protection tester |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160831 |