CN205883173U - High -speed amplifier circuit - Google Patents
High -speed amplifier circuit Download PDFInfo
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- CN205883173U CN205883173U CN201620769292.XU CN201620769292U CN205883173U CN 205883173 U CN205883173 U CN 205883173U CN 201620769292 U CN201620769292 U CN 201620769292U CN 205883173 U CN205883173 U CN 205883173U
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- field effect
- effect transistor
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- high speed
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Abstract
The utility model discloses a high -speed amplifier circuit, including the biasing sub circuit, with the first order that the biasing sub circuit links to each other enlarge the sub circuit and with the secondary amplification sub circuit that the sub circuit links to each other is enlargied to the first order, sub - circuit control offsets field effect transistor work among the high -speed amplifier circuit is at saturation region, the biasing sub circuit including the feedback module that is used for guaranteeing loop job stabilization nature and with feedback module links to each other is used for producing the direct current voltage generation module of DC voltage, the first order is amplified the sub circuit and is received the differential signal of input and amplify the back conveying extremely the secondary amplification sub circuit, the secondary amplification sub circuit enlargies back output to the received signal. The utility model discloses reduce the parasitic capacitance of high -speed signal route node, improved high -speed amplifier circuit's bandwidth.
Description
Technical field
This utility model relates to integrated circuit fields, particularly relates to a kind of high speed for low supply voltage and amplifies electricity
Road.
Background technology
High speed amplifying circuit is circuit module indispensable in communication and High Speed Analog converting system, is amplifying at a high speed electricity
Lu Zhong, the characteristic frequency of the device in circuit limits the bandwidth upper limit of circuit, and the parasitic electricity at high speed signal path node
Appearance can affect the bandwidth of circuit, therefore, how to reduce the parasitic electricity at high speed signal path node by optimization circuit structure
Hold, become the key point of high speed Design of Amplification Circuit.
In existing high speed amplifying circuit, in order to ensure the normal work of DC bias circuit, often put in the first order
Big circuit uses the connection that field effect transistor carries out diode, but, field effect transistor posting at the node of diode-connected
Raw electric capacity is relatively big, now, increases electric current increase the mutual conductance of field effect transistor if used, thus reduce the impact of parasitic capacitance
Method, can cause the increase of over-drive voltage, therefore cannot be used under the voltage of low power supply.
Utility model content
The purpose of this utility model is to overcome the deficiencies in the prior art, it is provided that a kind of high speed for low supply voltage is put
Big circuit, uses the mode of biasing circuit and signal path independence, reduces the parasitic capacitance at high speed signal path node, uses
Resistance is as load so that the bandwidth of high speed amplifying circuit approaches technological limits, uses automatic biasing mode so that whole electricity simultaneously
The electric current on road is produced by electric current self, and without extra bias current generating circuit.
The purpose of this utility model is achieved through the following technical solutions: a kind of high speed amplifying circuit, including biasing
Electronic circuit, the first order being connected with described bias subcircuits are amplified electronic circuit and amplify what electronic circuit was connected with the described first order
Electronic circuit is amplified in the second level, and the field effect transistor that described bias subcircuits controls in described high speed amplifying circuit is operated in saturation region
Territory, described bias subcircuits includes the feedback module for ensureing loop work stability and the use being connected with described feedback module
In the DC voltage generation module of generation DC voltage, the described first order is amplified electronic circuit and is received the differential signal of input and carry out
It is sent to the described second level after amplification and amplifies electronic circuit, after the signal received is amplified by described second level amplification electronic circuit
Output.
Described feedback module includes amplifier and the electric capacity being connected with described amplifier, described DC voltage generation module bag
Include the first field effect transistor, the second field effect transistor being connected with described first field effect transistor, be connected with described second field effect transistor
First resistance, the 3rd field effect transistor being connected with described second field effect transistor and described first resistance and with described first field effect
The second resistance that pipe and described 3rd field effect transistor are connected.
The described first order is amplified electronic circuit and is included the 4th field effect transistor, the 5th effect being connected with described 4th field effect transistor
Ying Guan, the 3rd resistance being connected with described 5th field effect transistor, the 6th field effect transistor, be connected with described 6th field effect transistor
Seven field effect transistor and the 4th resistance being connected with described 7th field effect transistor；The described second level is amplified electronic circuit and is included the 5th electricity
Resistance, the 6th resistance, the 8th field effect transistor being connected with described 5th resistance and the 9th field effect being connected with described 6th resistance
Pipe.
One end of the input of the amplifier in described feedback module and described second resistance and described 3rd field effect transistor
Drain electrode be connected, the outfan of described amplifier be jointly connected with one end of described electric capacity described first field effect transistor grid,
The grid of described 4th field effect transistor and the grid of described 6th field effect transistor, the other end ground connection of described electric capacity.
The drain electrode of described first field effect transistor is connected with the source class of described second field effect transistor, described second field effect transistor
Grid connects common-mode voltage input, the drain electrode of described second field effect transistor and one end of described first resistance and described 3rd
The grid of effect pipe is connected.
Drain electrode and the source class of described 5th field effect transistor, the drain electrode of described 6th field effect transistor of described 4th field effect transistor
And the source class of described 7th field effect transistor is connected, the drain electrode of described 5th field effect transistor and one end of described 3rd resistance and described
The grid of the 8th field effect transistor is connected, the drain electrode of described 7th field effect transistor and one end of described 4th resistance and described 9th
The grid of effect pipe is connected, and the grid of described 5th field effect transistor and the grid of described 6th field effect transistor connect difference letter respectively
Number input.
One end of described 5th resistance is connected with drain electrode and the outfan of described 8th field effect transistor, described 6th resistance
One end is connected with drain electrode and another outfan of described 9th field effect transistor.
The source class of described first field effect transistor, the other end of described second resistance, the source class of described 4th field effect transistor, institute
The other end stating the source class of the 6th field effect transistor, the other end of described 5th resistance and described 6th resistance connects power supply jointly
End, the other end of described first resistance, the source class of described 3rd field effect transistor, the other end of described 3rd resistance, the described 4th
The source class of the other end of resistance, the source class of described 8th field effect transistor and described 9th field effect transistor connects earth terminal jointly.
Described first field effect transistor, described second field effect transistor, described 4th field effect transistor, described 5th field effect transistor,
Described 6th field effect transistor and described 7th field effect transistor are p-type field effect transistor, described 3rd field effect transistor, described 8th effect
Should manage and described 9th field effect transistor is N-type field effect transistor.
The beneficial effects of the utility model are: use the mode of biasing circuit and signal path independence, reduce letter at a high speed
Parasitic capacitance at number path node, uses resistance as load so that the bandwidth of high speed amplifying circuit approaches technological limits, with
Shi Caiyong automatic biasing mode so that the electric current of whole circuit is produced by electric current self, and produce without extra bias current
Circuit.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of this utility model high speed amplifying circuit；
Fig. 2 is the particular circuit configurations figure of this utility model high speed amplifying circuit.
Detailed description of the invention
The technical solution of the utility model is described in further detail below in conjunction with the accompanying drawings, but protection domain of the present utility model
It is not limited to the following stated.
As it is shown in figure 1, this utility model high speed amplifying circuit include bias subcircuits, be connected with bias subcircuits first
Level is amplified electronic circuit and amplifies the second level amplification electronic circuit that electronic circuit is connected with the first order, and wherein, bias subcircuits includes
For the feedback module ensureing loop work stability and the DC voltage for producing DC voltage being connected with feedback module
Generation module, bias subcircuits is operated in zone of saturation for the field effect transistor controlled in high speed amplifying circuit, and the first order is amplified
Electronic circuit is sent to the second level after being used for receiving the differential signal of input and being amplified and amplifies electronic circuit, and son electricity is amplified in the second level
Road exports after being amplified the signal received.
Please refer to the particular circuit configurations figure that Fig. 2, Fig. 2 are this utility model high speed amplifying circuit.New in this practicality
In type, feedback module includes amplifier A1 and the electric capacity C1 being connected with amplifier A1, and DC voltage generation module includes first
Effect pipe M1, the second field effect transistor M2 being connected with the first field effect transistor M1, the first resistance of being connected with the second field effect transistor M2
R1, the 3rd field effect transistor M3 being connected with the second field effect transistor M2 and the first resistance R1 and with the first field effect transistor M1 and the 3rd
The second resistance R2 that effect pipe M3 is connected；The first order is amplified electronic circuit and is included the 4th field effect transistor M4 and the 4th field effect transistor M4
The 5th field effect transistor M5 being connected, the 3rd resistance R3, the 6th field effect transistor M6 and the 6th that are connected with the 5th field effect transistor M5
The 7th field effect transistor M7 that effect pipe M6 is connected and the 4th resistance R4 that is connected with the 7th field effect transistor M7；Son electricity is amplified in the second level
Road include the 5th resistance R5, the 6th resistance R6, the 8th field effect transistor M8 being connected with the 5th resistance R5 and with the 6th resistance R6 phase
The 9th field effect transistor M9 even.
The physical circuit annexation of this utility model high speed amplifying circuit is as follows: the amplifier A1's in feedback module is defeated
Enter end to be connected with one end of the second resistance R2 and the drain electrode of the 3rd field effect transistor M3, the outfan of amplifier A1 and the one of electric capacity C1
The common grid of the first field effect transistor M1, the grid of the 4th field effect transistor M4 and the grid of the 6th field effect transistor M6 of connecting of end, electricity
Hold the other end ground connection of C1.The drain electrode of the first field effect transistor M1 is connected with the source class of the second field effect transistor M2, the second field effect transistor
The grid of M2 connects common-mode voltage input Vcom, the drain electrode of the second field effect transistor M2 and one end of the first resistance R1 and the 3rd
The grid of effect pipe M3 is connected.Drain electrode and the source class of the 5th field effect transistor M5, the 6th field effect transistor M6 of the 4th field effect transistor M4
Drain electrode and the source class of the 7th field effect transistor M7 be connected, drain electrode and one end and the 8th of the 3rd resistance R3 of the 5th field effect transistor M5
The grid of field effect transistor M8 is connected, the drain electrode of the 7th field effect transistor M7 and one end of the 4th resistance R4 and the 9th field effect transistor M9
Grid is connected, and the grid of the 5th field effect transistor M5 and the grid of the 6th field effect transistor M6 connect two differential signal input respectively
Vip、Vin.One end of 5th resistance R5 is connected with drain electrode and the output end vo p of the 8th field effect transistor M8, the one of the 6th resistance R6
End is connected with drain electrode and another output end vo n of the 9th field effect transistor M9.The source class of the first field effect transistor M1, the second resistance R2
The other end, the source class of the 4th field effect transistor M4, the source class of the 6th field effect transistor M6, the other end of the 5th resistance R5 and the 6th resistance
The other end of R6 connects power end VDD, the other end of the first resistance R1, the source class of the 3rd field effect transistor M3, the 3rd resistance jointly
The source class of the other end of R3, the other end of the 4th resistance R4, the source class of the 8th field effect transistor M8 and the 9th field effect transistor M9 is common
Even earth terminal VSS.
Wherein, in the present embodiment, the first field effect transistor M1, the second field effect transistor M2, the 4th field effect transistor M4, the 5th
Effect pipe M5, the 6th field effect transistor M6 and the 7th field effect transistor M7 are p-type field effect transistor, the 3rd field effect transistor M3, the 8th effect
Should pipe M8 and the 9th field effect transistor M9 be N-type field effect transistor, in other embodiments, above-mentioned field effect transistor can be other structures
The components and parts of identical function can be realized, however it is not limited to this.
The operation principle of this utility model high speed amplifying circuit is as follows:
Differential signal input Vip, Vin input signal respectively amplifies the 5th field effect transistor M5 in electronic circuit to the first order
And the 6th field effect transistor M6, bias subcircuits produces the electric current needed for whole high speed amplifying circuit, and makes each bars road
The current in proportion relation flow through on footpath, it is ensured that the field effect transistor in high speed amplifying circuit all works in normal zone of saturation.
Input signal is amplified electronic circuit through the first order and is amplified after electronic circuit is amplified by output end vo p, Von output with the second level.
By using the 3rd resistance R3 and the 4th resistance R4 as the load of high speed amplifying circuit, reduce parasitic capacitance, and improve
The bandwidth of high speed amplifying circuit.
This utility model high speed amplifying circuit have employed the mode of bias subcircuits and signal path independence, reduces at a high speed
Parasitic capacitance at signal path node, and use resistance as load so that the bandwidth of high speed amplifying circuit approaches technique pole
Limit, uses automatic biasing mode so that the electric current of whole circuit is produced by electric current self simultaneously, and without extra bias current
Produce circuit.
In sum, this utility model high speed amplifying circuit reduces parasitic capacitance, improves bandwidth, and owing to have employed
Automatic biasing mode, but required electric current all self produces, it is not necessary to extra bias current generating circuit.
Claims (9)
1. a high speed amplifying circuit, it is characterised in that: described high speed amplifying circuit includes bias subcircuits and described biasing
The first order that circuit is connected is amplified electronic circuit and amplifies the second level amplification electronic circuit that electronic circuit is connected, institute with the described first order
The field effect transistor stated in the bias subcircuits described high speed amplifying circuit of control is operated in zone of saturation, and described bias subcircuits includes
For the feedback module ensureing loop work stability and the direct current for producing DC voltage being connected with described feedback module
Voltage generating module, described first order amplification electronic circuit is sent to described second after receiving the differential signal inputted and being amplified
Level amplifies electronic circuit, and output after the signal received is amplified by electronic circuit is amplified in the described second level.
High speed amplifying circuit the most according to claim 1, it is characterised in that: described feedback module include amplifier and with institute
Stating the electric capacity that amplifier is connected, described DC voltage generation module includes the first field effect transistor and described first field effect transistor phase
The second field effect transistor, the first resistance being connected with described second field effect transistor and described second field effect transistor even and described the
The 3rd field effect transistor that one resistance is connected and the second resistance of being connected with described first field effect transistor and described 3rd field effect transistor.
High speed amplifying circuit the most according to claim 2, it is characterised in that: the described first order is amplified electronic circuit and is included the 4th
Field effect transistor, the 5th field effect transistor being connected with described 4th field effect transistor, be connected with described 5th field effect transistor the 3rd electricity
Resistance, the 6th field effect transistor, the 7th field effect transistor being connected with described 6th field effect transistor and be connected with described 7th field effect transistor
The 4th resistance；The described second level amplify electronic circuit include the 5th resistance, the 6th resistance, be connected with described 5th resistance the 8th
Field effect transistor and the 9th field effect transistor being connected with described 6th resistance.
High speed amplifying circuit the most according to claim 3, it is characterised in that: the input of the amplifier in described feedback module
End is connected with the drain electrode of one end of described second resistance and described 3rd field effect transistor, the outfan of described amplifier and described electricity
The one end held connects the grid of described first field effect transistor, the grid of described 4th field effect transistor and described 6th field effect jointly
The grid of pipe, the other end ground connection of described electric capacity.
High speed amplifying circuit the most according to claim 4, it is characterised in that: the drain electrode of described first field effect transistor is with described
The source class of the second field effect transistor is connected, and the grid of described second field effect transistor connects common-mode voltage input, described second effect
Should the drain electrode of pipe be connected with the grid of one end of described first resistance and described 3rd field effect transistor.
High speed amplifying circuit the most according to claim 5, it is characterised in that: the drain electrode of described 4th field effect transistor is with described
The source class of the source class of the 5th field effect transistor, the drain electrode of described 6th field effect transistor and described 7th field effect transistor is connected, and described the
The drain electrode of five field effect transistor is connected with one end of described 3rd resistance and the grid of described 8th field effect transistor, described 7th effect
Should the drain electrode of pipe be connected with one end of described 4th resistance and the grid of described 9th field effect transistor, described 5th field effect transistor
The grid of grid and described 6th field effect transistor connects differential signal input respectively.
High speed amplifying circuit the most according to claim 6, it is characterised in that: one end and the described 8th of described 5th resistance
The drain electrode of field effect transistor and outfan are connected, one end of described 6th resistance and the drain electrode of described 9th field effect transistor and another is defeated
Go out end to be connected.
High speed amplifying circuit the most according to claim 7, it is characterised in that: the source class of described first field effect transistor, described
The other end of the second resistance, the source class of described 4th field effect transistor, the source class of described 6th field effect transistor, described 5th resistance
The other end of the other end and described 6th resistance connects power end jointly, the other end of described first resistance, described 3rd effect
Should the source class of pipe, the other end of described 3rd resistance, the other end of described 4th resistance, the source class of described 8th field effect transistor and
The source class of described 9th field effect transistor connects earth terminal jointly.
High speed amplifying circuit the most according to claim 3, it is characterised in that: described first field effect transistor, described second
Effect pipe, described 4th field effect transistor, described 5th field effect transistor, described 6th field effect transistor and described 7th field effect transistor are
P-type field effect transistor, described 3rd field effect transistor, described 8th field effect transistor and described 9th field effect transistor are N-type field effect transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620769292.XU CN205883173U (en) | 2016-07-21 | 2016-07-21 | High -speed amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620769292.XU CN205883173U (en) | 2016-07-21 | 2016-07-21 | High -speed amplifier circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205883173U true CN205883173U (en) | 2017-01-11 |
Family
ID=57697800
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620769292.XU Active CN205883173U (en) | 2016-07-21 | 2016-07-21 | High -speed amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205883173U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107645280A (en) * | 2016-07-21 | 2018-01-30 | 成都锐成芯微科技股份有限公司 | High speed amplifying circuit |
| CN108259007A (en) * | 2017-12-29 | 2018-07-06 | 思瑞浦微电子科技（苏州）股份有限公司 | Enhancing circuit applied to amplifier conversion rate |
-
2016
- 2016-07-21 CN CN201620769292.XU patent/CN205883173U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107645280A (en) * | 2016-07-21 | 2018-01-30 | 成都锐成芯微科技股份有限公司 | High speed amplifying circuit |
| CN108259007A (en) * | 2017-12-29 | 2018-07-06 | 思瑞浦微电子科技（苏州）股份有限公司 | Enhancing circuit applied to amplifier conversion rate |
| CN108259007B (en) * | 2017-12-29 | 2021-06-04 | 思瑞浦微电子科技（苏州）股份有限公司 | Enhancement circuit applied to operational amplifier conversion rate |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 610041 Sichuan City, Chengdu province high tech Zone, Tianfu street, No. 200, building A, building 1, area, building 4 Patentee after: Chengdu Rui core micro Polytron Technologies Inc Address before: 610041 Sichuan City, Chengdu province high tech Zone, Tianfu street, No. 200, building A, building 1, area, building 4 Patentee before: Chengdu Ruicheng Xinwei Technology Co., Ltd. |
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| CP01 | Change in the name or title of a patent holder |