CN203840288U - Continuous time common mode feedback circuit for two-stage differential amplifier - Google Patents
Continuous time common mode feedback circuit for two-stage differential amplifier Download PDFInfo
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- CN203840288U CN203840288U CN201420225630.4U CN201420225630U CN203840288U CN 203840288 U CN203840288 U CN 203840288U CN 201420225630 U CN201420225630 U CN 201420225630U CN 203840288 U CN203840288 U CN 203840288U
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Abstract
The utility model discloses a continuous time common mode feedback circuit for a two-stage differential amplifier. The continuous time common mode feedback circuit for the two-stage differential amplifier comprises the two-stage differential amplifier, a common mode voltage detecting unit and a common mode feedback control signal generating unit, wherein the common mode voltage detecting unit is used for detecting output common mode voltage of the two-stage differential amplifier, and the common mode feedback control signal generating unit is used for controlling the first stage of current source load of the two-stage differential amplifier to be stabilized at a preset direct current work point. Two output ends of the two-stage differential amplifier are connected with the common mode voltage detecting unit, the output end of the common mode voltage detecting unit is connected with the common mode feedback control signal generating unit, and two output ends of the common mode feedback control signal generating unit are connected with the first stage of current source load of the two-stage differential amplifier. The continuous time common mode feedback circuit can be used for preventing the locking state of the two-stage differential amplifier when input common mode signals have large transient values under the closed loop application of the two-stage differential amplifier.
Description
Technical field
The utility model relates to field of analog integrated circuit, particularly a kind of continuous time common-mode feedback for involves two stage differential amplifiers.
Background technology
Along with involves two stage differential amplifiers has, output voltage swing is large, common mode noise rejection good, and can effectively suppress the advantages such as even item harmonic distortion, has obtained using widely.Common mode feedback circuit is an indispensable Key Circuit in Differential OPAMP, its objective is the DC level for inner each node of stable difference amplifier, guarantee that transistor is all operated in saturation condition, and accurately control the output common mode level of differential amplifier, make the output voltage swing of amplifier reach optimum.Common mode feedback circuit also helps the common mode fluctuation of rejective amplifier, improves its common-mode rejection ratio.
Fig. 1 is for adopting involves two stage differential amplifiers 100 schematic diagrames of existing common mode feedback circuit, and document 1 sees reference.As shown in Figure 1, this adopts the involves two stage differential amplifiers 100 of existing common mode feedback circuit by common mode testing circuit 101 (being equivalent to common-mode voltage detecting unit 201 of the present utility model), common-mode feedback control signal produces circuit 102 (being equivalent to common-mode feedback control signal generation unit 202 of the present utility model) and involves two stage differential amplifiers forms, the output common mode level that this involves two stage differential amplifiers detected by common mode testing circuit 101 (is designated as Vocm1, Vocm1=(Von1+Vop1)/2), this output common mode voltage (Vocm1) amplifies through common-mode feedback control signal generation circuit 102 with the difference of the desired output common-mode voltage (being designated as Vcm1) of this involves two stage differential amplifiers, the circuit 102 of common-mode feedback control signal generation is herein a voltage amplifier, what input is voltage, the signal of output is also voltage signal, this common-mode feedback control signal produces circuit 102 and the voltage of output is connected to the metal-oxide-semiconductor M105 of involves two stage differential amplifiers, the grid of M106, by regulating metal-oxide-semiconductor M105, the grid voltage of M106 is stablized M105, the DC point of M106, and then stable metal-oxide-semiconductor M107, the DC point of M108, finally make this output common mode voltage (Vocm1) equate with the desired output common-mode voltage (Vcm1) of this involves two stage differential amplifiers.
The involves two stage differential amplifiers 100 of the existing common mode feedback circuit of employing shown in Fig. 1 is applied in the closed loop typical application circuit 300 of involves two stage differential amplifiers as shown in Figure 3.For differential signal, the loop of this application circuit 300 comprises three inverter stages: the inverter stages that first order amplifier forms, the inverter stages that second level amplifier forms, amplifier outputs to the inverter stages (output end vo+be connected with input Vin-of input, output end vo-be connected with input Vin+), three inverter stages form negative feedback, as long as circuit is carried out to suitable frequency compensation, just can be operated in stable state.For common-mode signal, the loop of this application circuit 300 comprises two loops: internal loop and external loop-around, and wherein internal loop is a feedback loop, and external loop-around is a regenerative feedback loop (document 2 sees reference); During normal work, because the open-loop gain of internal common mode feedback control loop is very high, make the open-loop gain of outside regenerative feedback loop be far smaller than 1, whole circuit can steady operation.And in actual applications, as shown in Figure 1, when there is very large instantaneous value in the input common-mode signal of involves two stage differential amplifiers, the M101 of involves two stage differential amplifiers, M102 manages shutoff, flow through M105, the electric current of M106 pipe is 0, M105, M106 pipe is operated in dark linear zone (supposing that described common-mode voltage testing circuit 101 does not also produce circuit 102 to described common-mode feedback control signal and transmits the output common mode voltage detecting), M105, the drain terminal voltage of M106 pipe is pulled to close to ground (0V), cause M107, M108 manages shutoff, thereby make the output common mode voltage of involves two stage differential amplifiers approach supply voltage VDD, so, M111 pipe is turned off, the grid voltage of M113 pipe is dragged down, and then make M105, M106 pipe is turned off, cause internal common mode feedback loop to disconnect, make the open-loop gain of outside regenerative feedback loop be greater than 1, meet positive feedback condition, even if now common-mode signal returns to normally, because external loop-around has formed positive feedback, the output end voltage of involves two stage differential amplifiers will continue to keep approaching the state of supply voltage, present " locked " state, amplifier cannot normally be worked.
List of references 1:Jhin-Fang Huang, Yen-Jung Lin, Kun-Chieh Huang, Ron-Yi Liu.A Continuous-Time Sigma-Delta Modulator with a Hybrid Loop Filter and Capacitive Feedforward[J] .Microelectronics and Solid State Electronics, 2012,1 (4): 74-80
List of references 2: Chi Baoyong. analog integrated circuit and system [M]. publishing house of Tsing-Hua University, Beijing, 2009, the 8 chapters, pp:362.
Utility model content
The purpose of this utility model is to overcome the deficiency of prior art, a kind of continuous time common-mode feedback for involves two stage differential amplifiers is provided, by the output common mode voltage detecting and desired output common-mode voltage are subtracted each other and obtain difference voltage, be converted to feedback current, and by this feedback current with this constantly together with the bias current of described common-mode feedback control signal generation unit by the first order current source load of involves two stage differential amplifiers described in two output injections of described common-mode feedback control signal generation unit, the first order current source load of controlling described involves two stage differential amplifiers is stabilized in its default DC point, can prevent involves two stage differential amplifiers in closed loop application when the very large instantaneous value of input common-mode signal appearance, there is " locked " state in this involves two stage differential amplifiers.
The utility model solves the technical scheme that its technical problem adopts: a kind of continuous time common-mode feedback for involves two stage differential amplifiers, comprise involves two stage differential amplifiers, common-mode voltage detecting unit for detection of the output common mode voltage of described involves two stage differential amplifiers, be converted to electric current with output common mode voltage for described common-mode voltage detecting unit is detected and the difference voltage of desired output common-mode voltage, and using this electric current as feedback signal, be stabilized in the common-mode feedback control signal generation unit of its default DC point with the first order current source load of involves two stage differential amplifiers described in co-controlling together with self bias current, two outputs of described involves two stage differential amplifiers connect respectively described common-mode voltage detecting unit, the output of described common-mode voltage detecting unit connects described common-mode feedback control signal generation unit, and two outputs of described common-mode feedback control signal generation unit connect respectively the first order current source load of described involves two stage differential amplifiers.
Described common-mode feedback control signal generation unit comprises the first common gate differential pair metal-oxide-semiconductor and bias current sources; Two metal-oxide-semiconductors of described the first common gate differential pair metal-oxide-semiconductor are PMOS pipe, and two source electrodes of described the first common gate differential pair metal-oxide-semiconductor are connected and are connected to the output of described bias current sources and the output of described common-mode voltage detecting unit; Two grids of described the first common gate differential pair metal-oxide-semiconductor all connect a default reference voltage, and this reference voltage equals described desired output common-mode voltage and deducts the gate source voltage of described the first common gate differential pair metal-oxide-semiconductor when its default DC point; Two drain electrodes of described the first common gate differential pair metal-oxide-semiconductor are respectively as two outputs of described common-mode feedback control signal generation unit.
Described bias current sources comprises a PMOS pipe, and DC power supply voltage, the grid that the source electrode of a described PMOS pipe connects described involves two stage differential amplifiers connects the first bias voltage, drains as the output of described bias current sources; The bias current of described common-mode feedback control signal generation unit is the drain electrode output current of a described PMOS pipe.
Described common-mode voltage detecting unit comprises the first resistance and second resistance of similar resistance, two outputs of described involves two stage differential amplifiers connect respectively each one end of described the first resistance and the second resistance, and each other end of described the first resistance and the second resistance is connected and as the output of described common-mode voltage detecting unit.
Described the first resistance and the second resistance are also parallel with the first electric capacity and the second electric capacity separately.
Described involves two stage differential amplifiers also comprises isolated location, between two output of described common-mode feedback control signal generation unit and the first order current source load of described involves two stage differential amplifiers, by described isolated location, be connected, described isolated location comprises the second common gate differential pair metal-oxide-semiconductor; Two source electrodes of described the second common gate differential pair metal-oxide-semiconductor or two drain electrodes connect respectively described common-mode feedback control signal generation unit two outputs, and the first order that connects respectively described involves two stage differential amplifiers amplify input difference to two of pipe outputs, two drain electrodes of described the second common gate differential pair metal-oxide-semiconductor or two source electrodes connect respectively described first order current source load, and as the first order of described involves two stage differential amplifiers, amplify output respectively; Two grids of described the second common gate differential pair metal-oxide-semiconductor all connect the second bias voltage.
The first order current source load of described involves two stage differential amplifiers comprises a differential pair metal-oxide-semiconductor; Two grids of described differential pair metal-oxide-semiconductor all connect the 3rd bias voltage, and two of described differential pair metal-oxide-semiconductor drain electrodes or two source electrodes be respectively as two inputs of described first order current source load, two source electrodes or two grounded drains of described differential pair metal-oxide-semiconductor.
From above-mentioned, to description of the present utility model, compared with prior art, the utlity model has following beneficial effect:
Compare with existing continuous time common-mode feedback, the utlity model has involves two stage differential amplifiers in closed loop application when there is very large instantaneous value in input common-mode signal, prevent the advantage of this involves two stage differential amplifiers appearance " locked " state.
Accompanying drawing explanation
Fig. 1 is for adopting the involves two stage differential amplifiers schematic diagram of existing common mode feedback circuit;
Fig. 2 is the electrical block diagram of the utility model embodiment mono-;
Fig. 3 is the closed loop typical application circuit schematic diagram of involves two stage differential amplifiers;
Fig. 4 is the electrical block diagram of the utility model embodiment bis-.
Embodiment
Embodiment mono-,
As shown in Figure 2, the utility model provides a kind of continuous time common-mode feedback 200 for involves two stage differential amplifiers, comprise involves two stage differential amplifiers, for detection of the common-mode voltage detecting unit 201 of the output common mode voltage (being designated as Vocm2) of described involves two stage differential amplifiers, and for controlling the first order current source load 203 of described involves two stage differential amplifiers, be stabilized in the common-mode feedback control signal generation unit 202 of its default DC point; Two outputs (voltage of two outputs is designated as respectively Von2, Vop2 herein) of described involves two stage differential amplifiers connect respectively described common-mode voltage detecting unit 201, the output A2 of described common-mode voltage detecting unit 201 connects described common-mode feedback control signal generation unit 202, and two outputs B2, C2 of described common-mode feedback control signal generation unit 202 connect respectively the first order current source load 203 of described involves two stage differential amplifiers;
Described common-mode voltage detecting unit 201 detects the output common mode voltage (Vocm2 of described involves two stage differential amplifiers, Vocm2=(Von2+Vop2)/2), and by this output common mode voltage (Vocm2) send described common-mode feedback control signal generation unit 202 to, described common-mode feedback control signal generation unit 202 subtracts each other the output common mode voltage (Vocm2) receiving and desired output common-mode voltage (being designated as Vcm2) to obtain difference voltage, this difference voltage is converted to feedback current, and by together with the bias current of this feedback current and this moment described common-mode feedback control signal generation unit 202 (being the drain electrode output current of a described PMOS pipe M213 of this moment) respectively two by described common-mode feedback control signal generation unit 202 export B2, C2 injects the first order current source load 203 of described involves two stage differential amplifiers, the first order current source load 203 of controlling described involves two stage differential amplifiers is stabilized in its default DC point.
As a kind of preferred, described common-mode feedback control signal generation unit 202 comprises the first common gate differential pair metal-oxide-semiconductor (M211, M212) and bias current sources; Two metal-oxide-semiconductors of described the first common gate differential pair metal-oxide-semiconductor are PMOS pipe, and two source electrodes of described the first common gate differential pair metal-oxide-semiconductor are connected and are connected to the output of described bias current sources and the output A2 of described common-mode voltage detecting unit 201; Two grids of described the first common gate differential pair metal-oxide-semiconductor all connect a default reference voltage Vref, this reference voltage Vref equals described desired output common-mode voltage (Vcm2) and deducts the gate source voltage of described the first common gate differential pair metal-oxide-semiconductor when its default DC point, and two drain electrodes of described the first common gate differential pair metal-oxide-semiconductor are exported B2, C2 as two of described common-mode feedback control signal generation unit 202 respectively.
As a kind of preferred, described bias current sources comprises a PMOS pipe M213, and DC power supply voltage VDD, grid that the source electrode of a described PMOS pipe M213 connects described involves two stage differential amplifiers connect the first bias voltage (for a described PMOS pipe M213 provides suitable bias voltage), drain as the output of described bias current sources.
As a kind of preferred, described common-mode voltage detecting unit 201 comprises the first resistance R 201 and second resistance R 202 of similar resistance, two outputs of described involves two stage differential amplifiers connect respectively each one end of described the first resistance R 201 and the second resistance R 202, each other end of described the first resistance R 201 and the second resistance R 202 is connected and as the output A2 of described common-mode voltage detecting unit 201,, by the first resistance R 201 and the second resistance R 202, described common-mode voltage detecting unit 201 can detect Vocm2=(Von2+Vop2)/2.
As a kind of preferred, described the first resistance R 201 and the second resistance R 202 are also parallel with the first capacitor C 201 and the second capacitor C 202 separately.
As a kind of preferred, described involves two stage differential amplifiers also comprises isolated location, between the first order current source load 203 of two of described common-mode feedback control signal generation unit 202 output B2, C2 and described involves two stage differential amplifiers, by described isolated location, be connected, described isolated location comprises the second common gate differential pair metal-oxide-semiconductor (M203, M204); The first order that two source electrodes of described the second common gate differential pair metal-oxide-semiconductor or two drain electrodes connect respectively two output B2, C2 of described common-mode feedback control signal generation unit 202 and connect respectively described involves two stage differential amplifiers is amplified two outputs of input differences to pipe (M201, M202), and two drain electrodes of described the second common gate differential pair metal-oxide-semiconductor or two source electrodes connect respectively described first order current source load 203, and as the first order of described involves two stage differential amplifiers, amplify output respectively; Two grids of described the second common gate differential pair metal-oxide-semiconductor all connect the second bias voltage (for described the second common gate differential pair metal-oxide-semiconductor provides suitable bias voltage).
The first order current source load 203 of described involves two stage differential amplifiers comprises a differential pair metal-oxide-semiconductor (M205, M206); Two grids of described differential pair metal-oxide-semiconductor all connect the 3rd bias voltage (for described differential pair metal-oxide-semiconductor provides suitable bias voltage), two of described differential pair metal-oxide-semiconductor drain electrodes or two source electrodes be respectively as two inputs of described first order current source load 203, two source electrodes or two grounded drains of described differential pair metal-oxide-semiconductor.In the present embodiment, M205, M206 pipe are NMOS pipe, therefore, two source grounds of M205, M206 pipe, two drain electrodes of M205, M206 pipe connect respectively two outputs B2, C2 of described common-mode feedback control signal generation unit 202 as two inputs of described first order current source load 203 by described isolated location.
When Vocm2 is less than Vcm2, the gate source voltage of PMOS pipe M211, M212 reduces, the electric current that flows through M211, M212 pipe reduces, the electric current of M203, M204, M205 and M206 pipe declines, make the described involves two stage differential amplifiers first order amplify output voltage (drain voltage of M205, M206 pipe) step-down, thereby the grid voltage that makes M207, M208 pipe declines, output common mode voltage rises, finally make Vocm2=Vcm2, and each transistor in described involves two stage differential amplifiers is got back to default separately DC point; When Vocm2 is greater than Vcm2, the gate source voltage of M211, M212 pipe increases, the electric current that flows through M211, M212 pipe increases, the electric current of M203, M204, M205 and M206 pipe increases, make the described involves two stage differential amplifiers first order amplify output voltage and become large, thereby the grid voltage that makes M207, M208 pipe rises, output common mode voltage drop, and finally make Vocm2=Vcm2, and each transistor in described involves two stage differential amplifiers is got back to default separately DC point, reach the object of adjusting output common mode voltage.
A kind of continuous time common-mode feedback 200 for involves two stage differential amplifiers of the utility model embodiment mono-is applied to closed loop typical application circuit 300 as shown in Figure 3, when output common mode voltage Vocm2=Vcm2 that described common-mode voltage detecting unit 201 detects, do not have electric current to flow through described the first resistance R 201, the second resistance R 202, the first capacitor C 201 and the second capacitor C 202, now, suppose that source-leakage current that a described PMOS manages M213 is I
213, metal-oxide-semiconductor M200 source-leakage current be I
200, metal-oxide-semiconductor M209 and M210 source-leakage current be I
209, the first order amplification input difference that flows through described involves two stage differential amplifiers is I to source-leakage current of two of pipe PMOS pipes M201, M202
200/ 2, the source-leakage current that flows through PMOS pipe M211 and M212 is I
213/ 2, the electric current that flows through M203, M204, M205, M206 pipe is I
200/ 2+I
213/ 2.Therefore, only need be according to these current data, breadth length ratio and the bias voltage of each metal-oxide-semiconductor of the described continuous time common-mode feedback 200 for involves two stage differential amplifiers of design, make each MOS be operated in suitable DC point.
When there is very large instantaneous value in the input common-mode signal of described involves two stage differential amplifiers, the described first order is amplified input difference two of pipe PMOS pipes M201, M202 is all turn-offed, suppose that feedback loop does not also form (being that described common-mode voltage detecting unit 201 does not also transmit to described common-mode feedback control signal generation unit 202 the output common mode voltage detecting), flows through the electric current of M203, M204, M205, M206 pipe by I
200/ 2+I
213/ 2 drop to I
213/ 2, the drain terminal voltage of M205, M206 pipe is pulled to close to ground (0V), cause M207, the M208 of the second level amplifying circuit of described involves two stage differential amplifiers to manage shutoff, the voltage Vop2 of two outputs of described involves two stage differential amplifiers and Von2 approach DC power supply voltage VDD.Now, common-mode voltage detecting unit 201 detects output common mode voltage (Vocm2) close to VDD, and Vocm2 is input to the M211 of described common-mode feedback control signal generation unit 202, the source of M212 pipe, and the grid voltage Vref of M211, M212 pipe is constant, therefore the difference voltage (Vocm2-Vcm2) that M211, M212 pipe are greater than Vcm2 by Vocm2 is converted to feedback current, and (this feedback current is provided by the resistance capacitance branch road in M209, M210 pipe and common-mode voltage detecting unit 201 by VDD in essence, is designated as 2 * I
209') (now source-leakage current of a described PMOS pipe M213, is designated as I with the bias current of described common-mode feedback control signal generation unit 202
213') together respectively by two output B2 of described common-mode feedback control signal generation unit 202, C2 injects M203, M205 pipe and M204, M206 pipe, make M203, M204, M205, M206 pipe is operated in saturation region, thereby whole internal common mode feedback circuit is normally worked, guarantee that outside common mode loop gain is less than 1, do not meet positive feedback condition, prevent " locked " state, and when input voltage recovers normal, can make output common mode voltage equate with described desired output common-mode voltage, and make each transistor in described involves two stage differential amplifiers get back to default separately DC point.
In sum, when a kind of continuous time common-mode feedback 200 for involves two stage differential amplifiers of the utility model embodiment mono-is applied to closed loop typical application circuit 300 as shown in Figure 3, when very large instantaneous value appears in the input common-mode signal that can prevent involves two stage differential amplifiers, there is " locked " state in this involves two stage differential amplifiers.
Embodiment bis-,
Fig. 4 is another embodiment of the present utility model, the second common-mode voltage detecting unit 401 in this embodiment, the second common-mode feedback control signal generation unit 402 are identical with common-mode voltage detecting unit 201, common-mode feedback control signal generation unit 202 in embodiment mono-respectively, involves two stage differential amplifiers structure in this embodiment is different from the involves two stage differential amplifiers structure of embodiment mono-, but operation principle is identical with embodiment mono-.
Above-described embodiment is only used for further illustrating a kind of continuous time common-mode feedback for involves two stage differential amplifiers of the present utility model; but the utility model is not limited to embodiment; any simple modification, equivalent variations and modification that every foundation technical spirit of the present utility model is done above embodiment, all fall in the protection range of technical solutions of the utility model.
Claims (7)
1. the continuous time common-mode feedback for involves two stage differential amplifiers, it is characterized in that, comprise involves two stage differential amplifiers, common-mode voltage detecting unit for detection of the output common mode voltage of described involves two stage differential amplifiers, be converted to electric current with output common mode voltage for described common-mode voltage detecting unit is detected and the difference voltage of desired output common-mode voltage, and using this electric current as feedback signal, be stabilized in the common-mode feedback control signal generation unit of its default DC point with the first order current source load of involves two stage differential amplifiers described in co-controlling together with self bias current, two outputs of described involves two stage differential amplifiers connect respectively described common-mode voltage detecting unit, the output of described common-mode voltage detecting unit connects described common-mode feedback control signal generation unit, and two outputs of described common-mode feedback control signal generation unit connect respectively the first order current source load of described involves two stage differential amplifiers.
2. a kind of continuous time common-mode feedback for involves two stage differential amplifiers as claimed in claim 1, is characterized in that, described common-mode feedback control signal generation unit comprises the first common gate differential pair metal-oxide-semiconductor and bias current sources; Two metal-oxide-semiconductors of described the first common gate differential pair metal-oxide-semiconductor are PMOS pipe, and two source electrodes of described the first common gate differential pair metal-oxide-semiconductor are connected and are connected to the output of described bias current sources and the output of described common-mode voltage detecting unit; Two grids of described the first common gate differential pair metal-oxide-semiconductor all connect a default reference voltage, and this reference voltage equals described desired output common-mode voltage and deducts the gate source voltage of described the first common gate differential pair metal-oxide-semiconductor when its default DC point; Two drain electrodes of described the first common gate differential pair metal-oxide-semiconductor are respectively as two outputs of described common-mode feedback control signal generation unit.
3. a kind of continuous time common-mode feedback for involves two stage differential amplifiers as claimed in claim 2, it is characterized in that, described bias current sources comprises a PMOS pipe, and DC power supply voltage, the grid that the source electrode of a described PMOS pipe connects described involves two stage differential amplifiers connects the first bias voltage, drains as the output of described bias current sources; The bias current of described common-mode feedback control signal generation unit is the drain electrode output current of a described PMOS pipe.
4. a kind of continuous time common-mode feedback for involves two stage differential amplifiers as claimed in claim 1, it is characterized in that, described common-mode voltage detecting unit comprises the first resistance and second resistance of similar resistance, two outputs of described involves two stage differential amplifiers connect respectively each one end of described the first resistance and the second resistance, and each other end of described the first resistance and the second resistance is connected and as the output of described common-mode voltage detecting unit.
5. a kind of continuous time common-mode feedback for involves two stage differential amplifiers as claimed in claim 4, is characterized in that, described the first resistance and the second resistance are also parallel with the first electric capacity and the second electric capacity separately.
6. a kind of continuous time common-mode feedback for involves two stage differential amplifiers as claimed in claim 1, it is characterized in that, described involves two stage differential amplifiers also comprises isolated location, between two output of described common-mode feedback control signal generation unit and the first order current source load of described involves two stage differential amplifiers, by described isolated location, be connected, described isolated location comprises the second common gate differential pair metal-oxide-semiconductor; Two source electrodes of described the second common gate differential pair metal-oxide-semiconductor or two drain electrodes connect respectively described common-mode feedback control signal generation unit two outputs, and the first order that connects respectively described involves two stage differential amplifiers amplify input difference to two of pipe outputs, two drain electrodes of described the second common gate differential pair metal-oxide-semiconductor or two source electrodes connect respectively described first order current source load, and as the first order of described involves two stage differential amplifiers, amplify output respectively; Two grids of described the second common gate differential pair metal-oxide-semiconductor all connect the second bias voltage.
7. a kind of continuous time common-mode feedback for involves two stage differential amplifiers as claimed in claim 1, is characterized in that, the first order current source load of described involves two stage differential amplifiers comprises a differential pair metal-oxide-semiconductor; Two grids of described differential pair metal-oxide-semiconductor all connect the 3rd bias voltage, and two of described differential pair metal-oxide-semiconductor drain electrodes or two source electrodes be respectively as two inputs of described first order current source load, two source electrodes or two grounded drains of described differential pair metal-oxide-semiconductor.
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| CN116346047A (en) * | 2021-12-24 | 2023-06-27 | 圣邦微电子（北京）股份有限公司 | Rail-to-rail operational amplifier and input stage structure thereof |
| CN115033048A (en) * | 2022-07-19 | 2022-09-09 | 浙江大学 | Detection circuit, system and method with common mode locking function |
| CN115033048B (en) * | 2022-07-19 | 2023-09-15 | 浙江大学 | Detection circuit, system and method with common mode locking function |
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