CN103219961B - The operation amplifier circuit that a kind of bandwidth is adjustable - Google Patents
The operation amplifier circuit that a kind of bandwidth is adjustable Download PDFInfo
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- CN103219961B CN103219961B CN201310123747.1A CN201310123747A CN103219961B CN 103219961 B CN103219961 B CN 103219961B CN 201310123747 A CN201310123747 A CN 201310123747A CN 103219961 B CN103219961 B CN 103219961B
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Abstract
The invention discloses the operation amplifier circuit that a kind of bandwidth is adjustable, this operation amplifier circuit comprises biasing circuit, Full differential operational amplifier main circuit and common mode feedback circuit, wherein: biasing circuit, for providing the stable bias current had nothing to do with temperature and technique for Full differential operational amplifier main circuit and common mode feedback circuit; Full differential operational amplifier main circuit is the rail-to-rail output structure that two-stage is amplified, for providing gain and required bandwidth under the effect of bias current, and to common mode feedback circuit output common mode level; Common mode feedback circuit, for common mode electrical level to the constant voltage that stable Full differential operational amplifier main circuit exports.The operation amplifier circuit that bandwidth of the present invention is adjustable can be widely used in needing being operated in the active filter under various bandwidth, in the radio frequencies such as trans-impedance amplifier and analog integrated circuit, has low in energy consumption, integrated level is high, adapt to multiple different loads situation, configuration is simple, the advantage of working stability.
Description
Technical field
The present invention relates to technical field of integrated circuits, particularly relate to the operation amplifier circuit that a kind of bandwidth is adjustable.
Background technology
Integrated operational amplifier, since the sixties in 20th century comes out, has achieved development at full speed.Be used for the computing of various analog signal at first, such as ratio, sue for peace, ask poor, integration, differential etc., along with the development of technology, in the process that integrated transporting discharging has been widely used in analog signal and circuit for generating, can in order to be configured with source filter, unit module conventional in the multiple radio frequency such as trans-impedance amplifier and analog integrated circuit.
Full differential operational amplifier, compared with the operational amplifier of Single-end output, has larger output voltage swing, insensitive to common-mode noise, and exports not containing even-order harmonic component, in the integrated circuit under this makes it be widely used in various complex environment.Due to difference output, amplifier needs two feedback networks mated, and needs common mode feedback circuit to carry out stable common mode output voltage.
For filter, multiple communication standard now requires that filter has various bandwidth to meet the performance index requirement of system.A kind of solution is, the parallel connection of the filter of different bandwidth is placed, selects the output of different filter just can obtain the filter effect of different bandwidth.But this will bring the significant wastage of circuit power consumption and chip area.In order to reduce circuit power consumption and reduce chip area, good method is the core cell of shared filter, i.e. operation amplifier circuit.Change the feedback capacity of filter into adjustable capacitor array, undertaken switching by control signal and obtain different capacitances, thus obtain different filter bandwidhts.But the different bandwidth of filter, requires that amplifier also has different loop bandwidths.And along with the switching of filter feedback capacitor array, the load of amplifier, by change very large for experience, typically changes to tens pF from a few pF, brings very large threat to the stability of operational amplifier.If according to the situation of maximum load, design miller compensation electric capacity is to ensure the stability of amplifier under various loading condition, and in underloaded situation, the bandwidth of amplifier will significantly reduce, and can not meet the requirement of system performance index.Another main contradiction is, under certain power consumption, and the limited bandwidth of amplifier.Improve the bandwidth of amplifier, and keep the gain of amplifier constant, need the unity gain bandwidth improving amplifier.This just needs the operating current strengthening amplifier, inevitable contradiction when the contradiction of power consumption and bandwidth is operational amplifier design.
Summary of the invention
(1) technical problem that will solve
For the above-mentioned problems in the prior art, the invention provides the operation amplifier circuit that a kind of bandwidth is adjustable.
(2) technical scheme
For achieving the above object, the invention provides the operation amplifier circuit that a kind of bandwidth is adjustable, this operation amplifier circuit comprises biasing circuit, Full differential operational amplifier main circuit and common mode feedback circuit, wherein:
Biasing circuit, for providing the stable bias current had nothing to do with temperature and technique for Full differential operational amplifier main circuit and common mode feedback circuit;
Full differential operational amplifier main circuit is the rail-to-rail output structure that two-stage is amplified, for providing gain and required bandwidth under the effect of bias current, and to common mode feedback circuit output common mode level;
Common mode feedback circuit, for common mode electrical level to the constant voltage that stable Full differential operational amplifier main circuit exports.
In such scheme, described biasing circuit comprises reference current I
refand the tenth NMOS tube M
10, the 11 NMOS tube M
11the current-mirror structure of composition; 9th PMOS transistor M
9grid connect with drain electrode, for Full differential operational amplifier main circuit and common mode feedback circuit provide bias current.
In such scheme, described Full differential operational amplifier main circuit comprises the first order and second level amplifying circuit, adds and have the switchable 3rd and the 4th miller compensation electric capacity (C between this two-stage amplifying circuit
3, C
4) and the 3rd and the 4th miller compensation resistance (R
3, R
4), for realizing the steady operation under different bandwidth, adding simultaneously and having switchable first and second cross feedback electric capacity (C
1, C
2) and first and second cross feedback resistance (R
1, R
2), be used for expanding bandwidth further; Also add between this two-stage amplifying circuit and have the 5th and the 6th coupling capacitance (C
5, C
6) and the 5th and the 6th high value isolation resistance (R
5, R
6), realize rail-to-rail output.
In such scheme, described switchable 3rd and the 4th miller compensation electric capacity (C
3, C
4) and described switchable first and second cross feedback electric capacity (C
1, C
2) by capacitor array (C
1', C
2' ... C
n') and MOS switch (S
1, S
2... S
n) form, capacitor array (C
1', C
2' ... C
n') be made up of n bar branch circuit parallel connection, Article 1 is propped up route first and is skimmed electric capacity C
1', the first switch S
1be composed in series, n-th route n-th skims electric capacity C
n', the n-th switch S
nbe composed in series, n is the integer of>=1;
Described switchable 3rd and the 4th miller compensation resistance (R
3, R
4) and described switchable first and second cross feedback resistance (R
1, R
2) by electric resistance array (R
1', R
2' ... R
n') and MOS switch (S
1, S
2... S
n) form, electric resistance array (R
1', R
2' ... R
n') be made up of n bar branch circuit parallel connection, Article 1 is propped up route first and is skimmed resistance R
1', the first switch S
1be composed in series, n-th route n-th skims resistance R
n', the n-th switch S
nbe composed in series, n is the integer of>=1.
In such scheme, described MOS switch is made up of cmos transmission gate, comprises the 18 NMOS tube M
18, the 19 PMOS M
19and inverter INV.Described inverter INV is by the 21 PMOS transistor M
21with the 20 bi-NMOS transistor M
22form.
In such scheme, the described 5th and the 6th high value isolation resistance (R
5, R
6) by the PMOS (M of diode structure being operated in cut-off region
l) or be operated in the NMOS tube (M of diode structure of cut-off region
l') form, effectively reduce chip area.
In such scheme, described common mode feedback circuit comprises the 12 PMOS transistor M
12, the 13 PMOS transistor M
13, the 14 nmos pass transistor M
14, the 15 nmos pass transistor M
15, the 16 PMOS transistor M
16the differential amplifier arrangements formed, the 8th and the 9th resistance (R
8, R
9) detect output common mode level, stablize output common mode level to stable voltage V by negative feedback
cm.Also be added with RC lag compensation circuit in described common mode feedback loop, this RC lag compensation circuit is by the 7th resistance and the 7th electric capacity (R
7, C
7) be in series, for improving the phase margin of frequency response.
(3) beneficial effect
The operation amplifier circuit that bandwidth provided by the invention is adjustable, working stability is reliable, can be widely used in, in radio frequency under various complex environment and communication integrated circuit, having following multiple advantage:
1, in the operation amplifier circuit that bandwidth provided by the invention is adjustable, biasing circuit provides the reference current irrelevant with flow-route and temperature for amplifier main circuit and common mode feedback circuit, significantly reduces the performance inconsistency of amplifier under various process corner.
2, in the operation amplifier circuit that bandwidth provided by the invention is adjustable, the amplifier architecture of the rail-to-rail output that Full differential operational amplifier is made up of two-stage amplifying circuit, adopt the metal-oxide-semiconductor of diode structure to achieve the large resistance of equivalence, effectively reduce chip area; Adopt switchable miller compensation structure, make operational amplifier under different loading conditions, all can reach good stability; Meanwhile, proposing switchable cross feedback structure, when not increasing circuit power consumption, effectively extending bandwidth.Add RC lag compensation in common mode feedback circuit, while stablizing amplifier output DC level, reach good loop stability.
3, in order to reduce the impact of amplifier first order output on bias voltage, resistance R is needed
5and R
6resistance up to 1G ohm.Resistance high like this will take huge chip area.In the operation amplifier circuit that bandwidth provided by the invention is adjustable, adopt the metal-oxide-semiconductor being operated in the diode structure of cut-off region to realize the resistance of high value, utilize undersized pipe, the effect of high value can be obtained.In one example, the size of the PMOS of the diode structure of employing is W/L=4 μm/250nm, and chip area significantly reduces, and carrys out the size of adjusting resistance easily through the size adjusting metal-oxide-semiconductor.
4, in the operation amplifier circuit that bandwidth provided by the invention is adjustable, by applying switchable miller compensation electric capacity and cross feedback electric capacity simultaneously, resistance in miller compensation and cross feedback structure and the size of electric capacity all can be switched by control word, achieve the steady operation of amplifier under different bandwidth, make amplifier under various loading condition, equal energy steady operation, and when not increasing current drain, expanded bandwidth.
5, the operation amplifier circuit that bandwidth provided by the invention is adjustable, can be widely used in needing being operated in the active filter under various bandwidth, in the radio frequencies such as trans-impedance amplifier and analog integrated circuit, have low in energy consumption, integrated level is high, adapt to multiple different loads situation, configuration is simple, the advantage of working stability.
Accompanying drawing explanation
Fig. 1 is the structural representation according to the adjustable operation amplifier circuit of the bandwidth of the embodiment of the present invention;
Fig. 2 a realizes schematic diagram according to the one of the high resistance measurement of the embodiment of the present invention;
Fig. 2 b realizes schematic diagram according to the another kind of the high resistance measurement of the embodiment of the present invention;
Fig. 3 is the circuit theory diagrams of the switchable capacitors array according to the embodiment of the present invention;
Fig. 4 is the circuit theory diagrams of the changeable electric resistance array according to the embodiment of the present invention;
Fig. 5 is the circuit theory diagrams of the MOS switch according to the embodiment of the present invention;
Fig. 6 is the circuit theory diagrams of the inverter according to the embodiment of the present invention;
Fig. 7 is the Frequency Response of the adjustable operation amplifier circuit of bandwidth under arrowband application according to the embodiment of the present invention;
Fig. 8 is the Frequency Response of the adjustable operation amplifier circuit of bandwidth under broadband application according to the embodiment of the present invention;
Fig. 9 is the Frequency Response of the common mode feedback loop of the adjustable operation amplifier circuit of bandwidth according to the embodiment of the present invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly understand, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
As shown in Figure 1, Fig. 1 is the structural representation according to the adjustable operation amplifier circuit of the bandwidth of the embodiment of the present invention, and this operation amplifier circuit comprises biasing circuit, Full differential operational amplifier main circuit and common mode feedback circuit.Wherein, biasing circuit is used for providing for Full differential operational amplifier main circuit and common mode feedback circuit the stable bias current had nothing to do with temperature and technique; Full differential operational amplifier main circuit is the rail-to-rail output structure that two-stage is amplified, for providing gain and required bandwidth under the effect of bias current, and to common mode feedback circuit output common mode level, formed the 5th and the 6th resistance (R of high value by the metal-oxide-semiconductor being operated in the diode structure of cut-off region
5, R
6), significantly reduce chip area; By applying switchable miller compensation electric capacity and switchable cross feedback electric capacity simultaneously, achieve the steady operation of amplifier in different loads situation, and when not increasing power consumption, expand bandwidth; Common mode feedback circuit is used for common mode electrical level to the constant voltage stablizing the output of Full differential operational amplifier main circuit, by adding RC lag compensation circuit (R in the loop
7, C
7), improve the phase margin of common-mode response; This RC lag compensation circuit is by the 7th resistance and the 7th electric capacity (R
7, C
7) be in series.
Wherein, described common mode feedback circuit comprises the 12 PMOS transistor M
12, the 13 PMOS transistor M
13, the 14 nmos pass transistor M
14, the 15 nmos pass transistor M
15, the 16 PMOS transistor M
16the differential amplifier arrangements formed, the 8th and the 9th resistance (R
8, R
9) detect output common mode level, stablize output common mode level to stable voltage V by negative feedback
cm.Describedly in this common mode feedback loop, be also added with RC lag compensation circuit, this RC lag compensation circuit is by the 7th resistance and the 7th electric capacity (R
7, C
7) be in series, for improving the phase margin of frequency response.
Described biasing circuit comprises reference current I
refand the tenth NMOS tube M
10, the 11 NMOS tube M
11the current-mirror structure of composition; 9th PMOS transistor M
9grid connect with drain electrode, for Full differential operational amplifier main circuit and common mode feedback circuit provide bias current.Described Full differential operational amplifier main circuit comprises the first order and second level amplifying circuit, adds and have the switchable 3rd and the 4th miller compensation electric capacity (C between this two-stage amplifying circuit
3, C
4) and the 3rd and the 4th miller compensation resistance (R
3, R
4), for realizing the steady operation under different bandwidth, adding simultaneously and having switchable first and second cross feedback electric capacity (C
1, C
2) and first and second cross feedback resistance (R
1, R
2), be used for expanding bandwidth further; Also add between this two-stage amplifying circuit and have the 5th and the 6th coupling capacitance (C
5, C
6) and the 5th and the 6th high value isolation resistance (R
5, R
6), realize rail-to-rail output.
Fig. 2 a realizes schematic diagram according to the one of the high resistance measurement of the embodiment of the present invention.In order to reduce the impact of amplifier first order output on bias voltage, need the 5th and the 6th high value isolation resistance (R
5, R
6) resistance up to 1G ohm.Resistance high like this will take huge chip area.The present invention proposes the PMOS M that a kind of employing is operated in the diode structure of cut-off region
limplementation, it can be equivalent to large resistance R
5and R
6, effectively reduce chip area.In the present embodiment, the size of PMOS is W/L=4 μm/250nm, and chip area significantly reduces, thus improves integrated level, reduces cost, and carrys out the size of adjusting resistance easily through the size adjusting metal-oxide-semiconductor.
Fig. 2 b realizes schematic diagram according to the another kind of the high resistance measurement of the embodiment of the present invention.Large resistance R
5and R
6also can by the NMOS tube M of diode structure being operated in cut-off region
l' realize.The realization of undersized pipe can be adopted equally up to the large resistance of equivalence of 1G ohm.
Fig. 3 is the circuit theory diagrams of the switchable capacitors array according to the embodiment of the present invention.In order to make amplifier all can realize good stability in different loads situation, need the miller compensation electric capacity of amplifier can be switched by control word.Meanwhile, in order to solve the contradiction between amplifier power consumption and bandwidth, introducing the switchable capacitors of cross feedback, when not increasing power consumption, significantly having expanded bandwidth, and having ensure that phase margin.Switchable 3rd and the 4th miller compensation electric capacity (C in the present embodiment
3, C
4) and hand over switchable first and second cross feedback electric capacity (C
1, C
2), switchable capacitors array all is as shown in Figure 3 formed.Array is made up of n bar branch circuit parallel connection, and Article 1 is propped up route first and skimmed electric capacity C
1', the first switch S
1be composed in series, n-th route n-th skims electric capacity C
n', the n-th switch S
nbe composed in series, n is the integer of>=1, looks different loads situation in practical application, can determine the size of n.
Fig. 4 is the circuit theory diagrams of the changeable electric resistance array according to the embodiment of the present invention.The miller compensation electric capacity of amplifier and the electric capacity of cross feedback all need series connection resistance, realize better phase margin.Under different loading conditions, also need first to fourth resistance (R
1~ R
4) can switch.These switchable first and second cross feedback resistance (R
1, R
2) and the 3rd and the 4th miller compensation resistance (R
3, R
4) changeable electric resistance array composition all as shown in Figure 4.Array is made up of n bar branch circuit parallel connection, and Article 1 is propped up route first and skimmed resistance R
1', the first switch S
1be composed in series, n-th route n-th skims resistance R
n', the n-th switch S
nbe composed in series, n is the integer of>=1, looks different loads situation in practical application, can determine the size of n.
Fig. 5 is the circuit theory diagrams of the MOS switch according to the embodiment of the present invention.Switch is realized by cmos transmission gate, thus under large dynamic range, still can realize good switching characteristic.In an embodiment, switch is by the 19 PMOS M
19, the 18 NMOS tube M
18and inverter INV is formed, as input control signal V
cduring for low level, the 18 NMOS tube M
18turn off, the 19 PMOS M
19also turn off, cmos transmission gate turns off; As input control signal V
cduring for high level, the 18 NMOS tube M
18conducting, the 19 PMOS M
19also conducting, cmos transmission gate is opened.
Fig. 6 is the circuit theory diagrams according to the inverter in the MOS switch of the embodiment of the present invention.Input signal T9 meets the 21 PMOS M
1with the 22 NMOS tube M
2grid, the 21 PMOS M
1source electrode meet power supply V
dd, the 22 NMOS tube M
2source ground V
ss, the 21 PMOS M
1with the 22 NMOS tube M
2drain electrode connect export T10.
Fig. 7 is the Frequency Response of the adjustable operational amplifier of bandwidth under arrowband application according to the embodiment of the present invention.In active filter, example is applied as with amplifier, by switching controls word, when making amplifier be operated in arrowband, when the bandwidth of filter is 700KHz, the GB=655MHz of amplifier, phase margin 75.8 °.
Fig. 8 is the Frequency Response of the adjustable operational amplifier of bandwidth under broadband application according to the embodiment of the present invention.In active filter, example is applied as with amplifier, by switching controls word, when making amplifier be operated in broadband, when the bandwidth of filter is 10MHz, the GB=501MHz of amplifier, phase margin 55.5 °.Visible, by switching controls word, the bandwidth that can realize amplifier is adjustable, and can ensure the stability of amplifier in different loads situation.
Fig. 9 is the Frequency Response of the common mode feedback loop of the adjustable operational amplifier of bandwidth according to the embodiment of the present invention.In the present embodiment, by adding RC lag compensation (R
7, C
7), make the GB=34MHz of the common mode loop of amplifier, phase margin 64.2 °, achieves good common-mode stability.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. the operation amplifier circuit that bandwidth is adjustable, is characterized in that, this operation amplifier circuit comprises biasing circuit, Full differential operational amplifier main circuit and common mode feedback circuit, wherein:
Biasing circuit, for providing the stable bias current had nothing to do with temperature and technique for Full differential operational amplifier main circuit and common mode feedback circuit;
Full differential operational amplifier main circuit is the rail-to-rail output structure that two-stage is amplified, for providing gain and required bandwidth under the effect of bias current, and to common mode feedback circuit output common mode level;
Common mode feedback circuit, for common mode electrical level to the constant voltage that stable Full differential operational amplifier main circuit exports;
Wherein, described Full differential operational amplifier main circuit comprises the first order and second level amplifying circuit, adds and have the switchable 3rd and the 4th miller compensation electric capacity (C between this two-stage amplifying circuit
3, C
4) and the 3rd and the 4th miller compensation resistance (R
3, R
4), for realizing the steady operation under different bandwidth, adding simultaneously and having switchable first and second cross feedback electric capacity (C
1, C
2) and first and second cross feedback resistance (R
1, R
2), be used for expanding bandwidth further; Also add between this two-stage amplifying circuit and have the 5th and the 6th coupling capacitance (C
5, C
6) and the 5th and the 6th high value isolation resistance (R
5, R
6), realize rail-to-rail output.
2. operation amplifier circuit as claimed in claim 1, it is characterized in that, described biasing circuit comprises reference current (I
ref) and the tenth NMOS tube (M
10), the 11 NMOS tube (M
11) current-mirror structure that forms; 9th PMOS transistor (M
9) grid connect with drain electrode, for Full differential operational amplifier main circuit and common mode feedback circuit provide bias current.
3. operation amplifier circuit as claimed in claim 1, is characterized in that,
Described switchable 3rd and the 4th miller compensation electric capacity (C
3, C
4) and described switchable first and second cross feedback electric capacity (C
1, C
2) by capacitor array (C
1', C
2' ... C
n') and MOS switch (S
1, S
2s
n) form, capacitor array (C
1', C
2' ... C
n') be made up of n bar branch circuit parallel connection, Article 1 is propped up route first and is skimmed electric capacity (C
1'), the first switch (S
1) be composed in series, n-th route n-th skims electric capacity (C
n'), the n-th switch (S
n) be composed in series, n is the integer of>=1;
Described switchable 3rd and the 4th miller compensation resistance (R
3, R
4) and described switchable first and second cross feedback resistance (R
1, R
2) by electric resistance array (R
1', R
2' ... R
n') and MOS switch (S
1, S
2s
n) form, electric resistance array (R
1', R
2' ... R
n') be made up of n bar branch circuit parallel connection, Article 1 is propped up route first and is skimmed resistance (R
1'), the first switch (S
1) be composed in series, n-th route n-th skims resistance (R
n'), the n-th switch (S
n) be composed in series, n is the integer of>=1.
4. operation amplifier circuit as claimed in claim 3, it is characterized in that, described MOS switch is made up of cmos transmission gate, comprises the 18 NMOS tube (M
18), the 19 PMOS (M
19) and inverter (INV).
5. operation amplifier circuit as claimed in claim 4, it is characterized in that, described inverter (INV) is by the 21 PMOS transistor (M
21) and the 20 bi-NMOS transistor (M
22) form.
6. operation amplifier circuit as claimed in claim 1, is characterized in that, the described 5th and the 6th high value isolation resistance (R
5, R
6) by the PMOS (M of diode structure being operated in cut-off region
l) or be operated in the NMOS tube (M of diode structure of cut-off region
l') form, effectively reduce chip area.
7. operation amplifier circuit as claimed in claim 1, it is characterized in that, described common mode feedback circuit comprises the 12 PMOS transistor (M
12), the 13 PMOS transistor (M
13), the 14 nmos pass transistor (M
14), the 15 nmos pass transistor (M
15), the 16 PMOS transistor (M
16) differential amplifier arrangements that forms, the 8th and the 9th resistance (R
8, R
9) detect output common mode level, stablize output common mode level to stable voltage V by negative feedback
cm.
8. operation amplifier circuit as claimed in claim 7, it is characterized in that, be also added with RC lag compensation circuit in described common mode feedback loop, this RC lag compensation circuit is by the 7th resistance and the 7th electric capacity (R
7, C
7) be in series, for improving the phase margin of frequency response.
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| CN103595360B (en) * | 2013-09-24 | 2017-08-08 | 南京中科微电子有限公司 | A kind of operational amplifier of miller compensation structure |
| CN104113295A (en) * | 2014-04-30 | 2014-10-22 | 西安电子科技大学昆山创新研究院 | Low-voltage fully-differential operation amplifier circuit |
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| CN104836541B (en) * | 2015-03-10 | 2018-01-09 | 遵义师范学院 | A kind of adjustable Full differential operational amplifiers of GBW for ADC |
| CN106505953B (en) * | 2016-07-05 | 2019-03-22 | 络达科技股份有限公司 | Operation amplifier circuit |
| CN106788394B (en) * | 2016-12-05 | 2019-09-27 | 清华大学 | A kind of high speed current mode logic driver |
| CN109120243B (en) * | 2018-07-23 | 2020-07-07 | 中国电子科技集团公司第二十四研究所 | Clock driving circuit |
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| CN101917171A (en) * | 2010-08-19 | 2010-12-15 | 华东师范大学 | Broadband programmable gain amplifier based on operational amplifier |
| CN102158180A (en) * | 2011-03-28 | 2011-08-17 | 浙江大学 | Switch-type operation amplifier with low power consumption |
| CN102751956A (en) * | 2012-08-02 | 2012-10-24 | 电子科技大学 | Switched capacitor common-mode feedback structure |
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