CN205847091U - A kind of switched inductors type quasi-boost switching DC DC changer - Google Patents

Abstract

This utility model provides a kind of switched inductors type quasi-boost switching DC DC converter circuit, including voltage source, the switched inductors unit being made up of the first inductance, the second inductance, the 4th diode, the 5th diode and the 6th diode, the two ends quasi-boost switching unit being made up of the first electric capacity, the first diode, the first metal-oxide-semiconductor, the 3rd diode and switched inductors unit, second metal-oxide-semiconductor, second electric capacity, the second diode, output diode, output filter capacitor and load.Whole circuit structure is simple, combines quasi-boost switching unit, switching capacity unit and switched inductors unit respective single-stage boosting characteristic, it is achieved that the expansion of output voltage gain.

Description

A Switched Inductance Quasi-Switch Step-Up DC-DC Converter

technical field

The utility model relates to the technical field of power electronic circuits, in particular to a switch inductance quasi-switch step-up DC-DC converter circuit.

Background technique

In fuel cell power generation and photovoltaic power generation, due to the low DC voltage provided by a single solar cell or a single fuel cell, it cannot meet the electricity demand of existing electrical equipment, nor can it meet the needs of grid connection. It is often necessary to combine multiple batteries connected in series to achieve the desired voltage. On the one hand, this method greatly reduces the reliability of the entire system, and on the other hand, it needs to solve the problem of series voltage equalization. For this reason, a high-gain DC-DC converter capable of converting low voltage to high voltage is required. The switching boost converter SBI proposed in recent years has a small output voltage variation range. In the occasions of low voltage input and high voltage output, such as distributed energy grid-connected systems and fuel cell systems, the traditional SBI converter becomes no longer suitable. Be applicable. In order to expand the applicable range of the traditional SBI converter, it is necessary to expand its output voltage gain through topology improvement.

Utility model content

The purpose of the utility model is to overcome the shortcomings of the above-mentioned prior art, and provide a switch inductance type quasi-switch step-up DC-DC converter circuit, the specific technical scheme is as follows.

A switched inductance type quasi-switching step-up DC-DC converter circuit, including a voltage source, a switched inductance composed of a first inductance, a second inductance, a fourth diode, a fifth diode and a sixth diode unit, a two-terminal quasi-switch boost unit composed of a first capacitor, a first diode, a first MOS tube, a third diode and a switch inductance unit, a second MOS tube, a second capacitor, and a second diode Tube, output diode, output filter capacitor and load constitute.

In the above-mentioned switched inductance type quasi-switching step-up DC-DC converter circuit, the positive poles of the voltage source are respectively connected to the negative poles of the first capacitor and the anodes of the third diodes; the positive poles of the first capacitors are respectively It is connected to the cathode of the first diode, the drain of the first MOS transistor and the anode of the output diode; the source of the first MOS transistor is respectively connected to the cathode of the third diode, one end of the first inductor and the fourth The anode of the diode is connected; the cathode of the fourth diode is respectively connected with the cathode of the fifth diode and one end of the second inductance; the other end of the first inductance is respectively connected with the anode of the fifth diode connected to the anode of the sixth diode; the anode of the first diode is respectively connected to the other end of the second inductance, the drain of the second MOS transistor, the anode of the second capacitor and the cathode of the sixth diode The negative pole of the second capacitor is connected to the anode of the second diode, the negative pole of the output filter capacitor and one end of the load respectively; the cathode of the output diode is connected to the positive pole of the output filter capacitor and the other end of the load respectively; The negative electrode of the voltage source is respectively connected with the source electrode of the second MOS transistor and the cathode electrode of the second diode.

Compared with the prior art, the circuit of the utility model has the following advantages and technical effects: the whole circuit of the utility model has a simple structure, is convenient to control, and has higher output voltage gain; The voltage characteristics and the parallel charging and series discharging characteristics of the switched inductor and switched capacitor can increase the output voltage and realize the expansion of the output voltage gain of the quasi-switching boost converter.

Description of drawings

Fig. 1 is a switching inductance quasi-switching step-up DC-DC converter circuit in a specific embodiment of the present invention.

Fig. 2a and Fig. 2b are the equivalent circuit diagrams of a switching inductance quasi-switching step-up DC-DC converter circuit shown in Fig. 1 when the first MOS transistor and the second MOS transistor are turned on and turned off at the same time.

Fig. 3 is a comparison diagram of the gain curve of the utility model circuit and the gain curves of Boost converter, switched capacitor Boost converter, traditional Z source DC-DC converter and new quasi-Z source DC-DC converter.

detailed description

The technical solution of the utility model has been described in detail above, and the specific implementation of the utility model will be further described below in conjunction with the accompanying drawings.

With reference to Fig. 1, a kind of switching inductance type quasi-switching step-up DC-DC converter circuit described in the utility model includes a voltage source, consists of a first inductance, a second inductance, a fourth diode, and a fifth diode A switch inductance unit composed of the sixth diode, a two-terminal quasi-switch boost unit composed of the first capacitor, the first diode, the first MOS transistor, the third diode and the switch inductance unit, and the second MOS tube, second capacitor, second diode, output diode D _o , output filter capacitor and load R _L . When the first MOS transistor S ₁ and the second MOS transistor S ₂ are turned on at the same time, the first diode D ₁ , the second diode D ₂ , the third diode D ₃ and the fifth diode Both D ₅ are turned off, and the fourth diode D ₄ and the sixth diode D ₆ are turned on; the voltage source V _i and the first capacitor C ₁ are connected in parallel to the first inductance L ₁ and the second inductance L ₂ charging and storing energy; at the same time, the voltage source V _i , the first capacitor C ₁ and the second capacitor C ₂ together supply power to the output filter capacitor C _f and the load _RL . When the first MOS transistor S ₁ and the second MOS transistor S ₂ are turned off at the same time, the first diode D ₁ , the second diode D ₂ , the third diode D ₃ and the fifth diode D ₅ are all turned on, the fourth diode D ₄ , the sixth diode D ₆ and the output diode D _o are turned off; the first inductance L ₁ and the second inductance L ₂ are connected in parallel with the first capacitor C ₁ in series, A loop is formed; the voltage source V _i together with the first inductor L ₁ and the second inductor L ₂ charges the second capacitor C ₂ to form a loop; meanwhile, the output filter capacitor C _f supplies power to the load _RL . The structure of the whole circuit is simple and has high output voltage gain.

The specific connection mode of the utility model circuit is as follows: the positive pole of the voltage source is respectively connected with the negative pole of the first capacitor and the anode of the third diode; the positive pole of the first capacitor is respectively connected with the negative pole of the first diode, The drain of the first MOS transistor is connected to the anode of the output diode; the source of the first MOS transistor is respectively connected to the cathode of the third diode, one end of the first inductor and the anode of the fourth diode; The cathode of the fourth diode is respectively connected to the cathode of the fifth diode and one end of the second inductance; the other end of the first inductance is respectively connected to the anode of the fifth diode and the anode of the sixth diode ; The anode of the first diode is respectively connected to the other end of the second inductor, the drain of the second MOS transistor, the positive pole of the second capacitor and the cathode of the sixth diode; the negative pole of the second capacitor is respectively It is connected to the anode of the second diode, the negative pole of the output filter capacitor and one end of the load; the cathode of the output diode is respectively connected to the positive pole of the output filter capacitor and the other end of the load; the negative pole of the voltage source is respectively connected to the second The source of the MOS transistor is connected to the cathode of the second diode.

Fig. 2a, Fig. 2b have provided the working process diagram of the circuit of the utility model. FIG. 2 a and FIG. 2 b respectively correspond to equivalent circuit diagrams of the periods when the first MOS transistor S ₁ and the second MOS transistor S ₂ are turned on and turned off at the same time. The solid line in the figure indicates the part where current flows in the converter, and the dotted line indicates the part where no current flows in the converter.

The working process of the present utility model is as follows:

Stage 1, as shown in Figure 2a: the first MOS transistor S ₁ and the second MOS transistor S ₂ are turned on at the same time, at this time the first diode D ₁ , the second diode D ₂ , the third diode D ₃ and Both the fifth diode D ₅ are turned off, and the fourth diode D ₄ and the sixth diode D ₆ are turned on. The circuit forms two loops, namely: the voltage source V _i charges the output filter capacitor C _f and the load R _L together with the first capacitor C ₁ and the second capacitor C ₂ to form a loop; the voltage source V _i and the first capacitor C ₁ charges and stores energy to the first inductance L ₁ and the second inductance L ₂ connected in parallel to form a loop.

Phase 2, as shown in Figure 2b: the first MOS transistor S ₁ and the second MOS transistor S ₂ are turned off at the same time, at this time the first diode D ₁ , the second diode D ₂ , the third diode D ₃ and The fifth diode D ₅ is all turned on, and the fourth diode D ₄ , the sixth diode D ₆ and the output diode D _o are turned off. The circuit forms three loops, namely: the voltage source V _i together with the first inductance L ₁ and the second inductance L ₂ charge and store energy to the second capacitor C ₂ to form a loop; the first inductance L ₁ and the second inductance L ₂ are connected in series to charge the first capacitor C ₁ together to form a loop; the output filter capacitor C _f supplies power to the load _RL to form a loop.

In summary, since the switching trigger pulses of the _first MOS transistor S1 and the _second MOS transistor S2 are exactly the same, it is _assumed that the duty ratios of the switching transistors S1 and S2 are _both D, and the switching period is T _s . And set V _L1 and V _L2 to be the voltages across the first inductance L ₁ and the second inductance L ₂ respectively, V _C1 and V _C2 to be the voltages of the first capacitor C ₁ and the second capacitor C ₂ respectively, and V _S1 to be and V _S2 is respectively the voltage between the drain and the source of the first MOS transistor S ₁ and the second MOS transistor S ₂ . In a switching period T _s , let the output voltage be V _o . When the converter enters the steady-state operation, the following voltage relationship derivation process is obtained.

Working mode 1: the first MOS transistor S ₁ and the second MOS transistor S ₂ are turned on at the same time, and the corresponding equivalent circuit is shown in Figure 2a, so the following formula is given:

V _{L1_on} ＝V _{L2_on} ＝V _i +V _C1 (1)

V _O =V _i +V _C1 +V _C2 (2)

V _S1 =V _S2 =0 (3)

The conduction time of MOS transistors S ₁ and S ₂ is DT _s .

Working mode 2: both the first MOS transistor S ₁ and the second MOS transistor S ₂ are turned off, and the corresponding equivalent circuit is shown in Figure 2b, so the following formula is given:

V _{L1_off} +V _{L2_off} ＝-V _C1

(4)

V _{L1_off} +V _{L2_off} =V _i -V _C2 (5)

V _S2 = V _C2 (6)

V _S1 = V _C1 (7)

The turn-off time of the MOS transistors S ₁ and S ₂ is (1-D)T _s .

According to the above analysis, the principle of conservation of inductance volt-seconds is applied to the first inductance L1 and the second inductance L2 respectively, and the simultaneous formula (1), formula (4) and formula (5) can be obtained:

D(V _i +V _C1 )-(1-D)(V _C1 +V _{L2_off} )＝0 (8)

D(V _i +V _C1 )-(1-D)(V _C1 +V _{L1_off} )＝0 (9)

Simultaneous formula (8) and formula (9) can be obtained:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; f</span>}\mathrm{<span\; class="notranslate">\; f</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; f</span>}\mathrm{<span\; class="notranslate">\; f</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; )</span>$

Therefore, the relationship between the voltage V _C1 of the first capacitor C ₁ , the voltage V _C2 of the second capacitor C ₂ and the voltage source V _i can be obtained from the simultaneous formula (8), formula (9) and formula (10) for:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; D.</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 3</span>}\mathrm{<span\; class="notranslate">\; D.</span>}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 11</span>}<span\; class="notranslate">\; )</span>$

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 3</span>}\mathrm{<span\; class="notranslate">\; D.</span>}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 12</span>}<span\; class="notranslate">\; )</span>$

Then by formula (2), formula (11) and formula (12), the output voltage V _o expression that can obtain the utility model circuit is:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 3</span>}\mathrm{<span\; class="notranslate">\; D.</span>}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 13</span>}<span\; class="notranslate">\; )</span>$

Then the expression of the output voltage gain of the utility model circuit is:

$\mathrm{<span\; class="notranslate">\; G</span>}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 3</span>}\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 14</span>}<span\; class="notranslate">\; )</span>$

As shown in Figure 3, it is the gain curve comparison figure of the gain curve of the utility model circuit and Boost converter, switched capacitor Boost converter, traditional Z source DC-DC converter and novel quasi-Z source DC-DC converter, among the figure Including the gain curve of the utility model circuit, the gain curve of the novel quasi-Z source DC-DC converter, the gain curve of the traditional Z source DC-DC converter, the gain curve of the switched capacitor Boost converter, and the gain curve of the Boost converter . It can be seen from the figure that the utility model circuit can achieve a large gain G when the duty ratio D does not exceed 0.33, and the utility model circuit duty ratio D will not exceed 0.33. Therefore, by comparison, the gain of the utility model circuit is very high.

In summary, the overall structure of the circuit of the utility model is simple, and the control is convenient. It combines the characteristics of the quasi-switching boost unit single-stage buck-boost and the characteristics of the switch inductance and the switch capacitor to be charged in parallel and discharged in series to achieve a further increase in output voltage gain. Boost, and there is no start-up inrush current and inrush current at the moment when the MOS tube is turned on.

The above-mentioned embodiment is the preferred implementation mode of the present utility model, but the implementation mode of the present utility model is not limited by the described embodiment, and any other changes, modifications, modifications made without departing from the spirit and principle of the present utility model Substitution, combination, and simplification should all be equivalent replacement methods, and are all included in the protection scope of the present utility model.

Claims (1)

1. a switched inductors type quasi-boost switching DC-DC converter circuit, it is characterised in that include voltage source (V_i), switch electricity Sense unit, quasi-boost switching unit, the second metal-oxide-semiconductor (S₂), the second electric capacity (C₂) the second diode (D₂), output diode (D_o), Output filter capacitor (C_f) and load (R_L)；Described switched inductors unit is by the first inductance (L₁), the second inductance (L₂), the four or two Pole pipe (D₄), the 5th diode (D₅), the 6th diode (D₆) constitute；Described quasi-boost switching unit is by the first diode (D₁), First electric capacity (C₁), the first metal-oxide-semiconductor (S₁), the 3rd diode (D₃) and foregoing switched inductors unit composition；

Described voltage source (V_i) positive pole respectively with the first electric capacity (C₁) negative pole and the 3rd diode (D₃) anode connect；Institute State the first electric capacity (C₁) positive pole respectively with the first diode (D₁) negative electrode, the first metal-oxide-semiconductor (S₁) drain electrode and output diode (D_o) anode connect；Described first metal-oxide-semiconductor (S₁) source electrode respectively with the 3rd diode (D₃) negative electrode, the first inductance (L₁) One end and the 4th diode (D₄) anode connect；Described 4th diode (D₄) negative electrode respectively with the 5th diode (D₅) Negative electrode and the second inductance (L₂) one end connect；Described first inductance (L₁) the other end respectively with the 5th diode (D₅) Anode and the 6th diode (D₆) anode connect；Described first diode (D₁) anode respectively with the second inductance (L₂) another One end, the second metal-oxide-semiconductor (S₂) drain electrode, the second electric capacity (C₂) positive pole and the 6th diode (D₆) negative electrode connect；Described second Electric capacity (C₂) negative pole respectively with the second diode (D₂) anode, output filter capacitor (C_f) negative pole and load (R_L) one End connects；Described output diode (D_o) negative electrode respectively with output filter capacitor (C_f) positive pole and load (R_L) the other end Connect；Described voltage source (V_i) negative pole respectively with the second metal-oxide-semiconductor (S₂) source electrode, the second diode (D₂) negative electrode connect.