CN205845940U - 超小型bga结构封装结构 - Google Patents

超小型bga结构封装结构 Download PDF

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Publication number
CN205845940U
CN205845940U CN201620712696.5U CN201620712696U CN205845940U CN 205845940 U CN205845940 U CN 205845940U CN 201620712696 U CN201620712696 U CN 201620712696U CN 205845940 U CN205845940 U CN 205845940U
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microminiature
substrate
bga
chip
construction packages
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金若虚
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Yuancheng Technology (Suzhou) Co.,Ltd.
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Li Cheng Technology (suzhou) Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本实用新型公开了一种超小型BGA结构封装结构,其特征在于,包括:一基板,具有相对的一顶面和一底面;一芯片,堆叠于所述基板的顶面上;多个锡球,配置于基板的底面;封装结构的封装空间内填充有绝缘树脂。本实用新型所述超小型BGA结构封装结构相较于现有技术具有如下优点:采取BGA封装(14 ball)结构,具有超小的封装尺寸1.6mm x 1.6mm,并且解决了球距0.4毫米小间距植球问题,以及解决了焊线跨芯片超过85%的挑战。

Description

超小型BGA结构封装结构
技术领域
本实用新型属于芯片封装技术领域,具体涉及一种超小型BGA结构封装结构。
背景技术
BGA是目前主流的封装类型之一,具有引脚数量多,面积小,可靠性高,电性能好等优点。但超小型BGA封装还是一个难点。通常把小于2mmx2mm的产品称为超小型封装。目前超小型产品大多引脚数少,主要采用QFN等封装形式。QFN(Quad Flat No-lead Package,方形扁平无引脚封装),表面贴装型封装之一。QFN是一种无引脚封装,呈正方形或矩形,封装底部中央位置有一个大面积裸露焊盘用来导热,围绕大焊盘的封装外围四周有实现电气连结的导电焊盘。QFN封装形式只有封装外围四周有实现电气连结的导电焊盘,所以不可能有太多引脚。
而对多引脚数需求的产品只能采用Flip chip封装。但Flip chip封装投资大,价格高。倒装芯片封装(Flip chip,FC),是把芯片倒置在封装载体上。FC工艺没有一般封装工艺的芯片贴装、引线键合两道制程,它是直接通过芯片上的金属凸点与封装载体的焊点焊接来实现互连的。QFN封装形式,引脚数少。而Flip chip封装,封装投资大,价格高。
实用新型内容
本实用新型的目的是提供一种超小型BGA结构封装结构,可以有效节约成本。
为实现上述实用新型目的,本实用新型采用了如下技术方案:
一种超小型BGA结构封装结构,其特征在于,包括:一基板,具有相对的一顶面和一底面;一芯片,堆叠于所述基板的顶面上;多个锡球,配置于基板的底面;封装结构的封装空间内填充有绝缘树脂。
进一步的,所述芯片通过金丝键合技术电性连接至所述基板。
进一步的,所述芯片和基板之间用胶带粘接。
进一步的,所述封装结构的尺寸为1.6mm*1.6mm,所述封装结构的厚度为0.7~1mm。
进一步的,所述芯片厚度为190~210μm。
有益效果:
本实用新型所述超小型BGA结构封装结构相较于现有技术具有如下优点:采取BGA封装(14ball)结构,具有超小的封装尺寸1.6mm x 1.6mm,高度0.85mm,业内BGA封装尺寸一般大于2mm x 2mm。并且解决了球距0.4毫米小间距植球问题,以及吸盘式胶布粘贴切割工艺,以及切割后的吸放工艺。解决了焊线跨芯片超过85%的挑战。
附图说明
图1为本实用新型所述超小型BGA结构封装结构的结构示意图;
其中,1、基板;2、芯片;3、胶带;4、锡球;5、绝缘树脂;6、金丝。
具体实施方式
以下结合附图及优选实施例对本实用新型的技术方案作进一步的说明。
实施例:
如图1所示:本实施例所揭示的一种超小型BGA结构封装结构,包括:一基板1,具有相对的一顶面和一底面;一芯片2,堆叠于所述基板1的顶面上;多个锡球4,配置于基板1的底面;封装结构的封装空间内填充有绝缘树脂5。
进一步的,所述芯片2通过金丝6键合技术电性连接至所述基板1。
进一步的,所述芯片2和基板1之间用胶带粘接。
进一步的,所述封装结构的尺寸为1.6mm*1.6mm,所述封装结构的厚度为0.85mm。
进一步的,所述芯片2厚度为200μm。
本实用新型主要采用了如下技术得以实现:
a)芯片研磨减薄与切割技术,严格控制晶片大小,芯片厚度200um,精度偏差需要控制在+/-10um的范围内。
b)超高精度的粘晶技术,本项目需要的二维精度,精度偏差需要控制在+/-50um的范围内。
c)Wire bond打线的线弧参数优化与控制技术,金线跨die超过85%,采用SSB工艺,避免die与金线之间的短路,以及线与线之间的短路。
d)由于各材料的热膨胀系数不同,合理调整封装工艺中参数(温度,时间),使之达到最优化的控制,使得封装无翘曲,塑封体无空洞等问题。
需要指出的是,以上所述者仅为用以解释本实用新型之较佳实施例,并企图据以对本实用新型作任何形式上之限制,是以,凡有在相同之实用型精神下所作有关本实用新型之任何修饰或变更,皆仍应包括在本实用新型意图保护之范畴。

Claims (5)

1.一种超小型BGA结构封装结构,其特征在于,包括:一基板,具有相对的一顶面和一底面;一芯片,堆叠于所述基板的顶面上;多个锡球,配置于基板的底面;封装结构的封装空间内填充有绝缘树脂。
2.根据权利要求1所述的超小型BGA结构封装结构,其特征在于,所述芯片通过金丝键合技术电性连接至所述基板。
3.根据权利要求1所述的超小型BGA结构封装结构,其特征在于,所述芯片和基板之间用胶带粘接。
4.根据权利要求1所述的超小型BGA结构封装结构,其特征在于,所述封装结构的尺寸为1.6mm*1.6mm,所述封装结构的厚度为0.7~1mm。
5.根据权利要求1所述的超小型BGA结构封装结构,其特征在于,所述芯片厚度为190~210μm。
CN201620712696.5U 2016-07-07 2016-07-07 超小型bga结构封装结构 Active CN205845940U (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109916744A (zh) * 2019-04-18 2019-06-21 广东工业大学 一种焊点与基板拉伸强度的检测方法和设备

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109916744A (zh) * 2019-04-18 2019-06-21 广东工业大学 一种焊点与基板拉伸强度的检测方法和设备

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Address after: 215000 33 Xinghai street, Suzhou Industrial Park, Suzhou City, Jiangsu Province

Patentee after: Yuancheng Technology (Suzhou) Co.,Ltd.

Address before: 215000 33 Xinghai street, Suzhou Industrial Park, Suzhou City, Jiangsu Province

Patentee before: Powertech Technology (Suzhou) Co.,Ltd.