CN205792205U - SPM and air-conditioner - Google Patents

SPM and air-conditioner Download PDF

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Publication number
CN205792205U
CN205792205U CN201620513449.2U CN201620513449U CN205792205U CN 205792205 U CN205792205 U CN 205792205U CN 201620513449 U CN201620513449 U CN 201620513449U CN 205792205 U CN205792205 U CN 205792205U
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CN
China
Prior art keywords
input
circuit
pipe
spm
phase
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CN201620513449.2U
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Chinese (zh)
Inventor
冯宇翔
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广东美的制冷设备有限公司
美的集团股份有限公司
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Application filed by 广东美的制冷设备有限公司, 美的集团股份有限公司 filed Critical 广东美的制冷设备有限公司
Priority to CN201620513449.2U priority Critical patent/CN205792205U/en
Priority claimed from PCT/CN2016/097737 external-priority patent/WO2017206385A1/en
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Publication of CN205792205U publication Critical patent/CN205792205U/en

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

This utility model provides a kind of SPM and air-conditioner, and the first outfan of the adaptive circuit in SPM is as the Enable Pin of HVIC pipe;First input/output terminal of PFC on-off circuit, the second input/output terminal, the 3rd input/output terminal and the 4th input/output terminal are connected respectively the signal output part to PFC drive circuit, PFC low reference voltage end, PFC end and the second outfan of adaptive circuit;The level signal that PFC on-off circuit inputs according to its 4th input/output terminal, it is achieved the power switch pipe of corresponding function;Adaptive circuit is when the temperature of IPM is less than predetermined temperature value, the signal of the first level is exported by its second outfan, and the enable signal of its first outfan corresponding level of output is passed through according to the input signal of its input, and when the temperature of IPM is higher than predetermined temperature value, by the signal of its second outfan output second electrical level, and pass through the enable signal of its first outfan corresponding level of output according to the input signal of its input.

Description

SPM and air-conditioner

Technical field

This utility model relates to SPM technical field, in particular to a kind of intelligence merit Rate module and a kind of air-conditioner.

Background technology

SPM (Intelligent Power Module is called for short IPM) is a kind of by electric power The analog line driver that electronic discrete device and integrated circuit technique integrate, SPM bag Containing device for power switching and high-voltage driving circuit, and with overvoltage, overcurrent and the fault such as overheated inspection Slowdown monitoring circuit.The logic input terminal of SPM receives the control signal of master controller, and outfan drives Dynamic compressor or subsequent conditioning circuit work, send the system status signal detected back to master controller simultaneously. Relative to traditional discrete scheme, SPM has high integration, high reliability, self-inspection and guarantor The advantages such as protection circuit, are particularly suitable for driving the converter of motor and various inverter, are that frequency conversion is adjusted Speed, metallurgical machinery, electric propulsion, servo-drive, the desired power level electronic device of frequency-conversion domestic electric appliances.

The structure of existing Intelligent power module circuit is as it is shown in figure 1, MTRIP port is as electric current Test side, to protect SPM 100 according to the size of current detected.PFCIN Port is as the PFC (Power Factor Correction, PFC) of SPM Control input.

In SPM work process, PFCINP end presses certain frequency between low and high level Frequently switching, makes IGBT (Insulated Gate Bipolar Transistor, insulated gate bipolar crystal Pipe) pipe 127 is continuously on off state and FRD pipe 131 is continuously in freewheeling state, this frequency Generally LIN1~LIN3,2~4 times of HIN1~HIN3 switching frequency, and with LIN1~LIN3, the switching frequency of HIN1~HIN3 the most directly contact.

As in figure 2 it is shown, UN, VN, WN connect one end of milliohm resistance 138, milliohm resistance 138 Another termination GND, MTRIP be current detecting pin, connect one end of milliohm resistance 138, logical Cross the pressure drop measuring and calculating electric current of detection milliohm resistance, as it is shown on figure 3, when current is excessive, make intelligence merit Rate module 100 quits work, it is to avoid after miscarriage life is overheated excessively, produce SPM 100 Permanent damage.

-VP, COM, UN, VN, WN have electrical connection in actual use.Therefore, Voltage noise when IGBT pipe 121~IGBT pipe 127 switchs and FRD (Fast Recovery Diode, fast recovery diode) pipe 111~FRD pipe 116, FRD pipe 131 afterflow time electric current make an uproar Sound all can intercouple, and impacts the input pin of each low-voltage area.

In each input pin, HIN1~HIN3, LIN1~LIN3, the threshold value of PFCINP typically exist About 2.3V, and the threshold voltage of ITRIP typically only has below 0.5V, therefore, ITRIP is It is easily subject to the pin of interference.When ITRIP is toggled, SPM 100 will stop work Make, and because the most really there is stream, so the triggering that ITRIP is now belongs to false triggering. As shown in Figure 4, it is high level at PFCIN, when moment opened by IGBT pipe 127, because FRD The existence of the reverse recovery current of pipe 131, superposition goes out I131Current waveform, this electric current has bigger Concussion noise, passes through-VP, COM, UN, VN, WN electrical connection in peripheral circuit, shake Swing noise to close out certain voltage and raise by Rhizoma Nelumbinis at MTRIP end.If making the condition that MTRIP triggers For: voltage > Vth, and the persistent period > Tth;In the diagram, if Ta < Tth < Tb, then at first three The highest deficiency of voltage in cycle is so that MTRIP produces false triggering, and to the 4th cycle, MTRIP will Produce false triggering.

It is true that the reverse recovery time of FRD pipe, reverse recovery current and when opening of IGBT pipe Between be related, the switching speed of IGBT pipe is the fastest, the reverse recovery time of FRD pipe is the longest, Reverse recovery current is the biggest.Usually, the switching frequency of PFC is fixed, and frequency exists Between 20kHz~40kHz, for this application scenario, IGBT pipe typically can select switching speed relatively Fast type, reduces switching loss, and SPM general work is at high temperature, and temperature is more Height, the switching speed of IGBT pipe is the slowest, so that people are more likely to select switching speed fast IGBT manages.Because the reverse recovery time of FRD pipe and reverse recovery current are positive temperature coefficients, temperature Spending the highest, reverse recovery time is the longest, therefore along with the continuous firing of system, SPM The constant temperature of 100 rises, although the switching speed of IGBT pipe is the most slack-off, but because IGBT The most quickly, the impact that the reverse recovery time of FRD pipe increased because of the time is more for the switching speed of pipe itself Greatly, the probability making MTRIP be triggered is increasing.As it is shown in figure 5, at 25 DEG C, FRD's The voltage pulsation that Reverse recovery effect causes is not enough to cause MTRIP to trigger, and along with temperature liter Height, when 75 DEG C, MTRIP is triggered, and makes system stalls.Although this false triggering is one Can recover after the section time to destroy without system is formed, but user can be caused puzzlement undoubtedly.As right In the application scenario of transducer air conditioning, the highest user just of ambient temperature more needs air conditioning system to continue work The when of work, but the reverse recovery time that high ambient temperature can make FRD pipe increases, and MTRIP is subject to The probability of false triggering improves, and once MTRIP is by false triggering, and air conditioning system can occur because being mistakenly considered Flowing and quit work 3~5 minutes, make user during this period of time cannot obtain cold wind, this is to cause sky Adjusting system is because of the not enough one of the main reasons by customer complaint of refrigerating capacity.

Therefore, the premise that SPM low-power consumption at normal temperatures normally works how is able to ensure that Under, effectively reduce SPM and at high temperature become technology urgently to be resolved hurrily by the probability of false triggering Problem.

Utility model content

This utility model be intended at least to solve present in prior art or correlation technique technical problem it One.

To this end, a purpose of the present utility model is to propose a kind of new SPM, energy On the premise of enough guaranteeing SPM low-power consumption normally working at normal temperatures, effectively reduce intelligence merit Rate module is at high temperature by the probability of false triggering.

Another purpose of the present utility model is to propose a kind of air-conditioning with this SPM Device.

For achieving the above object, according to the embodiment of first aspect of the present utility model, it is proposed that a kind of SPM, including: brachium pontis signal input part under brachium pontis signal input part, three-phase on three-phase, Three-phase low reference voltage end, current detecting end, PFC end and PFC low reference voltage end;HVIC (High Voltage Integrated Circuit, high voltage integrated circuit) manages, and described HVIC pipe sets It is equipped with and is respectively connecting on described three-phase brachium pontis signal input part under brachium pontis signal input part and described three-phase Terminals, and be connected to the first port of described current detecting end, described HVIC pipe also set It is equipped with the signal output part of PFC drive circuit;Adaptive circuit, the input of described adaptive circuit End is connected to described first port, and the first outfan of described adaptive circuit is managed as described HVIC Enable Pin;PFC on-off circuit, the first input/output terminal of described PFC on-off circuit, second Input/output terminal, the 3rd input/output terminal and the 4th input/output terminal are connected respectively to described PFC The signal output part of drive circuit, described PFC low reference voltage end, described PFC end and described from Second outfan of adaptive circuit;Wherein, described PFC on-off circuit is according to its 4th input and output The level signal of end input, it is achieved there is the first switching speed and the power switch pipe of the first saturation voltage drop Function, or realize the function of power switch pipe with second switch speed and the second saturation voltage drop, Described first switching speed is more than described second switch speed, and described first saturation voltage drop is more than described the Two saturation voltage drops;Described adaptive circuit is less than predetermined temperature value in the temperature of described SPM Time, the signal of the first level is exported by its second outfan, and according to the input signal of its input Value and the first setting value between magnitude relationship by its first outfan export corresponding level enable Signal;Described adaptive circuit is higher than described predetermined temperature value in the temperature of described SPM Time, by the signal of its second outfan output second electrical level, and according to the input signal of its input Value and the second setting value between magnitude relationship by its first outfan export corresponding level enable Signal, described second setting value is more than described first setting value.

According to the SPM of embodiment of the present utility model, low in the temperature of SPM When predetermined temperature value, by input (the i.e. first port, namely electric current according to adaptive circuit Test side) input signal value and the first setting value between magnitude relationship export the making of corresponding level Energy signal so that when the temperature of SPM is relatively low, adaptive circuit can be examined according to electric current Survey the signal value that detects of end to make a response, when signal value that i.e. current detecting end detects is bigger, Output in time controls HVIC and manages out-of-work enable signal, the signal value that current detecting end detects Time less, output controls the enable signal of HVIC pipe work, to guarantee that SPM is at room temperature Can normally work under (time i.e. less than predetermined temperature value), and carry out overcurrent protection.

When the temperature of SPM is higher than predetermined temperature value, defeated by according to adaptive circuit Magnitude relationship between value and second setting value of the input signal entering end exports the enable letter of corresponding level Number so that when the temperature of SPM is higher, it is possible to by the second bigger setting value (phase Ratio is in the first setting value) determine whether that output controls HVIC and manages out-of-work enable as standard Signal, and then can effectively reduce when SPM at high temperature works by the probability of false triggering.

PFC on-off circuit is by the level signal according to the input of its 4th input/output terminal, it is achieved different The power switch pipe of function so that when the temperature of SPM is less than predetermined temperature value, PFC On-off circuit is capable of the power switch pipe that switching speed is very fast and saturation voltage drop is higher, to obtain more Low dynamic power consumption;Simultaneously can be when the temperature of SPM be higher than predetermined temperature value, PFC On-off circuit is capable of switching speed compared with slow and that saturation voltage drop is relatively low power switch pipe, to obtain more Low quiescent dissipation and reduce further circuit noise, and then reduce SPM at height By the probability of false triggering during the lower work of temperature.

SPM according to above-described embodiment of the present utility model, it is also possible to there is techniques below Feature:

According to an embodiment of the present utility model, also include: sampling resistor, described three-phase low-voltage Reference edge and described current detecting end are connected to the first end of described sampling resistor, described sampling resistor The second end be connected to the low-pressure area power supply negative terminal of described SPM.

According to an embodiment of the present utility model, described adaptive circuit is at described SPM Temperature less than described predetermined temperature value time, if the value of the input signal of its input is more than or equal to institute State the first setting value, then exported the enable signal of described first level by its first outfan, to prohibit Only described HVIC pipe work;Otherwise, the enable of described second electrical level is exported by its first outfan Signal, to allow described HVIC pipe to work;Described adaptive circuit is at described SPM When temperature is higher than described predetermined temperature value, if the value of the input signal of its input is more than or equal to described Second setting value, then export the enable signal of described first level by its first outfan;Otherwise, The enable signal of described second electrical level is exported by its first outfan.

According to an embodiment of the present utility model, described adaptive circuit includes:

First resistance, the first end of described first resistance is connected to the power supply of described adaptive circuit Positive pole, the second end of described first resistance is connected to the negative electrode of Zener diode, described Zener diode Anode be connected to the power supply negative pole of described adaptive circuit, the power supply electricity of described adaptive circuit Source positive pole and negative pole are respectively connecting to the low-pressure area power supply anode of described SPM and bear End;Second resistance, the first end of described second resistance is connected to the second end of described first resistance, institute The second end stating the second resistance is connected to the positive input terminal of the first voltage comparator;Critesistor, described First end of critesistor is connected to the second end of described second resistance, the second end of described critesistor It is connected to the anode of described Zener diode;First voltage source, the negative pole of described first voltage source connects To the anode of described Zener diode, the positive pole of described first voltage source is connected to described first voltage ratio The negative input end of relatively device, the outfan of described first voltage comparator is connected to the input of the first not gate End, the outfan of described first not gate is connected to the input of the second not gate, described second not gate defeated Go out the end the second outfan as described adaptive circuit.

According to an embodiment of the present utility model, described adaptive circuit also includes: the first simulation is opened Closing, the end that controls of described first analog switch is connected to the outfan of described second not gate;Second voltage Comparator, the positive input terminal of described second voltage comparator as the input of described adaptive circuit, The negative input end of described second voltage comparator is connected to the positive pole of the second voltage source, described second voltage The negative pole in source is connected to the power supply negative pole of described adaptive circuit, described second voltage comparator Outfan is connected to the first selection end of described first analog switch and the first input of the first NAND gate End;Tertiary voltage comparator, the positive input terminal of described tertiary voltage comparator is connected to described second electricity The positive input terminal of pressure comparator, the negative input end of described tertiary voltage comparator is connected to tertiary voltage source Positive pole, the negative pole in described tertiary voltage source is connected to the power supply negative pole of described adaptive circuit, The outfan of described tertiary voltage comparator is connected to the second input of described first NAND gate, described The outfan of the first NAND gate is connected to the input of the 3rd not gate, and the outfan of described 3rd not gate is even Being connected to the second selection end of described first analog switch, the fixing end of described first analog switch is connected to The input of the 4th not gate, the outfan of described 4th not gate is first defeated as described adaptive circuit Go out end.

According to an embodiment of the present utility model, described PFC on-off circuit is defeated in its 4th input When going out the signal that end inputs described first level, it is achieved there is described first switching speed and described first The function of the power switch pipe of saturation voltage drop;Described PFC on-off circuit is at its 4th input/output terminal When inputting the signal of described second electrical level, it is achieved there is described second switch speed and described second saturated The function of the power switch pipe of pressure drop.

According to an embodiment of the present utility model, described PFC on-off circuit includes: the second simulation Switch, the fixing end of described second analog switch is defeated as the 3rd input of described PFC on-off circuit Going out end, the first selection end of described second analog switch is connected to the colelctor electrode of the first power switch pipe, Second selection end of described second analog switch is connected to the colelctor electrode of the second power switch pipe;3rd mould Intending switch, the fixing end of described 3rd analog switch is as the second input of described PFC on-off circuit Outfan, the first selection end of described 3rd analog switch is connected to sending out of described first power switch pipe Emitter-base bandgap grading, the second selection end of described 3rd analog switch is connected to the transmitting of described second power switch pipe Pole;Wherein, the control end phase controlling end and described second analog switch of described 3rd analog switch Connect, and as the 4th input/output terminal of described PFC on-off circuit;Described first power switch pipe Grid be connected with the grid of described second power switch pipe, and as described PFC on-off circuit First input/output terminal.

Wherein, the first power switch pipe and the second power switch pipe can be IGBT.

According to an embodiment of the present utility model, also include: boostrap circuit, described boostrap circuit bag Including: the first bootstrap diode, the anode of described first bootstrap diode is connected to described intelligent power mould The low-pressure area power supply anode of block, the negative electrode of described first bootstrap diode is connected to described intelligence merit The U phase higher-pressure region power supply anode of rate module;Second bootstrap diode, described second bootstrapping two poles The anode of pipe is connected to the low-pressure area power supply anode of described SPM, described second bootstrapping The negative electrode of diode is connected to the V phase higher-pressure region power supply anode of described SPM;3rd Bootstrap diode, the anode of described 3rd bootstrap diode is connected to the low pressure of described SPM District's power supply anode, the negative electrode of described 3rd bootstrap diode is connected to described SPM W phase higher-pressure region power supply anode.

According to an embodiment of the present utility model, also include: bridge arm circuit on three-phase, described three-phase In each phase in upper bridge arm circuit, the input of bridge arm circuit is connected to the three-phase height of described HVIC pipe The signal output part of corresponding phase in nip;Bridge arm circuit under three-phase, under described three-phase in bridge arm circuit Corresponding phase during the input of bridge arm circuit is connected to the three-phase low-voltage district of described HVIC pipe under each phase Signal output part.

Wherein, on three-phase, bridge arm circuit includes: bridge arm circuit, W in bridge arm circuit, V phase in U phase Go up bridge arm circuit mutually;Under three-phase, bridge arm circuit includes: the lower brachium pontis electricity of the lower bridge arm circuit of U phase, V phase Road, the lower bridge arm circuit of W phase.

According to an embodiment of the present utility model, in described each phase, bridge arm circuit includes: the 3rd merit Rate switching tube and the first diode, the anode of described first diode is connected to described 3rd power switch The emitter stage of pipe, the negative electrode of described first diode is connected to the current collection of described 3rd power switch pipe Pole, the colelctor electrode of described 3rd power switch pipe is connected to the high voltage input of described SPM End, the base stage of described 3rd power switch pipe is as the input of bridge arm circuit in described each phase, institute State the emitter stage of the 3rd power switch pipe to be connected to the higher-pressure region of described SPM correspondence phase and power Power supply negative terminal.Wherein, the 3rd power switch pipe can be IGBT.

According to an embodiment of the present utility model, under described each phase, bridge arm circuit includes: the 4th merit Rate switching tube and the second diode, the anode of described second diode is connected to described 4th power switch The emitter stage of pipe, the negative electrode of described second diode is connected to the current collection of described 4th power switch pipe Pole, the colelctor electrode of described 4th power switch pipe is connected to described first in the upper bridge arm circuit of correspondence The anode of diode, the base stage of described 4th power switch pipe is as bridge arm circuit under described each phase Input, the emitter stage of described 4th power switch pipe is as the corresponding phase of described SPM Low reference voltage end.Wherein, the 4th power switch pipe can be IGBT.

According to an embodiment of the present utility model, the high voltage input of described SPM Voltage is 300V.

According to an embodiment of the present utility model, each phase higher-pressure region of described SPM supplies Connect between anode and the negative terminal of electricity power supply and have filter capacitor.

Embodiment according to this utility model second aspect, it is also proposed that a kind of air-conditioner, including: as SPM described in any of the above-described embodiment.

Additional aspect of the present utility model and advantage will part be given in the following description, and part will be from Explained below becomes obvious, or recognized by practice of the present utility model.

Accompanying drawing explanation

Above-mentioned and/or additional aspect of the present utility model and advantage are from combining accompanying drawings below to embodiment Description in will be apparent from easy to understand, wherein:

Fig. 1 shows the structural representation of the SPM in correlation technique;

Fig. 2 shows the external circuit schematic diagram of SPM;

Fig. 3 shows that current signal triggers the out-of-work waveform diagram of SPM;

Fig. 4 shows a kind of waveform signal of the noise of the SPM generation in correlation technique Figure;

Fig. 5 shows the another kind of waveform signal of the noise of the SPM generation in correlation technique Figure;

Fig. 6 shows the structural representation of the SPM according to embodiment of the present utility model;

Fig. 7 shows the internal structure signal of the adaptive circuit according to embodiment of the present utility model Figure;

Fig. 8 shows that the internal structure of the PFC on-off circuit according to embodiment of the present utility model is shown It is intended to.

Detailed description of the invention

In order to be more clearly understood that above-mentioned purpose of the present utility model, feature and advantage, knot below Close the drawings and specific embodiments this utility model is further described in detail.Need explanation It is that, in the case of not conflicting, the feature in embodiments herein and embodiment can mutual group Close.

Elaborate a lot of detail in the following description so that fully understanding this utility model, but It is that this utility model can be implemented to use other to be different from other modes described here, because of This, protection domain of the present utility model is not limited by following public specific embodiment.

Fig. 6 shows the structural representation of the SPM according to embodiment of the present utility model.

As shown in Figure 6, according to the SPM of embodiment of the present utility model, including: HVIC pipe 1101 and adaptive circuit 1105.

The VCC end of HVIC pipe 1101 as SPM 1100 low-pressure area power supply just End VDD, VDD are generally 15V;

Inside HVIC pipe 1101:

ITRIP end connects the input of adaptive circuit 1105;VCC end connects adaptive circuit The power supply anode of 1105;GND end connects the power supply negative terminal of adaptive circuit 1105;From First outfan of adaptive circuit 1105 is designated as ICON, be used for controlling HIN1~HIN3, LIN1~LIN3, the effectiveness of PFCINP signal;Second outfan of adaptive circuit 1105 connects PFCC end to HVIC pipe 1101.

HVIC pipe 1101 is internal also has boostrap circuit structure as follows:

VCC end and bootstrap diode 1102, bootstrap diode 1103, bootstrap diode 1104 Anode is connected;The negative electrode of bootstrap diode 1102 is connected with the VB1 of HVIC pipe 1101;Bootstrapping The negative electrode of diode 1103 is connected with the VB2 of HVIC pipe 1101;The moon of bootstrap diode 1104 Pole is connected with the VB3 of HVIC pipe 1101.

In the U phase that HIN1 end is SPM 1100 of HVIC pipe 1101, brachium pontis signal is defeated Enter to hold UHIN;Bridge in the V phase that HIN2 end is SPM 1100 of HVIC pipe 1101 Arm signal input part VHIN;The HIN3 end of HVIC pipe 1101 is SPM 1100 Brachium pontis signal input part WHIN in W phase;The LIN1 end of HVIC pipe 1101 is SPM The lower brachium pontis signal input part ULIN of the U phase of 1100;The LIN2 end of HVIC pipe 1101 is intelligence merit The lower brachium pontis signal input part VLIN of the V phase of rate module 1100;The LIN3 end of HVIC pipe 1101 is The lower brachium pontis signal input part WLIN of the W phase of SPM 1100;HVIC pipe 1101 ITRIP end is the MTRIP end of SPM 1100;The PFCINP end of HVIC pipe 1101 PFC as SPM 100 controls input PFCIN;The GND of HVIC pipe 1101 Hold the low-pressure area power supply negative terminal COM as SPM 1100.Wherein, intelligent power Module 1100 UHIN, VHIN, WHIN, ULIN, VLIN, WLIN six tunnel input and PFCIN end receives the input signal of 0V or 5V.

The VB1 end of HVIC pipe 1101 connects one end of electric capacity 1131, and as SPM The U phase higher-pressure region power supply anode UVB of 1100;The HO1 end of HVIC pipe 1101 and U phase The grid of upper brachium pontis IGBT pipe 1121 is connected;The VS1 end of HVIC pipe 1101 is managed with IGBT The colelctor electrode of the lower brachium pontis IGBT pipe 1124 of the emitter-base bandgap grading of 1121, the anode of FRD pipe 1111, U phase, The negative electrode of FRD pipe 1114, the other end of electric capacity 1131 are connected, and as SPM The U phase higher-pressure region power supply negative terminal UVS of 1100.

The VB2 end of HVIC pipe 1101 connects one end of electric capacity 1132, and as SPM The V phase higher-pressure region power supply anode VVB of 1100;The HO2 end of HVIC pipe 1101 and V phase The grid of upper brachium pontis IGBT pipe 1123 is connected;The VS2 end of HVIC pipe 1101 is managed with IGBT The colelctor electrode of the lower brachium pontis IGBT pipe 1125 of the emitter-base bandgap grading of 1122, the anode of FRD pipe 1112, V phase, The negative electrode of FRD pipe 1115, the other end of electric capacity 1132 are connected, and as SPM The V phase higher-pressure region power supply negative terminal VVS of 1100.

The VB3 end of HVIC pipe 1101 connects one end of electric capacity 1133, as SPM The W phase higher-pressure region power supply anode WVB of 1100;The HO3 end of HVIC pipe 1101 and W The grid going up brachium pontis IGBT pipe 1123 mutually is connected;The VS3 end of HVIC pipe 1101 is managed with IGBT The current collection of the lower brachium pontis IGBT pipe 1126 of the emitter-base bandgap grading of 1123, the anode of FRD pipe 1113, W phase Pole, the negative electrode of FRD pipe 1116, the other end of electric capacity 1133 are connected, and as SPM The W phase higher-pressure region power supply negative terminal WVS of 1100.

The LO1 end of HVIC pipe 1101 is connected with the grid of IGBT pipe 1124;HVIC pipe 1101 LO2 end be connected with the grid of IGBT pipe 1125;The LO3 end of HVIC pipe 1101 and IGBT The grid of pipe 1126 is connected;The emitter-base bandgap grading of IGBT pipe 1124 is connected with the anode of FRD pipe 1114, And as the U phase low reference voltage end UN of SPM 1100;Penetrating of IGBT pipe 1125 Pole is connected with the anode of FRD pipe 1115, and as the V phase low-voltage of SPM 1100 Reference edge VN;The emitter-base bandgap grading of IGBT pipe 1126 is connected with the anode of FRD pipe 1116, and as intelligence The W phase low reference voltage end WN of energy power model 1100.

VDD is HVIC pipe 1101 power supply anode, and GND is the power supply of HVIC pipe 1101 Power supply negative terminal;VDD-GND voltage is generally 15V;VB1 and VS1 is respectively U phase higher-pressure region The positive pole of power supply and negative pole, HO1 is the outfan of U phase higher-pressure region;VB2 and VS2 is respectively The positive pole of the power supply of V phase higher-pressure region and negative pole, HO2 is the outfan of V phase higher-pressure region;VB3 and VS3 is respectively positive pole and the negative pole of the power supply of U phase higher-pressure region, and HO3 is the output of W phase higher-pressure region End;LO1, LO2, LO3 are respectively U phase, V phase, the outfan of W phase low-pressure area.

The PFCO end of HVIC pipe 1101 is PFC drive circuit outfan, with PFC on-off circuit First input/output terminal of 1127 is connected;Second input/output terminal of PFC on-off circuit 1127 with The anode of FRD pipe 1117 is connected, and as the PFC low reference voltage of SPM 1100 End-VP;3rd input/output terminal of PFC on-off circuit 1127 and the negative electrode of FRD pipe 1117, The anode of FRD pipe 1141 is connected, and as the PFC end of SPM 1100, HVIC manages The PFCC end of 1101 connects the 4th input/output terminal of PFC on-off circuit 1127.PFC switchs electricity The power supply anode on road 1127 is connected with VCC, and the power supply of PFC on-off circuit 1127 is born End is connected with COM.

The negative electrode of FRD pipe 1141, the colelctor electrode of IGBT pipe 1121, the moon of FRD pipe 1111 Pole, the colelctor electrode of IGBT pipe 1122, the negative electrode of FRD pipe 1112, the current collection of IGBT pipe 1123 Pole, the negative electrode of FRD pipe 1113 are connected, and as the high voltage input of SPM 1100 P, P typically meet 300V.

The effect of HVIC pipe 1101 is:

When ICON is high level, by the 0 or 5V of input HIN1, HIN2, HIN3 patrol Collect input signal and pass to outfan HO1, HO2, HO3 respectively, by LIN1, LIN2, LIN3 Signal passes to outfan LO1, LO2, LO3 respectively, and the signal of PFCINP is passed to outfan PFCO, wherein HO1 be the logic output signal of VS1 or VS1+15V, HO2 be VS2 or The logic output signal of VS2+15V, HO3 are the logic output signals of VS3 or VS3+15V, LO1, LO2, LO3, PFCO are the logic output signals of 0 or 15V.I.e. export at ICON During high level, HVIC pipe 1101 enables.

When ICON is low level, HO1, HO2, HO3, LO1, LO2, LO3, PFCO All it is set to low level.I.e. when ICON output low level, HVIC pipe 1101 quits work.

The effect of adaptive circuit 1105 is:

When temperature is less than a certain particular temperature value T1, PFCC output low level, and if ITRIP Real time value more than a certain particular voltage level V1, then ICON output low level, otherwise ICON Output high level;When temperature is higher than a certain particular temperature value T1, PFCC exports high level, and And if the real time value of ITRIP is more than a certain particular voltage level V2, then ICON output low level, Otherwise ICON exports high level;Wherein, V2 > V1.

The effect of PFC on-off circuit 1127 is:

When PFCC is low level, PFC on-off circuit 1127 the first input/output terminal, second Input/output terminal, the 3rd input/output terminal show as that a switching speed is very fast and saturation voltage drop is bigger IGBT manages;When PFCC is high level, PFC on-off circuit 1127 the first input/output terminal, Second input/output terminal, the 3rd input/output terminal show as that a switching speed is relatively slow and saturation voltage drop relatively Little IGBT pipe.

In an embodiment of the present utility model, the particular circuit configurations of adaptive circuit 1105 is such as Shown in Fig. 7, particularly as follows:

One termination VCC of resistance 2016;One end of the other end connecting resistance 2013 of resistance 2016 and The negative electrode of Zener diode 2011;Another termination PTC (Positive of resistance 2013 Temperature Coefficient, positive temperature coefficient) one end of resistance 2012, voltage comparator The positive input terminal of 2015;Another termination GND of Zener diode 2011;PTC resistor 2012 Another terminates GND;The anode of the negative input termination voltage source 2014 of voltage comparator 2015;Electricity The negative terminal of potential source 2014 meets GND;The output of voltage comparator 2015 terminates another of not gate 2017 Input;The input of the output termination not gate 2027 of not gate 2017;The outfan of not gate 2027 Connect the control end of analog switch 2022 the second outfan as adaptive circuit 1105, i.e. PFCC end.

ITRIP connects the positive input terminal of voltage comparator 2010, the positive input of voltage comparator 2023 End;The anode of the negative input termination voltage source 2018 of voltage comparator 2010;Voltage source 2018 Negative terminal meets GND;The anode of the negative input termination voltage source 2019 of voltage comparator 2023;Voltage The negative terminal in source 2019 meets GND;The output termination NAND gate 2025 of voltage comparator 2010 is wherein One input and 0 selection end of analog switch 2022;Voltage comparator 2023 output termination with One of them input of not gate 2025;The input of the output termination not gate 2026 of NAND gate 2025 End;1 selection end of the output termination analog switch 2022 of not gate 2026;Analog switch 2022 The input of fixing termination not gate 2020;The outfan of not gate 2020 is as ICON.

In an embodiment of the present utility model, the particular circuit configurations of PFC on-off circuit 1127 As shown in Figure 8, particularly as follows:

PFC on-off circuit 1127 the 4th input/output terminal connect analog switch 2003 control end and The control end of analog switch 2004;The fixing end of analog switch 2003 is PFC on-off circuit 3rd input/output terminal of 1127;The fixing end of analog switch 2004 is PFC on-off circuit Second input/output terminal of 1127;The collection of 1 selection termination IGBT pipe 2001 of analog switch 2003 Electrode;The colelctor electrode of 0 selection termination IGBT pipe 2002 of analog switch 2003;Analog switch The emitter-base bandgap grading of the 1 selection termination IGBT pipe 2001 of 2004;0 selection termination of analog switch 2004 The emitter-base bandgap grading of IGBT pipe 2002;First input and output termination IGBT pipe of PFC on-off circuit 1127 The grid of 2001 and the grid of IGBT pipe 2002.

The operation principle of following description above-described embodiment and key parameter value:

The clamp voltage design of Zener diode 2011 is 6.4V, and resistance 2016 is designed as 20k Ω, Then produce the stable 6.4V voltage not affected with VCC voltage pulsation at B point;PTC electricity Resistance 2012 is designed as 10k Ω when 25 DEG C, 20k Ω when 100 DEG C, and resistance 2013 is designed as 44k Ω, electricity Potential source 2014 is designed as 2V, then below 100 DEG C, and voltage comparator 2015 output low level, More than 100 DEG C, voltage comparator 2015 exports high level.

Thus and if only if temperature more than 100 DEG C time, not gate 2027 exports high level, otherwise not gate 2027 output low levels.

Voltage source 2018 is designed as 0.5V, and voltage source 2019 is designed as 0.6V.When not gate 2027 is defeated When going out low level, the voltage ratio of the voltage of ITRIP and voltage source 2018 relatively, when ITIRP electricity Pressure > 0.5V time, voltage comparator 2010 export high level and make ICON produce low level make module Quit work;Further, now the first input/output terminal of PFC on-off circuit 1127 is managed with PFC The negative electrode of 2002 is connected, the second input/output terminal of PFC on-off circuit 1127 and PFC pipe 2002 Anode be connected.

When not gate 2027 exports high level, ITRIP simultaneously with the voltage ratio of 0.5V, 0.6V relatively, Because voltage is being incremented by, the voltage of ITRIP reaches 0.5V, needs persistently to rise a period of time and just can reach To 0.6V, therefore, though the voltage of ITRIP > 0.5V, also to continue for some time and just can make voltage Comparator 2010, voltage comparator 2023 all export high level makes NAND gate 2025 export low electricity Flat, this persistent period is depending on the rate of rise of ITRIP;Further, now PFC on-off circuit First input/output terminal of 1127 is connected with the negative electrode of PFC pipe 2001, PFC on-off circuit 1127 The second input/output terminal be connected with the anode of PFC pipe 2001.

4 times of the minimum dimension that NAND gate 2025 and not gate 2026 taking technique allow, can produce The time delay of 60~100ns, thus add the ICON response time to ITRIP.

Under same process, by the regulation mode such as dopant concentration, regulation IGBT pipe switching speed and The relation of saturation voltage drop, it is thus achieved that IGBT pipe 2001 and IGBT pipe 2002, IGBT pipe 2001 selects Selecting switching speed to manage compared with slow but that saturation voltage drop is relatively low IGBT, IGBT pipe 2002 selects switching speed Very fast but that saturation voltage drop is higher IGBT manages.Usually, the service time (electricity of IGBT pipe 2001 Stream rises, voltage falling time) select hundred nanosecond rank, service time of IGBT pipe 2002 (electricity Stream rise, voltage falling time) select ten nanosecond rank.

From the technical scheme of above-described embodiment, the SPM that the utility model proposes is with existing Row SPM is completely compatible, can directly be replaced with existing SPM.In temperature When spending relatively low, ITRIP and a relatively low voltage ratio are relatively, it is ensured that to SPM overcurrent protection Susceptiveness, when temperature is higher, ITRIP and a higher voltage ratio relatively, take into account intelligent power The stability of module work;Further, when temperature is relatively low, pfc circuit uses switching speed faster IGBT pipe obtains lower dynamic power consumption, and when temperature is higher, PFC uses saturation voltage drop lower IGBT pipe obtains lower quiescent dissipation and reduce further circuit noise;So that this practicality Novel SPM, on the premise of normal protective mechanisms persistently comes into force, maintains the steady of system Qualitative, improve the user satisfaction of product, reduce product and complain.

The technical solution of the utility model is described in detail above in association with accompanying drawing, the utility model proposes A kind of new SPM, it can be ensured that SPM low-power consumption at normal temperatures normally works On the premise of, effectively reduce SPM at high temperature by the probability of false triggering.

The foregoing is only preferred embodiment of the present utility model, be not limited to this practicality new Type, for a person skilled in the art, this utility model can have various modifications and variations.All Within spirit of the present utility model and principle, any modification, equivalent substitution and improvement etc. made, Within should be included in protection domain of the present utility model.

Claims (10)

1. a SPM, it is characterised in that including:
Brachium pontis signal input part, three-phase low reference voltage under brachium pontis signal input part, three-phase on three-phase End, current detecting end, PFC end and PFC low reference voltage end;
HVIC manages, and described HVIC pipe is provided with to be respectively connecting to brachium pontis signal on described three-phase defeated Enter the terminals of brachium pontis signal input part under end and described three-phase, and be connected to described current detecting end The first port, described HVIC pipe is additionally provided with the signal output part of PFC drive circuit;
Adaptive circuit, the input of described adaptive circuit is connected to described first port, described from First outfan of adaptive circuit is as the Enable Pin of described HVIC pipe;
PFC on-off circuit, the first input/output terminal of described PFC on-off circuit, second input defeated Go out end, the 3rd input/output terminal and the 4th input/output terminal are connected respectively to described PFC and drive The signal output part of circuit, described PFC low reference voltage end, described PFC end and described self adaptation Second outfan of circuit;
Wherein, the level signal that described PFC on-off circuit inputs according to its 4th input/output terminal, Realize the function with the power switch pipe of the first switching speed and the first saturation voltage drop, or realization has The function of the power switch pipe of second switch speed and the second saturation voltage drop, described first switching speed is big In described second switch speed, described first saturation voltage drop is more than described second saturation voltage drop;Described from Adaptive circuit, when the temperature of described SPM is less than predetermined temperature value, second is exported by it The signal of end output the first level, and according to the value and the first setting value of the input signal of its input it Between magnitude relationship by its first outfan export corresponding level enable signal;Described self adaptation electricity Road is when the temperature of described SPM is higher than described predetermined temperature value, by its second outfan The signal of output second electrical level, and according between value and second setting value of the input signal of its input Magnitude relationship by its first outfan export corresponding level enable signal, described second setting value More than described first setting value.
SPM the most according to claim 1, it is characterised in that:
Described adaptive circuit described SPM temperature less than described predetermined temperature value time, If the value of the input signal of its input is more than or equal to described first setting value, then first defeated by it Go out end and export the enable signal of described first level, to forbid that described HVIC pipe works;Otherwise, logical Cross its first outfan and export the enable signal of described second electrical level, to allow described HVIC plumber Make;
Described adaptive circuit described SPM temperature higher than described predetermined temperature value time, If the value of the input signal of its input is more than or equal to described second setting value, then first defeated by it Go out end and export the enable signal of described first level;Otherwise, by its first outfan output described the The enable signal of two level.
SPM the most according to claim 1, it is characterised in that described self adaptation Circuit includes:
First resistance, the first end of described first resistance is connected to the power supply of described adaptive circuit Positive pole, the second end of described first resistance is connected to the negative electrode of Zener diode, described Zener diode Anode be connected to the power supply negative pole of described adaptive circuit, the power supply electricity of described adaptive circuit Source positive pole and negative pole are respectively connecting to the low-pressure area power supply anode of described SPM and bear End;
Second resistance, the first end of described second resistance is connected to the second end of described first resistance, institute The second end stating the second resistance is connected to the positive input terminal of the first voltage comparator;
Critesistor, the first end of described critesistor is connected to the second end of described second resistance, institute The second end stating critesistor is connected to the anode of described Zener diode;
First voltage source, the negative pole of described first voltage source is connected to the anode of described Zener diode, The positive pole of described first voltage source is connected to the negative input end of described first voltage comparator, and described first The outfan of voltage comparator is connected to the input of the first not gate, and the outfan of described first not gate is even Being connected to the input of the second not gate, the outfan of described second not gate is as the of described adaptive circuit Two outfans.
SPM the most according to claim 3, it is characterised in that described self adaptation Circuit also includes:
First analog switch, the end that controls of described first analog switch is connected to the defeated of described second not gate Go out end;
Second voltage comparator, the positive input terminal of described second voltage comparator is as described self adaptation electricity The input on road, the negative input end of described second voltage comparator is connected to the positive pole of the second voltage source, The negative pole of described second voltage source is connected to the power supply negative pole of described adaptive circuit, and described second The outfan of voltage comparator is connected to the first selection end and the first NAND gate of described first analog switch First input end;
Tertiary voltage comparator, the positive input terminal of described tertiary voltage comparator is connected to described second electricity The positive input terminal of pressure comparator, the negative input end of described tertiary voltage comparator is connected to tertiary voltage source Positive pole, the negative pole in described tertiary voltage source is connected to the power supply negative pole of described adaptive circuit, The outfan of described tertiary voltage comparator is connected to the second input of described first NAND gate, described The outfan of the first NAND gate is connected to the input of the 3rd not gate, and the outfan of described 3rd not gate is even Being connected to the second selection end of described first analog switch, the fixing end of described first analog switch is connected to The input of the 4th not gate, the outfan of described 4th not gate is first defeated as described adaptive circuit Go out end.
SPM the most according to claim 1, it is characterised in that:
Described PFC on-off circuit inputs the signal of described first level at its 4th input/output terminal Time, it is achieved there is the merit of the power switch pipe of described first switching speed and described first saturation voltage drop Energy;
Described PFC on-off circuit inputs the signal of described second electrical level at its 4th input/output terminal Time, it is achieved there is the merit of the power switch pipe of described second switch speed and described second saturation voltage drop Energy.
SPM the most according to claim 1, it is characterised in that described PFC opens Pass circuit includes:
Second analog switch, the fixing end of described second analog switch is as described PFC on-off circuit The 3rd input/output terminal, described second analog switch first selection end be connected to the first power switch The colelctor electrode of pipe, the second selection end of described second analog switch is connected to the collection of the second power switch pipe Electrode;
3rd analog switch, the fixing end of described 3rd analog switch is as described PFC on-off circuit The second input/output terminal, described 3rd analog switch first selection end be connected to described first power The emitter stage of switching tube, the second selection end of described 3rd analog switch is connected to described second power and opens Close the emitter stage of pipe;
Wherein, the control end phase controlling end and described second analog switch of described 3rd analog switch Connect, and as the 4th input/output terminal of described PFC on-off circuit;Described first power switch pipe Grid be connected with the grid of described second power switch pipe, and as described PFC on-off circuit First input/output terminal.
SPM the most according to any one of claim 1 to 6, its feature exists In, also include:
Bridge arm circuit on three-phase, the input of bridge arm circuit in each phase in bridge arm circuit on described three-phase End is connected to the signal output part of corresponding phase in the three-phase high-voltage district of described HVIC pipe;
Bridge arm circuit under three-phase, the input of bridge arm circuit under each phase in bridge arm circuit under described three-phase End is connected to the signal output part of corresponding phase in the three-phase low-voltage district of described HVIC pipe.
SPM the most according to claim 7, it is characterised in that described each phase Upper bridge arm circuit includes:
3rd power switch pipe and the first diode, the anode of described first diode is connected to described The emitter stage of three power switch pipes, the negative electrode of described first diode is connected to described 3rd power switch The colelctor electrode of pipe, the colelctor electrode of described 3rd power switch pipe is connected to the height of described SPM Voltage input end, the base stage of described 3rd power switch pipe is as bridge arm circuit defeated in described each phase Entering end, the emitter stage of described 3rd power switch pipe is connected to the height of described SPM correspondence phase Nip power supply negative terminal.
SPM the most according to claim 8, it is characterised in that described each phase Lower bridge arm circuit includes:
4th power switch pipe and the second diode, the anode of described second diode is connected to described The emitter stage of four power switch pipes, the negative electrode of described second diode is connected to described 4th power switch The colelctor electrode of pipe, the colelctor electrode of described 4th power switch pipe is connected in the upper bridge arm circuit of correspondence The anode of described first diode, the base stage of described 4th power switch pipe is as bridge under described each phase The input of arm circuit, the emitter stage of described 4th power switch pipe is as described SPM The low reference voltage end of corresponding phase.
10. an air-conditioner, it is characterised in that including: institute as any one of claim 1 to 9 The SPM stated.
CN201620513449.2U 2016-05-30 2016-05-30 SPM and air-conditioner CN205792205U (en)

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Application Number Priority Date Filing Date Title
CN201620513449.2U CN205792205U (en) 2016-05-30 2016-05-30 SPM and air-conditioner

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201620513449.2U CN205792205U (en) 2016-05-30 2016-05-30 SPM and air-conditioner
PCT/CN2016/097737 WO2017206385A1 (en) 2016-05-30 2016-08-31 Intelligent power module and air conditioner

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Publication Number Publication Date
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105871182A (en) * 2016-05-30 2016-08-17 广东美的制冷设备有限公司 Intelligent power module (IPM) and air conditioner

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105871182A (en) * 2016-05-30 2016-08-17 广东美的制冷设备有限公司 Intelligent power module (IPM) and air conditioner

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