CN205789112U - Circuit board and apply the memorizer of this circuit board - Google Patents
Circuit board and apply the memorizer of this circuit board Download PDFInfo
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- CN205789112U CN205789112U CN201620085300.9U CN201620085300U CN205789112U CN 205789112 U CN205789112 U CN 205789112U CN 201620085300 U CN201620085300 U CN 201620085300U CN 205789112 U CN205789112 U CN 205789112U
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- heat dissipating
- circuit board
- dissipating layer
- memorizer
- radiating
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Abstract
This utility model provides a kind of circuit board and applies the memorizer of this circuit board.Described circuit board, including parallel relative first surface and second surface, described first surface and second surface are connected by side surface, described circuit board also includes the first heat dissipating layer being located at first surface and is located at the second heat dissipating layer of second surface, and described first heat dissipating layer and the second heat dissipating layer include some louvres.By described heat dissipating layer and louvre, the heat in circuit board can discharge rapidly to reduce circuit board temperature.This utility model also provides for the memorizer of a kind of this circuit board of application.
Description
Technical field
This utility model relates to a kind of circuit board, further relates to the memorizer of a kind of this circuit board of application.
Background technology
The radiating efficiency of existing PCB internal layer is the most relatively low.As a example by memory bar, the internal memory when memory bar high-frequency operation
In bar PCB, amount of heat is assembled and cannot be discharged rapidly, and memory bar temperature can rise rapidly.When memory bar temperature rises to marginal value
Time, memory bar will be unable to continue to high-frequency operation state.
Utility model content
In consideration of it, be necessary provide a kind of circuit board providing heat radiation rapidly and apply the memorizer of this circuit board.
A kind of circuit board is logical including parallel relative first surface and second surface, described first surface and second surface
Crossing side surface to connect, described circuit board also includes the first heat dissipating layer being located at first surface and is located at the second heat radiation of second surface
Layer, described first heat dissipating layer and the second heat dissipating layer include some louvres.
Preferably, described first surface includes the first radiating area and the first components and parts district, and described first heat dissipating layer is located at institute
State the first radiating area.
Preferably, it is provided with the first isolation channel between described first radiating area and the first components and parts district.
Preferably, described first heat dissipating layer is Copper Foil, when described circuit board is etched, residing for described first heat dissipating layer
Region Copper Foil is not etched described first heat dissipating layer of formation.
Preferably, described some louvres include at least one through hole.
A kind of memorizer, including a circuit board and some storage chips, described circuit board includes parallel the first relative table
Face and second surface, described first surface and second surface connected by side surface, and described circuit board also includes being located at the first table
First heat dissipating layer in face and be located at the second heat dissipating layer of second surface, described first heat dissipating layer and the second heat dissipating layer include some dissipating
Hot hole.
Preferably, described memorizer includes some radiating ends, if the pin correspondence of described some storage chips connects described
Dry radiating end.
Preferably, described first surface includes that the first isolation channel, described first heat dissipating layer are arranged at described first isolation channel
The second side, described some radiating ends are arranged at the first side of described first isolation channel, described some radiating ends and described first
The distance of isolation channel is not more than the first predeterminable range.
Preferably, described memorizer includes a radiator and an interface, and described interface is positioned at the first end of described memorizer,
Described radiator is for being removably socketed on the second end of described memorizer.
Preferably, described radiator is close to be connected to described some storage chips, described first heat dissipating layer and described second
Heat dissipating layer.
By described heat dissipating layer and louvre, the heat in circuit board can discharge rapidly to reduce circuit board temperature.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the better embodiment of this utility model circuit board.
Fig. 2 is the sectional view of the better embodiment of circuit board described in Fig. 1.
Fig. 3 is the schematic diagram of the better embodiment of this utility model memorizer.
Fig. 4 is another schematic diagram of the better embodiment of this utility model memorizer.
Fig. 5 is the partial schematic diagram of another better embodiment of this utility model memorizer.
Main element symbol description
Following detailed description of the invention will further illustrate this utility model in conjunction with above-mentioned accompanying drawing.
Detailed description of the invention
Refer to Fig. 1 and Fig. 2, in the better embodiment of this utility model circuit board 100, described circuit board 100 includes
Parallel relative first surface 11 and second surface 12, described first surface 11 and second surface 12 are connected by side surface 13.
Described circuit board 100 also includes the first heat dissipating layer 110 being located at first surface 11 and is located at the second heat dissipating layer of second surface 12
120.Described first heat dissipating layer 110 includes some louvres 21.Described second heat dissipating layer 120 includes some louvres.
In present embodiment, the first surface 11 of described circuit board 100 includes the first radiating area 31 and the first components and parts district
41.It is provided with the first isolation channel 51 between described first radiating area 31 and the first components and parts district 41.Described first heat dissipating layer 110 is located at
Described first radiating area 31.
In present embodiment, the second surface 12 of described circuit board 100 includes the second radiating area 32 (not shown) and second
Components and parts district 42 (not shown).It is provided with the second isolation channel 52 between described second radiating area 32 and the second components and parts district 42.Described
Second heat dissipating layer 120 is located at described second radiating area 32.Owing to the most described second surface 12 is with described first
Surface 11 is symmetrically designed, and the 32, second components and parts district, described second radiating area 42 and the second isolation channel 52 are not shown.
In other embodiments, described first heat dissipating layer 110 can be located at described circuit board 100 in irregularly shaped
On described first surface 11, such as around the first each pad in components and parts district 41, without being confined to the first radiating area 31.Similar
Ground, described second heat dissipating layer 120 can be on the irregularly shaped described second surface 12 being located at described circuit board 100, such as
Around each pad in the second components and parts district 42, without being confined to the second radiating area 32.
In other embodiments, described first heat dissipating layer 110 can be asymmetric setting with described second heat dissipating layer 120
Meter.
In present embodiment, described first isolation channel 51 and the second isolation channel 52 are used for preventing heat dissipating layer and contact pads.
Fig. 2 is the schematic cross-section of this utility model circuit board 100.In present embodiment, described circuit board 100 includes
One layer 61, the second layer 62 and intermediate layer 60.
In present embodiment, described ground floor 61 is copper foil layer, and the described second layer 62 is substrate layer, and described intermediate layer 60 is
Theca interna.Described intermediate layer 60 can be made up of the material such as resin, epoxy glass fiber.
In present embodiment, described some louvres 21 are through hole.Described some louvres 21 sequentially pass through described
One heat dissipating layer 110, described ground floor 61, described intermediate layer 60, the described second layer 62 and described second heat dissipating layer 120.
In other embodiments, described first heat dissipating layer 110 is Copper Foil, when circuit board Copper Foil is etched, and described
Region Copper Foil residing for one heat dissipating layer 110 is not etched described first heat dissipating layer 110 of formation, and described first heat dissipating layer 110 is with described
The cabling in the first components and parts district 41 is split by described first isolation channel 51, to avoid signal disturbing.Similarly, described
Second heat dissipating layer 120 can be etched by copper foil layer and formed, described second heat dissipating layer 120 and described second components and parts district 42 it
Cabling is split by described second isolation channel 52, to avoid signal disturbing.
Correspondingly, if described first heat dissipating layer 110 and the second heat dissipating layer 120 are not etched by copper foil layer formed, described
One heat dissipating layer 110 and the second heat dissipating layer 120 can apply to the internal layer of multilayer circuit board.
In present embodiment, it is attached that the cabling in described first components and parts district 41 all has one end to be positioned at described first isolation channel 51
Closely.Similarly, the cabling in described second components and parts district 42 all has one end to be positioned near described second isolation channel 52.
In other embodiments, described some louvres 21 can be inoculated with special metal with assist heat radiation, described specific
Metal includes but not limited to copper.
In other embodiments, described some louvres 21 can be partly through hole, and part is that perforate is to ad-hoc location.
Described some louvres 21 also can all perforate to ad-hoc location, whole perforates to intermediate layer 60 not through as described in intermediate layer
60。
Refer to Fig. 3 and Fig. 4, this utility model memorizer 200 includes a multilayer circuit board and some storage chips 71.Institute
State multilayer circuit board described in a kind of better embodiment of multilayer circuit board and include described circuit board 100.Described memorizer 200
Also include interface 81 and a radiator 300.Described interface 81 is positioned at the first end of described memorizer 200.
In present embodiment, described radiator 300 is removably socketed on the second end of described memorizer 200.When described
When radiator 300 is socketed on the second end of described memorizer 200, described radiator 300 is close to be connected to described some storage cores
Sheet 71, described first heat dissipating layer 110 and described second heat dissipating layer 120.Described radiator 300 for for the first heat dissipating layer 110,
Described second heat dissipating layer 120 and described some storage chips 71 dispel the heat.
In present embodiment, the first end of described memorizer 200 holds row level with both hands with the second of described memorizer 200.
In other embodiments, described radiator 300 can also be socketed on the 3rd end of described memorizer 200.Described
3rd end of memorizer 200 is vertical with the first end of described memorizer 200.
In other embodiments, described radiator 300 can also be welded in described first heat dissipating layer 110 or the second heat radiation
On layer 120.
Described radiator 300 can by metal material or other have thermal conductive resin material and make.In present embodiment, institute
The making material stating radiator 300 is aluminum.
In present embodiment, described memorizer 200 is a memory bar.Described interface 81 is the first of described circuit board 100
The golden finger that end extends.Described interface 81 is for connecting a memory bank.
Refer to Fig. 5, in another better embodiment of memorizer 200 described in the utility model, described memorizer 200 wraps
Include a multilayer circuit board (not shown) and at least one storage chip 91.Described multilayer circuit board first surface include first every
From groove 51, interface the 81, first heat dissipating layer 110 and radiating end A1-A8.Described first isolation channel 51 is in described first heat dissipating layer
Between 110 and described radiating end A1-A8.Described storage chip 91 includes pin 1-8.The pin 1 of described storage chip 91 connects
Pin 1 in described interface 81.The pin 2 of described storage chip 91 is connected to the pin 2 of described interface 81.Described storage chip
The pin 3 of 91 is connected to the pin 3 of described interface 81.The pin 4 of described storage chip 91 is connected to the pin of described interface 81
4.The pin 5 of described storage chip 91 is connected to the pin 5 of described interface 81.The pin 6 of described storage chip 91 is connected to institute
State the pin 6 of interface 81.The pin 7 of described storage chip 91 is connected to the pin 7 of described interface 81.Described storage chip 91
Pin 8 is connected to the pin 8 of described interface 81.
In present embodiment, the pin 1 of described storage chip 91 is also attached to the radiating end A1 of described memorizer 200.Institute
The pin 2 stating storage chip 91 is also attached to the radiating end A2 of described memorizer 200.The pin 3 of described storage chip 91 also connects
It is connected to the radiating end A3 of described memorizer 200.The pin 4 of described storage chip 91 is also attached to the heat radiation of described memorizer 200
End A4.The pin 5 of described storage chip 91 is also attached to the radiating end A5 of described memorizer 200.Drawing of described storage chip 91
Foot 6 is also attached to the radiating end A6 of described memorizer 200.The pin 7 of described storage chip 91 is also attached to described memorizer 200
Radiating end A7.The pin 8 of described storage chip 91 is also attached to the radiating end A8 of described memorizer 200.
Described radiating end A1-A8 is all close to described first isolation channel 51 and is arranged at the first side of described first isolation channel 51.
Described first heat dissipating layer 110 is arranged at the second side of described first isolation channel 51.Described radiating end A1-A8 is to described first isolation
The distance of groove 51 is not more than the first predeterminable range.In present embodiment, described first predeterminable range is 20 Mills.
In present embodiment, the pin wiring of described storage chip 91 is positioned at described multilayer circuit board unlike signal layer.
In other embodiments, in the pin 1-8 of described storage chip 91, at least one pin is correspondingly connected to described dissipating
Hot junction A1-A8.
In another embodiment, pin 1 and the pin 2 of described storage chip 91 are data pin, described storage chip
The pin 1 of 91 is corresponding connects described radiating end A1, and the pin 2 of described storage chip 91 is corresponding connects described radiating end A2.Described
The pin 4-8 of storage chip 91 is less owing to heat produces and is not connected to radiating end.
In present embodiment, described memorizer 200 also includes some storage chips and some radiating ends.Described some storages
The pin of chip is correspondingly connected to described some radiating ends.
In other embodiments, described memorizer 200 also includes be positioned at described multilayer circuit inner cord some groups
Layer radiating end.In internal layer cabling, each internal layer cabling is all correspondingly connected to described some groups of internal layer radiating ends.
By described first heat dissipating layer 110 and the second heat dissipating layer 120 and described some louvres 21, described circuit board 100
The heat of middle accumulation can discharge rapidly to reduce the temperature of described circuit board 100.Similarly, described memorizer 200 is further
Accelerated the heat velocity of discharge of described circuit board 100 by described radiator 300, described radiator 300 can be also used for described
Dispel the heat on some storage chips 71.
Finally it should be noted that above example only in order to the technical solution of the utility model to be described and unrestricted, although
With reference to preferred embodiment, this utility model is described in detail, it will be understood by those within the art that, can be right
The technical solution of the utility model is modified or equivalent, without deviating from spirit and the model of technical solutions of the utility model
Enclose.
Claims (10)
1. a circuit board, including parallel relative first surface and second surface, described first surface and second surface pass through
Side surface connects, it is characterised in that:
Described circuit board also includes the first heat dissipating layer being located at first surface and is located at the second heat dissipating layer of second surface, described
One heat dissipating layer and the second heat dissipating layer include some louvres.
2. circuit board as claimed in claim 1, it is characterised in that: described first surface includes the first radiating area and first yuan of device
Part district, described first heat dissipating layer is located at described first radiating area.
3. circuit board as claimed in claim 2, it is characterised in that: it is provided with between described first radiating area and the first components and parts district
First isolation channel.
4. circuit board as claimed in claim 1, it is characterised in that: described first heat dissipating layer is Copper Foil, when described circuit board enters
During row etching, region Copper Foil residing for described first heat dissipating layer is not etched described first heat dissipating layer of formation.
5. circuit board as claimed in claim 1, it is characterised in that: described some louvres include at least one through hole.
6. a memorizer, including a circuit board and some storage chips, described circuit board includes parallel relative first surface
And second surface, described first surface and second surface are connected by side surface, it is characterised in that:
Described circuit board also includes the first heat dissipating layer being located at first surface and is located at the second heat dissipating layer of second surface, described
One heat dissipating layer and the second heat dissipating layer include some louvres.
7. memorizer as claimed in claim 6, it is characterised in that: described memorizer includes some radiating ends, described some deposits
The pin correspondence of storage chip connects described some radiating ends.
8. memorizer as claimed in claim 6, it is characterised in that: described first surface includes the first isolation channel, described first
Heat dissipating layer is arranged at the second side of described first isolation channel, and described some radiating ends are arranged at the first of described first isolation channel
Side, described some radiating ends are not more than the first predeterminable range with the distance of described first isolation channel.
9. memorizer as claimed in claim 6, it is characterised in that: described memorizer includes a radiator and an interface, described
Interface is positioned at the first end of described memorizer, and described radiator is for being removably socketed on the second end of described memorizer.
10. memorizer as claimed in claim 9, it is characterised in that: described radiator is close to be connected to described some storage cores
Sheet, described first heat dissipating layer and described second heat dissipating layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620085300.9U CN205789112U (en) | 2016-01-28 | 2016-01-28 | Circuit board and apply the memorizer of this circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620085300.9U CN205789112U (en) | 2016-01-28 | 2016-01-28 | Circuit board and apply the memorizer of this circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205789112U true CN205789112U (en) | 2016-12-07 |
Family
ID=57414524
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620085300.9U Active CN205789112U (en) | 2016-01-28 | 2016-01-28 | Circuit board and apply the memorizer of this circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205789112U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109768017A (en) * | 2019-01-21 | 2019-05-17 | 东莞记忆存储科技有限公司 | A kind of memory card radiator structure and its processing technology |
-
2016
- 2016-01-28 CN CN201620085300.9U patent/CN205789112U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109768017A (en) * | 2019-01-21 | 2019-05-17 | 东莞记忆存储科技有限公司 | A kind of memory card radiator structure and its processing technology |
| CN109768017B (en) * | 2019-01-21 | 2020-04-21 | 东莞记忆存储科技有限公司 | Memory card heat dissipation structure and processing method thereof |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |