CN205428951U - VR is greater than 2600V's square piece formula glass passivation diode chip - Google Patents
VR is greater than 2600V's square piece formula glass passivation diode chip Download PDFInfo
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- CN205428951U CN205428951U CN201620192752.7U CN201620192752U CN205428951U CN 205428951 U CN205428951 U CN 205428951U CN 201620192752 U CN201620192752 U CN 201620192752U CN 205428951 U CN205428951 U CN 205428951U
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Abstract
The utility model discloses a VR is greater than 2600V's square piece formula glass passivation diode chip, including N type substrate, the setting the N+ diffuse layer at the N type substrate back with be located the positive P type diffuse layer of N type substrate, be equipped with the P+ diffuse layer on the P type diffuse layer, be equipped with siO2 oxide film and front positive pole metal electrode on the P+ diffuse layer, N+ diffuse layer bottom surface is equipped with back cathode metal electrode, N type substrate, be equipped with the mesa on P type diffuse layer and the P+ diffuse layer, the two positively biased corner structures of unijunction that positive oblique angle mesa constitutes are distinguished by P type district's positive oblique angle mesa and N type to the mesa, P type district's positive oblique angle mesa and N type district positive oblique angle mesa form first positive oblique angle and the positive oblique angle of second respectively with the PN junction termination barrier layer. This side piece formula glass passivation diode chip adopts twice trench etching, forms the two positive oblique angle mesa structure of unijunction, and increase PN junction termination's depletion width improves surperficial electric field strength, makes the voltage breakdown take place in vivo, and seal pressure is strong.
Description
Technical field
This utility model relates to a kind of technology of semiconductor chips field, specifically a kind of VRSquare piece formula glass passivated diode chip more than 2600V.
Background technology
Wet etching groove forms table top and goes forward side by side the mesa technology technology of oozy glass passivation protection PN junction terminal, is now widely used for a few hectovolt to the diode chip for backlight unit of 1800V and manufactures field.This Technology only need to carry out trench etching just can form the table top of negative bevel structure, has the simple advantage of technique.Apply the diode chip for backlight unit (such as Fig. 1) of this fabrication techniques, its breakdown voltage increases along with the increase of the mesa trench degree of depth, but owing to wet etching belongs to isotropic etch, its knot terminal formed is that negative bevel ties terminal, the depletion width of PN junction terminal is less than internal, causing surface field intensity more than internal, PN junction can first puncture on surface；Owing to surface exists various non-ideal factor, the electric field intensity that surface can bear can be less than preferable PN junction critical breakdown strength, so the proof voltage ability of the diode chip for backlight unit of negative bevel table top knot terminal is difficult to rise to more than 2600V.
Utility model content
For solving above-mentioned technical problem, this utility model provides a kind of VRSquare piece formula glass passivated diode chip more than 2600V, improves the voltage endurance capability of high-voltage diode chip, it is possible to obtain the diode chip for backlight unit breakdown voltage of more than 2600V.
The technical solution adopted in the utility model is: a kind of VRSquare piece formula glass passivated diode chip more than 2600V, including N-type substrate, is arranged on the N at the N-type substrate back side+Diffusion layer and the p type diffused layer being positioned at N-type substrate front, described p type diffused layer is provided with P+Diffusion layer, described P+Diffusion layer is provided with SiO2Oxide-film and front anode metal electrodes, described N+Diffusion layer bottom surface is provided with back side cathodic metal electrode, described N-type substrate, p type diffused layer and P+Diffusion layer is provided with table top, the bottom of described table top and sidewall are provided with glassivation film, described table top is the double orthogonal rake structure of the unijunction being made up of p type island region orthogonal rake table top and N-type region orthogonal rake table top, described p type island region orthogonal rake table top and PN junction terminal depletion layer form the first orthogonal rake, and described N-type region orthogonal rake table top and PN junction terminal depletion layer form the second orthogonal rake.
Described first orthogonal rake is 30 ° to 85 °.
Described second orthogonal rake is 30 ° to 85 °.
Principle of the present utility model is: in the mesa etch stage, utilize the isotropic etch characteristic of wet etching, by Twi-lithography erosion grooves, wherein corrosion makes PN junction terminate on the sidewall that groove is tilted for the first time, second time corrosion is sheltered by the selectivity of photoresist, simply continue to corrode the part of trench of below junction, be formed at the table top being orthogonal rake near PN junction termination both sides.Owing to having the PN junction of orthogonal rake table top knot terminal when applying reversed bias voltage, its depletion layer can be opened up wider in surface so that knot surface field intensity declines, and less than internal electric field intensity, makes to puncture generation in vivo, and then improves the breakdown voltage of PN junction.This technology is applied on square piece formula glassivation high-voltage diode, the breakdown voltage of diode can be obviously improved, be readily available the breakdown voltage of more than 2600V.
The utility model has the advantages that: use twice trench etching, forming the double orthogonal rake mesa structure of unijunction, increase the depletion width of PN junction terminal, improve surface field intensity, make voltage breakdown occur in vivo, voltage endurance capability is strong.
Accompanying drawing explanation
Fig. 1 is the conventional square piece formula glass passivated diode chip vertical structure profile of background technology；
Fig. 2 is square piece formula glass passivated diode chip vertical structure profile of the present utility model；
Fig. 3-Figure 12 is square piece formula glass passivated diode chip manufacture method flow chart of the present utility model；
In figure, 1, N-type substrate, 2, N+ diffusion layer, 3, p type diffused layer, 4, P+ diffusion layer, 5, p type island region orthogonal rake table top, 6, N-type region orthogonal rake table top, 7, glassivation film, 8, SiO2Oxide-film, 9, front anode metal electrodes, 10, back side cathodic metal electrode, 11, PN junction terminal depletion layer.
Detailed description of the invention
With specific embodiment, the technical solution of the utility model is further described below in conjunction with the accompanying drawings, but protection domain of the present utility model is not limited to this.
As shown in Fig. 2 to Figure 12, a kind of VRSquare piece formula glass passivated diode chip more than 2600V, including high resistivity N-type substrate 1, is arranged on the N at N-type substrate 1 back side+Diffusion layer 2 and the p type diffused layer 3 being positioned at N-type substrate 1 front, p type diffused layer 3 is provided with P+Diffusion layer 4, P+Diffusion layer 4 is provided with SiO2Oxide-film 8 and front anode metal electrodes 9, N+Diffusion layer 2 bottom surface is provided with back side cathodic metal electrode 10.
Utilizing conventional wet etch, for the first time after erosion grooves, gash depth is deeper than front junction depth 5-50um, as shown in Figure 5；Carrying out front secondary afterwards and carve trench openings, only the photoresist of position below PN junction termination in removal groove, retains the photoresist of remainder on silicon chip, as shown in Figure 6；The corrosion depth of anticaustic groove is 10-100um, the most just forms the double orthogonal rake table top of unijunction, as shown in Figure 8.
After using twice etch, at p type diffused layer 3 and P+P type island region orthogonal rake table top 5 is formed on diffusion layer 4, N-type substrate 1 is formed N-type region orthogonal rake table top 6, i.e. forming the double orthogonal rake table top of unijunction, the table top near its PN junction termination both sides all acutangulates with the angle of PN junction junction, and the bottom of table top and sidewall are all filled with glassivation film 7.Wherein, p type island region orthogonal rake table top 5 and PN junction terminal depletion layer 11 form the first orthogonal rake θ 1, and angle is 30 ° to 85 °, and N-type region orthogonal rake table top 6 and PN junction terminal depletion layer 11 form the second orthogonal rake θ 2, and angle is 30 ° to 85 °.
Above-mentioned VRThe manufacture method of the square piece formula glass passivated diode chip more than 2600V, comprises the following steps:
1, silicon single crystal flake requires: N-type, ρ=50-60-70-80-90 Ω, silicon single crystal flake thickness t=(300-500) ± 5um；
2, Chemical Corrosion for Silicon Wafer: one side respectively removes 3um-8um；
3, N+ diffusion: pre-deposition: T=1100 ± 20 DEG C, t=4.5 ± 0.2h, R=0.3 ± 0.1 Ω/；
4, front abrasive disc: remove 40 ± 10um；
5, p type island region and the diffusion of P+ district: front side of silicon wafer R=0.8-3.0 Ω/, P district Xj=80 ± 20um after requiring diffusion to complete；
6, sandblasting；
7, oxidation: require oxidated layer thickness=1.0 ± 0.4um, completes the silicon chip longitudinal sectional drawing after oxidation as shown in Figure 3；
8, trench openings is once carved in front: carry out photoetching with carving trench openings version, photoetching complete after silicon chip longitudinal sectional drawing as shown in Figure 4；
9, a trench etching: corrosive liquid proportioning is HF: glacial acetic acid: HNO3=1:1:(4-6), HF be concentration be the solution of 42%, glacial acetic acid (CH3COOH) it is pure, HNO3Be concentration be the solution of 67%, corrosion temperature is 5-10 DEG C.Gash depth D1 is 65-150um, and degree of depth D1 is than the front deep 5-50um of junction depth XJ, corrodes the silicon chip longitudinal sectional drawing of groove as shown in Figure 5；
10, front secondary carves trench openings: by design, the size of adjustment photolithography plate window so that the only photoresist of position below PN junction termination in removal groove, retains the photoresist of remainder on silicon chip, as shown in Figure 6；
11, secondary trench etching: corrosive liquid proportioning is HF: glacial acetic acid: HNO3=1:1:(4-6), HF be concentration be the solution of 42%, glacial acetic acid (CH3COOH) it is pure, HNO3Be concentration be the solution of 67%, corrosion temperature is 5-10 DEG C.This step continues erosion grooves 10-100um, and after completing, gash depth D2 is 100-250um, forms the double orthogonal rake table top of unijunction, as shown in Figure 7, Figure 8；
12, glassivation: use GP350 type glass dust, layer glass film, as shown in Figure 9；
13, lithography fair lead: carry out photoetching, as shown in Figure 10 with carving fairlead version；
14, front evaporation silverskin: require silver film thickness=0.5-2.0um；
15, front anode electrode is anti-carved: carry out photoetching with anti-carving version；
16, alloy: T=500 DEG C ± 20 DEG C, t=0.4h ± 0.1h；
17, back side sandblasting；
18, back side evaporation silverskin: require silver film thickness=0.5-2.0um, as shown in figure 11；
19, chip testing；
20, saw blade: complete the core particles vertical structure profile of saw blade as shown in figure 12；
21, packing chip.
Square piece formula glass passivated diode chip of the present utility model is through twice trench etching, there is the double orthogonal rake mesa structure of unijunction, the depletion width of PN junction terminal is more than internal, surface field intensity is more than internal, voltage breakdown occurs in vivo, thus realize diode chip for backlight unit voltage endurance capability and reach more than 2600V, voltage endurance capability strengthens.
Claims (3)
1. a VRSquare piece formula glass passivated diode chip more than 2600V, including N-type substrate, is arranged on the N at the N-type substrate back side+Diffusion layer and the p type diffused layer being positioned at N-type substrate front, described p type diffused layer is provided with P+Diffusion layer, described P+Diffusion layer is provided with SiO2Oxide-film and front anode metal electrodes, described N+Diffusion layer bottom surface is provided with back side cathodic metal electrode, described N-type substrate, p type diffused layer and P+Diffusion layer is provided with table top, the bottom of described table top and sidewall are provided with glassivation film, it is characterized in that: described table top is the double orthogonal rake structure of the unijunction being made up of p type island region orthogonal rake table top and N-type region orthogonal rake table top, described p type island region orthogonal rake table top and PN junction terminal depletion layer form the first orthogonal rake, and described N-type region orthogonal rake table top and PN junction terminal depletion layer form the second orthogonal rake.
A kind of V the most according to claim 1RSquare piece formula glass passivated diode chip more than 2600V, it is characterised in that: described first orthogonal rake is 30 ° to 85 °.
A kind of V the most according to claim 1RSquare piece formula glass passivated diode chip more than 2600V, it is characterised in that: described second orthogonal rake is 30 ° to 85 °.
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106328718A (en) * | 2016-11-04 | 2017-01-11 | 四川洪芯微科技有限公司 | Mesa diode |
| CN106783576A (en) * | 2016-12-20 | 2017-05-31 | 锦州辽晶电子科技有限公司 | High-voltage semiconductor discrete device chip anticaustic mesa technology |
| CN107331654A (en) * | 2017-08-07 | 2017-11-07 | 捷捷半导体有限公司 | A kind of rectifier bridge device and preparation method thereof |
| CN108365015A (en) * | 2017-12-29 | 2018-08-03 | 济南兰星电子有限公司 | Semiconductor diode chip and preparation method thereof |
| CN108682683A (en) * | 2018-04-09 | 2018-10-19 | 重庆平伟实业股份有限公司 | A kind of pressure eliminant power electronics diode and its production technology |
| CN108807508A (en) * | 2018-07-06 | 2018-11-13 | 安徽钜芯半导体科技有限公司 | A kind of diode chip structure inhibiting secondary snowslide |
| CN109285775A (en) * | 2018-09-13 | 2019-01-29 | 安徽钜芯半导体科技有限公司 | A kind of manufacture craft of avalanche rectifier diode |
| CN109950308A (en) * | 2019-03-20 | 2019-06-28 | 江苏东晨电子科技有限公司 | Hyperbolicity table top thyristor and preparation method thereof |
| CN111341656A (en) * | 2020-03-19 | 2020-06-26 | 常州星海电子股份有限公司 | Full-automatic etching process for photoresist glass chip |
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2016
- 2016-03-14 CN CN201620192752.7U patent/CN205428951U/en active Active
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106328718A (en) * | 2016-11-04 | 2017-01-11 | 四川洪芯微科技有限公司 | Mesa diode |
| CN106783576A (en) * | 2016-12-20 | 2017-05-31 | 锦州辽晶电子科技有限公司 | High-voltage semiconductor discrete device chip anticaustic mesa technology |
| CN106783576B (en) * | 2016-12-20 | 2021-01-26 | 锦州辽晶电子科技有限公司 | Secondary corrosion table-board process for high-voltage-resistance semiconductor discrete device chip |
| CN107331654A (en) * | 2017-08-07 | 2017-11-07 | 捷捷半导体有限公司 | A kind of rectifier bridge device and preparation method thereof |
| CN108365015A (en) * | 2017-12-29 | 2018-08-03 | 济南兰星电子有限公司 | Semiconductor diode chip and preparation method thereof |
| CN108682683A (en) * | 2018-04-09 | 2018-10-19 | 重庆平伟实业股份有限公司 | A kind of pressure eliminant power electronics diode and its production technology |
| CN108807508A (en) * | 2018-07-06 | 2018-11-13 | 安徽钜芯半导体科技有限公司 | A kind of diode chip structure inhibiting secondary snowslide |
| CN109285775A (en) * | 2018-09-13 | 2019-01-29 | 安徽钜芯半导体科技有限公司 | A kind of manufacture craft of avalanche rectifier diode |
| CN109950308A (en) * | 2019-03-20 | 2019-06-28 | 江苏东晨电子科技有限公司 | Hyperbolicity table top thyristor and preparation method thereof |
| CN111341656A (en) * | 2020-03-19 | 2020-06-26 | 常州星海电子股份有限公司 | Full-automatic etching process for photoresist glass chip |
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Effective date of registration: 20200915 Address after: No.6, Jinggangshan Road, Sutong science and Technology Industrial Park, Nantong City, Jiangsu Province, 226000 Patentee after: JIEJIE SEMICONDUCTOR Co.,Ltd. Address before: 226200, No. 8, Xinglong Road, Qidong science and Technology Pioneer Park, Nantong, Jiangsu Patentee before: JIANGSU JIEJIE MICROELECTRONICS Co.,Ltd. |