CN205177827U - Packaging structure for chip - Google Patents
Packaging structure for chip Download PDFInfo
- Publication number
- CN205177827U CN205177827U CN201520978312.XU CN201520978312U CN205177827U CN 205177827 U CN205177827 U CN 205177827U CN 201520978312 U CN201520978312 U CN 201520978312U CN 205177827 U CN205177827 U CN 205177827U
- Authority
- CN
- China
- Prior art keywords
- chip
- circuit board
- shielding conductor
- housing
- encapsulating structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004806 packaging method and process Methods 0.000 title abstract 3
- 239000004020 conductor Substances 0.000 claims description 65
- 238000005452 bending Methods 0.000 claims description 5
- 239000007769 metal material Substances 0.000 claims description 3
- 238000005538 encapsulation Methods 0.000 abstract description 6
- 230000005611 electricity Effects 0.000 abstract 2
- 230000005540 biological transmission Effects 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 230000007613 environmental effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
Description
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520978312.XU CN205177827U (en) | 2015-11-30 | 2015-11-30 | Packaging structure for chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520978312.XU CN205177827U (en) | 2015-11-30 | 2015-11-30 | Packaging structure for chip |
Publications (1)
Publication Number | Publication Date |
---|---|
CN205177827U true CN205177827U (en) | 2016-04-20 |
Family
ID=55741777
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201520978312.XU Active CN205177827U (en) | 2015-11-30 | 2015-11-30 | Packaging structure for chip |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN205177827U (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111312692A (en) * | 2018-12-11 | 2020-06-19 | 创意电子股份有限公司 | Integrated circuit packaging element and carrier plate thereof |
CN111477611A (en) * | 2020-06-28 | 2020-07-31 | 甬矽电子(宁波)股份有限公司 | Electromagnetic shielding structure and manufacturing method thereof |
CN111490034A (en) * | 2019-01-25 | 2020-08-04 | 苏州远创达科技有限公司 | Multi-chip module with high isolation |
CN114300446A (en) * | 2022-03-09 | 2022-04-08 | 甬矽电子(宁波)股份有限公司 | Chip stacking shielding structure and manufacturing method thereof |
-
2015
- 2015-11-30 CN CN201520978312.XU patent/CN205177827U/en active Active
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111312692A (en) * | 2018-12-11 | 2020-06-19 | 创意电子股份有限公司 | Integrated circuit packaging element and carrier plate thereof |
CN111490034A (en) * | 2019-01-25 | 2020-08-04 | 苏州远创达科技有限公司 | Multi-chip module with high isolation |
CN111477611A (en) * | 2020-06-28 | 2020-07-31 | 甬矽电子(宁波)股份有限公司 | Electromagnetic shielding structure and manufacturing method thereof |
CN114300446A (en) * | 2022-03-09 | 2022-04-08 | 甬矽电子(宁波)股份有限公司 | Chip stacking shielding structure and manufacturing method thereof |
CN114300446B (en) * | 2022-03-09 | 2022-07-08 | 甬矽电子(宁波)股份有限公司 | Chip stacking shielding structure and manufacturing method thereof |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee | ||
CP01 | Change in the name or title of a patent holder |
Address after: 261031 Dongfang Road, Weifang high tech Development Zone, Shandong, China, No. 268 Patentee after: Goertek Inc. Address before: 261031 Dongfang Road, Weifang high tech Development Zone, Shandong, China, No. 268 Patentee before: Goertek Inc. |
|
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20191113 Address after: 266104 room 103, 396 Songling Road, Laoshan District, Qingdao, Shandong Province Patentee after: Goer Microelectronics Co., Ltd Address before: 261031 Dongfang Road, Weifang high tech Development Zone, Shandong, China, No. 268 Patentee before: Gore Co., Ltd. |