CN205081770U - Direct current parameter testing device - Google Patents
Direct current parameter testing device Download PDFInfo
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- CN205081770U CN205081770U CN201520759660.8U CN201520759660U CN205081770U CN 205081770 U CN205081770 U CN 205081770U CN 201520759660 U CN201520759660 U CN 201520759660U CN 205081770 U CN205081770 U CN 205081770U
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
Abstract
An embodiment of the utility model provides a direct current parameter testing device, the device is provided with the direct current parameter testing unit that provides direct current parameter testing excitation data for data converter, when direct current parameter testing is carried out to system on chip/SOC integrated digital and analog converter to needs, come to provide direct current parameter testing excitation data to data converter through the direct current parameter testing unit that increases in the system on chip/SOC chip.
Description
Technical field
The utility model relates to system on chip digital to analog converter Testability Design field, particularly relates to a kind of DC parameter test device based on system on chip digital to analog converter.
Background technology
At present, increasing on-chip system chip by integrated digital to analog converter to meet the demand of the functions such as multimedia application.Digital to analog converter in on-chip system chip needed to carry out DC parameter test on automatically testing machine platform before dispatching from the factory, to filter out qualified product.
For the DC parameter test of digital to analog converter on automatically testing machine platform that on-chip system chip is integrated, method of testing traditional at present utilizes the multidiameter option switch of chip internal the data of digital to analog converter to be inputted, the signals such as clock disconnect from the upper level input module of digital to analog converter and are connected to the pin of chip, then automatically testing machine platform is these pin assignments test channel, by these test channel, the excitation of DC parameter test is input on corresponding pin, DC parameter test is carried out in output again by measuring digital to analog converter.
But this traditional method of testing needs for a test channel is distributed in each data of digital to analog converter input position, and such as the digital to analog converter of 8, corresponding data input takies 8 from the test channel of moving tester table.When automatically testing machine platform overall channel number is fixing, take more test channel obviously to reduce automatically testing machine platform build-in test can the number of test chip at one time, the utilance of automatically testing machine platform is reduced, causes the testing cost of chip higher.Especially present along with the demand of high-definition multimedia application and the raising of dac design level, the bit wide of digital to analog converter integrated on sheet from 8 rise to 12,14 even higher, the testing cost problem that this channel allocation causes just becomes more and more outstanding.
Utility model content
In view of this, the utility model embodiment provides a kind of DC parameter test device for solving problems of the prior art.
For achieving the above object, the technical scheme of the utility model embodiment is achieved in that
The utility model embodiment provides a kind of DC parameter test device, and described device comprises:
The digital to analog converter of pending DC parameter test;
For data converter provides the DC parameter test unit of DC parameter test excited data.
In such scheme, described DC parameter test unit comprises:
Producing and exporting DC parameter test encourages the test and excitation of count value to produce counter;
Count value is encouraged to be sent to the input data source selector switch of data input latch by DC parameter test excitation with by the DC parameter test of test and excitation generation counter generation; And
For data converter forwards the data input latch of described DC parameter test excitation and DC parameter test excitation count value.
In such scheme, described DC parameter test unit also comprises:
For data converter provides the clock input source selector switch of clock input signal.
In such scheme, it is the wide counter of multidigit that a bit wide equals the corresponding bit wide of digital to analog converter that described test and excitation produces counter.
In such scheme, the input signal that described test and excitation produces counter comprises reseting input signal and counting clock input signal;
When reseting input signal is effective, test and excitation produces the DC parameter test excitation count value clearing that counter produces; When after reseting input signal release, counting clock input signal often produces and once effectively inputs, and the DC parameter test excitation count value that test and excitation produces counter generation increases corresponding increment size.
In such scheme, described input data source selector switch is the multidigit alternative selector switch that a bit wide equals the corresponding bit wide of digital to analog converter, and described multidigit alternative selector switch comprises an input control signal;
When described input control signal is set to fetch data from testing apparatus, the output that described input data source selector switch produces counter with test and excitation is communicated with, and the input of data input latch is received in output test and excitation being produced counter; When described input control signal is set to the upper level functional module input from digital to analog converter, described input data source selector switch is communicated with the output signal of the upper level functional module of digital to analog converter, the output of upper level functional module is received the input of data input latch.
In such scheme, described clock input source selector switch is the alternative selector switch of 1 bit wide, and the alternative selector switch of described 1 bit wide comprises a clock control signal;
When described clock control signal is set to get clock from testing apparatus, the clock source that described clock input source selector switch and tester table provide is connected; When described clock control signal is set to the upper level functional module input from digital to analog converter, described clock input source selector switch is communicated with the clock output signal of the upper level functional module of digital to analog converter.
The DC parameter test device that the utility model embodiment provides, is provided with the digital to analog converter of pending DC parameter test, and provides the DC parameter test unit of DC parameter test excited data for data converter.Like this, when needs perform DC parameter test to system on chip digital to analog converter, the mode of DC parameter test excited data is provided to data converter by the DC parameter test unit that increases in on-chip system chip, the test channel quantity of engaged test board is compressed in effective realization when the DC parameter test of automatically testing machine platform enterprising line number weighted-voltage D/A converter, and the quantity of required test channel does not increase along with the increase of digital to analog converter bit wide, reduce the testing cost of on-chip system chip, simplify the design complexities of corresponding test motherboard.
Accompanying drawing explanation
Fig. 1 is the composition structural representation of the utility model embodiment DC parameter test device;
Fig. 2 is the composition structural representation of DC parameter test unit described in the utility model embodiment;
Fig. 3 is the concrete composition structural representation of the utility model embodiment DC parameter test device.
Embodiment
In the utility model embodiment, when needs perform DC parameter test to system on chip digital to analog converter, there is provided the method for DC parameter test excited data to replace providing DC parameter test excited data by automatically testing machine platform directly to data converter by the DC parameter test unit that increases in on-chip system chip to data converter, reduce the quantity of the test channel taken when to carry out the DC parameter test of system on chip digital to analog converter on automatically testing machine platform.
Below in conjunction with drawings and the specific embodiments, the utility model is further described in more detail.
Embodiment one
Fig. 1 is the composition structural representation of the utility model embodiment DC parameter test device, and as shown in Figure 1, described device comprises digital to analog converter 10 and the DC parameter test unit 20 of pending DC parameter test; Wherein,
Described DC parameter test unit 20, for providing DC parameter test excited data for data converter 10.
Particularly, when needing to perform DC parameter test to the digital to analog converter 10 of system on chip, DC parameter test excited data is provided by the DC parameter test unit 20 increased in on-chip system chip to data converter 10.Like this, by DC parameter test device described in the utility model embodiment, can replace providing DC parameter test excited data by automatically testing machine platform directly to data converter, reduce the quantity of the test channel taken when to carry out the DC parameter test of system on chip digital to analog converter on automatically testing machine platform.
In one embodiment, as shown in Figure 2, described DC parameter test unit 20 comprises test and excitation generation counter 201, input data source selector switch 202 and data input latch 203; Wherein,
Described test and excitation produces counter 201, for generation of and export DC parameter test excitation count value;
Here, described test and excitation produces counter 201 is the wide counter of multidigit that a bit wide equals the corresponding bit wide of digital to analog converter.
The input signal that described test and excitation produces counter 201 comprises reseting input signal and counting clock input signal; When reseting input signal is effective, test and excitation produces the DC parameter test excitation count value clearing that counter 201 produces; When after reseting input signal release, counting clock input signal often produces and once effectively inputs, and the DC parameter test excitation count value that test and excitation produces counter 201 generation increases corresponding increment size.In actual applications, for the ease of statistics, the usual value of described increment size is 1; Namely counting clock input signal often produces and once effectively inputs, and the DC parameter test excitation count value that test and excitation produces counter 201 generation just adds 1 automatically.
Described input data source selector switch 202, encourages count value to be sent to data input latch 203 for DC parameter test DC parameter test encouraged and produced by test and excitation generation counter 201;
Here, described input data source selector switch 202 is the multidigit alternative selector switch that a bit wide equals the corresponding bit wide of digital to analog converter, and described multidigit alternative selector switch comprises an input control signal; When described input control signal is set to fetch data from testing apparatus, the output that described input data source selector switch 202 produces counter 201 with test and excitation is communicated with, and the input of data input latch 203 is received in output test and excitation being produced counter 201; When described input control signal is set to the upper level functional module input from digital to analog converter 10, described input data source selector switch 202 is communicated with the output signal of the upper level functional module of digital to analog converter 10, the output of upper level functional module is received the input of data input latch 203.
Described data input latch 203, for forwarding described DC parameter test excitation and DC parameter test excitation count value for data converter 10.
In one embodiment, as shown in Figure 2, described DC parameter test unit 20 also comprises clock input source selector switch 204; Wherein,
Described clock input source selector switch 204, for providing clock input signal for data converter 10.
Here, described clock input source selector switch 204 is the alternative selector switch of 1 bit wide, and the alternative selector switch of described 1 bit wide comprises a clock control signal; When described clock control signal is set to get clock from testing apparatus, described clock input source selector switch 204 is connected with the clock source that tester table provides; When described clock control signal is set to the upper level functional module input from digital to analog converter 10, described clock input source selector switch 204 is communicated with the clock output signal of the upper level functional module of digital to analog converter 10.
Embodiment two:
Fig. 3 is the concrete composition structural representation of the utility model embodiment DC parameter test device, as shown in Figure 3, the utility model embodiment DC parameter test device comprises digital to analog converter 31, data input latch 32, input data source selector switch 33, clock input source selector switch 34, test and excitation generation counter 35; The input signal that described test and excitation produces counter 35 comprises reseting input signal 306 and counting clock input signal 307; Wherein,
In DC parameter test process, 308 is driving source selection signal, 309 is the input of test pattern digital to analog converter clock, 310 is the input of functional mode digital to analog converter data stimuli, 311 is that test and excitation produces the output signal of counter 35,312 is functional mode clock input signal, 313 be digital to analog converter 31 electric current export n end, 314 be digital to analog converter 31 electric current export p hold.
Particularly, when when the DC parameter test of the enterprising line number weighted-voltage D/A converter 31 of automatically testing machine platform, driving source is selected signal 308 to be configured to testing apparatus and is got excitation, the output signal 311 that now input data source selector switch 33 and test and excitation produce counter 35 is connected, DC parameter test excitation is sent to data input latch 32, to provide digital input data to digital to analog converter 31, clock input source selector switch 34 is connected with test pattern digital to analog converter clock input 309, described test pattern digital to analog converter clock input 309 is provided by automatically testing machine platform.When the reseting input signal 306 that test and excitation produces in counter 35 is effective, test and excitation produces counter 35 count value and resets; After test and excitation produces reseting input signal 306 release of counter 35, counting clock input signal 307 often produces and once effectively inputs, and the count value that test and excitation produces counter 35 will add 1 automatically.The count value producing counter 35 at test and excitation is increased to the process of maximum from 0, each count value can pass to the data input pin of digital to analog converter 31, thus digital to analog converter 31 electric current export n end 313 and electric current export p end 314 produce meet oblique wave export signal.Described oblique wave exports to be automated and can draw the DC parameter of digital to analog converter 31 after tester table catches measurement.Wherein, counting clock input signal 307 in described test and excitation generation counter 35 and the clock frequency of test pattern digital to analog converter clock input 309 can be different values, and its frequency relation can be configured according to the inversion frequency of the shelving frequency required during DC parameter test and digital to analog converter.
The above; be only embodiment of the present utility model; but protection range of the present utility model is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; change can be expected easily or replace, all should be encompassed within protection range of the present utility model.
Claims (7)
1. a DC parameter test device, is characterized in that, described device comprises:
The digital to analog converter of pending DC parameter test;
For data converter provides the DC parameter test unit of DC parameter test excited data.
2. device according to claim 1, is characterized in that, described DC parameter test unit comprises:
Producing and exporting DC parameter test encourages the test and excitation of count value to produce counter;
Count value is encouraged to be sent to the input data source selector switch of data input latch by DC parameter test excitation with by the DC parameter test of test and excitation generation counter generation; And
For data converter forwards the data input latch of described DC parameter test excitation and DC parameter test excitation count value.
3. device according to claim 2, is characterized in that, described DC parameter test unit also comprises:
For data converter provides the clock input source selector switch of clock input signal.
4. the device according to Claims 2 or 3, is characterized in that, it is the wide counter of multidigit that a bit wide equals the corresponding bit wide of digital to analog converter that described test and excitation produces counter.
5. the device according to Claims 2 or 3, is characterized in that, the input signal that described test and excitation produces counter comprises reseting input signal and counting clock input signal;
When reseting input signal is effective, test and excitation produces the DC parameter test excitation count value clearing that counter produces; When after reseting input signal release, counting clock input signal often produces and once effectively inputs, and the DC parameter test excitation count value that test and excitation produces counter generation increases corresponding increment size.
6. the device according to Claims 2 or 3, is characterized in that, described input data source selector switch is the multidigit alternative selector switch that a bit wide equals the corresponding bit wide of digital to analog converter, and described multidigit alternative selector switch comprises an input control signal;
When described input control signal is set to fetch data from testing apparatus, the output that described input data source selector switch produces counter with test and excitation is communicated with, and the input of data input latch is received in output test and excitation being produced counter; When described input control signal is set to the upper level functional module input from digital to analog converter, described input data source selector switch is communicated with the output signal of the upper level functional module of digital to analog converter, the output of upper level functional module is received the input of data input latch.
7. device according to claim 3, is characterized in that, described clock input source selector switch is the alternative selector switch of 1 bit wide, and the alternative selector switch of described 1 bit wide comprises a clock control signal;
When described clock control signal is set to get clock from testing apparatus, the clock source that described clock input source selector switch and tester table provide is connected; When described clock control signal is set to the upper level functional module input from digital to analog converter, described clock input source selector switch is communicated with the clock output signal of the upper level functional module of digital to analog converter.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520759660.8U CN205081770U (en) | 2015-09-28 | 2015-09-28 | Direct current parameter testing device |
| PCT/CN2016/096257 WO2017054591A1 (en) | 2015-09-28 | 2016-08-22 | Direct current parameter testing device |
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| CN201520759660.8U CN205081770U (en) | 2015-09-28 | 2015-09-28 | Direct current parameter testing device |
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| CN205081770U true CN205081770U (en) | 2016-03-09 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017054591A1 (en) * | 2015-09-28 | 2017-04-06 | 深圳市中兴微电子技术有限公司 | Direct current parameter testing device |
| CN108234039A (en) * | 2017-12-05 | 2018-06-29 | 北京时代民芯科技有限公司 | A kind of direct expansion answering machine baseband processor on piece function self-sensing method and system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101567809A (en) * | 2008-04-25 | 2009-10-28 | 中兴通讯股份有限公司 | Test switching device and test system for clock signal expansion test |
| CN102540050A (en) * | 2010-12-20 | 2012-07-04 | 安凯(广州)微电子技术有限公司 | Method and device for testing chip |
| CN102288895B (en) * | 2011-05-05 | 2013-05-01 | 清华大学 | On-chip auxiliary testing system of delta-sigma analog-digital converter and auxiliary testing method of same |
| US9188627B2 (en) * | 2011-11-08 | 2015-11-17 | King Fahd University Of Petroleum And Minerals | Digital integrated circuit testing and characterization system and method |
| CN102768336A (en) * | 2012-07-20 | 2012-11-07 | 中国科学院深圳先进技术研究院 | Built-in self-test system based on on-chip system or system-in-package |
| CN103067009A (en) * | 2012-12-27 | 2013-04-24 | 东南大学 | High-precision digital analog converter test system |
| CN205081770U (en) * | 2015-09-28 | 2016-03-09 | 深圳市中兴微电子技术有限公司 | Direct current parameter testing device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017054591A1 (en) * | 2015-09-28 | 2017-04-06 | 深圳市中兴微电子技术有限公司 | Direct current parameter testing device |
| CN108234039A (en) * | 2017-12-05 | 2018-06-29 | 北京时代民芯科技有限公司 | A kind of direct expansion answering machine baseband processor on piece function self-sensing method and system |
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| WO2017054591A1 (en) | 2017-04-06 |
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Assignee: Xi'an Chris Semiconductor Technology Co. Ltd. Assignor: SHENZHEN ZTE MICROELECTRONICS TECHNOLOGY CO., LTD. Contract record no.: 2019440020036 Denomination of utility model: Direct current parameter testing device Granted publication date: 20160309 License type: Common License Record date: 20190619 |