CN102768336A - Built-in self-test system based on on-chip system or system-in-package - Google Patents
Built-in self-test system based on on-chip system or system-in-package Download PDFInfo
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- CN102768336A CN102768336A CN2012102534254A CN201210253425A CN102768336A CN 102768336 A CN102768336 A CN 102768336A CN 2012102534254 A CN2012102534254 A CN 2012102534254A CN 201210253425 A CN201210253425 A CN 201210253425A CN 102768336 A CN102768336 A CN 102768336A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3187—Built-in tests
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/3167—Testing of combined analog and digital circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1071—Measuring or testing
Abstract
The invention relates to a built-in self-test system based on an on-chip system or system-in-package. The built-in self-test system comprises a waveform generator, a waveform controller, a digital-to-analog converter, a to-be-tested analog-to-digital converter and a processor, wherein the waveform generator is used for generating a voltage excitation signal for testing; the waveform controller is connected with the waveform generator, and is used for receiving and processing the voltage excitation signal for testing, and outputting a digital quantity excitation signal with a controllable waveform parameter; the digital-to-analog converter is used for receiving the digital quantity excitation signal and converting the digital quantity excitation signal into an analog quantity excitation signal; the to-be-tested analog-to-digital converter is used for converting the analog quantity excitation signal into a digit sequence and transferring the digit sequence to the waveform controller; and the processor is connected with the waveform controller, and is used for inputting to the waveform controller an instruction of controlling the waveform parameter of the digital quantity excitation signal, and collecting the digit sequence through the waveform and converting the digit sequence into histogram data and saving the data. By using the built-in self-test system based on the on-chip system or system-in-package, in-chip integrated devices are reduced, the occupation of chip space is reduced, and the reliability of the system is improved.
Description
Technical field
The present invention relates to the integrated circuit testing field, particularly relate to a kind of built-in self-test system based on SOC(system on a chip) or system in package.
Background technology
Built-in self-test is the test of accomplishing through the interior hardware capability of building.The characteristics of built-in self-test are to generate test signal by integrated circuit oneself, and rely on the integrated circuit inherent logic to judge whether test response is correct.As shown in Figure 1, the ingredient of built-in self-test mainly comprises TPG (Test Pattern Generation, test vector generator), controller and ORA (Output Response Analyzer, output response analyzer).TPG mainly undertakes the effect that test signal generates, and ORA mainly is used for gathering and analyzing the output response that circuit-under-test is produced under the effect of the test signal that TPG generated.It is the monitoring whole test process that controller mainly acts on, and comprises that control TPG generates test signal, control ORA and gathers output response and synchronous to the clock synchronization of the analysis of the output response of being gathered, control whole test process and TPG and ORA work.
For ADC (Analog to Digital Converter, analog to digital converter) test, TPG mainly with generating analogue stimulus signal, generally includes triangular wave, sine wave etc.The output of circuit-under-test response be to the analogue stimulus signal of input sample and quantize after the result.
Current, the test of SOC(system on a chip) (being called for short SoC, full name system on a chip) or system in package (being called for short SiP, full name system in package) internal mix signaling module is a major challenge of field tests, also is faced with many problems.Test for ADC; The tradition build-in self-test method is Simulation with I P nuclear (the Intellectual Property core with special use; IP core) is integrated in chip, utilizes this Simulation with I P nuclear to generate pumping signal, this pumping signal input ADC; The output signal of sampling and analysis ADC, and then the test of the interior ADC of the sheet of completion SOC(system on a chip) or system in package.But, because the analog element of the employing of Simulation with I P nuclear is more, taken area bigger in the sheet of SOC(system on a chip) or system in package, increased the complicacy of SOC(system on a chip) or system in package, reduced the reliability of SOC(system on a chip) or system in package.
Summary of the invention
Given this, be necessary a kind of built-in self-test system based on SOC(system on a chip) or system in package to be provided to the more problem of built-in self-test analog element.
A kind of built-in self-test system based on SOC(system on a chip) or system in package comprises:
Waveform generator is used for generating test and uses voltage excitation signals;
Waveshape monitor is connected with said waveform generator, is used for receiving and handling said test and use voltage excitation signals, the digital quantity pumping signal of output waveform controllable parameters;
Digital to analog converter couples with said waveshape monitor, is used to receive said digital quantity pumping signal and converts said digital quantity pumping signal into the analog quantity pumping signal;
Analog to digital converter to be measured couples with said digital to analog converter, is used for said analog quantity pumping signal is converted into Serial No. and said Serial No. is delivered to said waveshape monitor; And
Processor is connected with said waveshape monitor, is used for controlling the instruction of said digital quantity excitation signal waveforms parameter, gathering said Serial No. and convert histogram data into through said waveshape monitor and preserve to said waveshape monitor input.
Therein among embodiment; Said waveform generator comprises digital sine wave generator and digital triangular-wave generator; Said digital sine wave generator is applied to test the dynamic parameter of said analog to digital converter to be measured, and said digital triangular-wave generator is applied to test the static parameter of said analog to digital converter to be measured.
Among embodiment, said digital sine wave generator is the digital sine wave generator based on DDS therein.
Among embodiment, said waveform parameter is waveform frequency, initial phase and the periodicity of said digital quantity pumping signal therein.
Among embodiment, also comprise wave filter therein, said wave filter couples with said digital to analog converter and said analog to digital converter to be measured respectively, is used to eliminate the undesired signal that said digital to analog converter produces.
Among embodiment, also comprise amplifier therein, said amplifier input terminal links to each other with the output terminal of said digital to analog converter, and the input end of output terminal and said analog to digital converter to be measured couples, and is used to adjust the amplitude of said analog quantity pumping signal.
Among embodiment, also comprise interleaver and simulation multiplexer therein, said interleaver is connected between said waveshape monitor and the said digital to analog converter, is used for when test, said digital quantity pumping signal being sent to digital to analog converter; Said simulation multiplexer is connected between said digital to analog converter and the said analog to digital converter to be measured, is used for when test, said analog quantity pumping signal being sent to analog to digital converter to be measured.
Therein among embodiment; Said interleaver also is used for when non-test, the analog quantity input signal being sent to analog to digital converter to be measured; Said interleaver also is used for when non-test, the digital quantity M signal of importing being sent to digital to analog converter, and said analog quantity input signal converts said digital quantity M signal to through said analog to digital converter to be detected.
Among embodiment, also comprise storer therein, said storer links to each other with said processor, is used for theory of storage static parameter value and theoretical dynamic parameter value.
Above-mentioned built-in self-test system based on SOC(system on a chip) or system in package; Having made full use of in the sheet of SOC(system on a chip) or system in package the resource of existing processor and digital to analog converter comes analog to digital converter to be measured in the sheet is tested; In conjunction with the digital circuit device waveform generator and the waveshape monitor of extra interpolation, need not to adopt Simulation with I P nuclear to generate pumping signal with more analog device, reduced the device that chip integration becomes; It is less to take chip space, has increased the reliability of system.
Description of drawings
Fig. 1 is a built-in self-test ultimate principle block diagram;
Fig. 2 is the built-in self-test system module map based on SOC(system on a chip) or system in package of an embodiment;
Fig. 3 is for simulation triangular wave input waveform and quantize figure;
Fig. 4 is that triangular wave quantizes the gained histogram;
Fig. 5 is analog sine input waveform and quantification figure thereof;
Fig. 6 is the sinusoidal wave gained histogram that quantizes.
Embodiment
Bigger in order to solve the sheet inner area that takies SOC(system on a chip) or system in package that built-in self-test causes because of analog element is more; SOC(system on a chip) or system in package are complicated; And the lower problem of the reliability of SOC(system on a chip) or system in package, a kind of built-in self-test system based on SOC(system on a chip) or system in package is provided.
As shown in Figure 2, the built-in self-test system based on SOC(system on a chip) or system in package of an embodiment is drawn together waveform generator 210, waveshape monitor 220, digital to analog converter 230, analog to digital converter to be measured 240 and processor 250.
Waveshape monitor 220 is connected with waveform generator 210, is used for receiving and handles test and use voltage excitation signals, the digital quantity pumping signal of output waveform controllable parameters.In the present embodiment, waveform parameter is waveform frequency, initial phase and the periodicity of digital quantity pumping signal.In addition, waveform parameter also possibly be type of waveform, such as triangular wave or sine wave.Waveshape monitor 220 is used for test pattern, is in idle state under the normal mode.
Digital to analog converter 230; Be called for short DAC (Digital to Analog Converter; Digital to analog converter), couples, be used to receive the digital quantity pumping signal of waveshape monitor 220 outputs and convert this digital quantity pumping signal into the analog quantity pumping signal with waveshape monitor 220.
Analog to digital converter 240 to be measured couples with digital to analog converter 230, is used for converting the analog quantity pumping signal of digital to analog converter 230 outputs into Serial No., and this Serial No. is delivered to waveshape monitor 220.Analog to digital converter is called for short ADC (Analog to Digital Converter, analog to digital converter).
Above-mentioned built-in self-test system based on SOC(system on a chip) or system in package; Having made full use of in the sheet of SOC(system on a chip) or system in package the resource of existing processor 250 and digital to analog converter 230 comes analog to digital converter 240 to be measured in the sheet is tested; Digital circuit device waveform generator 210 and waveshape monitor 220 in conjunction with extra interpolation; Need not to adopt Simulation with I P nuclear to generate pumping signal with more analog device; Reduced the device that chip integration becomes, it is less to take chip space, has increased the reliability of system.
In order to make test pattern and normal mode non-interference; The built-in self-test system based on SOC(system on a chip) or system in package of present embodiment; Also comprise interleaver 280 and simulation multiplexer 290; Interleaver 280 is connected between waveshape monitor 220 and the digital to analog converter 230, and the digital quantity pumping signal that is used for when test, waveshape monitor 220 being exported sends digital to analog converter 230 to.Simulation multiplexer 290 is connected between digital to analog converter 230 and the analog to digital converter to be measured 240, and the analog quantity amount pumping signal that is used for when test, digital to analog converter 230 being exported sends analog to digital converter 240 to be measured to.When non-test; Promptly under normal mode; Simulation multiplexer 290 also is used for analog quantity input signal Vin is sent to analog to digital converter 240 to be measured, converts the digital quantity M signal into also with this digital quantity M signal input digit multiplexer 280 by analog to digital converter 240 to be measured.When non-test, interleaver 280 also is used for the digital quantity M signal of input is sent to digital to analog converter 230, by digital to analog converter 230 conversions and output analog quantity output signals Vout.Usually, interleaver 280 has a plurality of input interfaces, an output interface with simulation multiplexer 290.For the ease of identification, present embodiment uses wherein two interfaces of " 0 " and " 1 " expression interleaver 280 or simulation multiplexer 290, and wherein " 0 " interface is used for normal mode, and " 1 " interface is used for test pattern.Under the normal mode; Analog quantity input signal Vin is from " 0 " interface input simulation multiplexer 290 of simulation multiplexer 290; Get into analog to digital converter 240 to be measured through simulation multiplexer 290 and convert the digital quantity M signal to; This digital quantity M signal gets into interleaver 280 from " 0 " interface of interleaver 280, and then converts analog quantity output signals Vout to through digital to analog converter 230.
In the present embodiment, waveform generator 210 comprises digital sine wave generator 212 and digital triangular-wave generator 214.Digital sine wave generator 212 is applied to test the dynamic parameter of analog to digital converter 240 to be measured, and digital triangular-wave generator 214 is applied to test the static parameter of analog to digital converter 240 to be measured.Digital sine wave generator 212 is the digital sine wave generator based on DDS (Direct Digital Synthesizer, Direct Digital Synthesizer).As shown in Figure 3; When the static parameter of test analog to digital converter 240 to be measured; Numeral triangular-wave generator 214 generates the digital quantity triangular wave, converts the analog quantity pumping signal through waveshape monitor 220, digital to analog converter 230 into after handling successively, and this analog quantity pumping signal is as the analog input of analog to digital converter 240 to be measured; Handle back output Serial No. through analog to digital converter 240 to be measured, promptly quantize output.Waveshape monitor 220 is accepted the instruction of from processor 250; Corresponding special state register is made amendment; Indicate the precision and the working clock frequency of analog to digital converter 240 to be measured and digital to analog converter 230; Specify selected test to use the type of waveform of voltage excitation signals to be triangular wave, and specify frequency, initial phase, the periodicity of waveform according to actual conditions.When digital triangular-wave generator 214 generates the generation of digital quantity triangular wave; Waveshape monitor 220 can automatically start the work of digital to analog converter 230 and analog to digital converter 240 to be measured, and processor 250 adds up according to the output encoder value of received analog to digital converter to be measured 240 histogram data to this encoded radio.After the waveform generation of designated period number was accomplished, waveshape monitor 220 can stop the work of digital to analog converter 230 and analog to digital converter 240 to be measured.Like this, finally can obtain one group of histogram data (see figure 4), processor 250 can utilize desirable histogram data to calculate with these group actual histogram data and finally obtain the static parameter value.Compare with theoretical static parameter value range then and judge whether analog to digital converter 240 to be measured has passed through the test of static parameter.In like manner; The digital quantity sine wave that utilizes digital sine wave generator 212 to generate can be measured the dynamic parameter value (seeing Fig. 5 and Fig. 6) of analog to digital converter 240 to be measured, compares with theoretical dynamic parameter value range then and judges whether analog to digital converter 240 to be measured has passed through the test of dynamic parameter.Theoretical static parameter value is stored in the storer 252 that links to each other with processor 250 with theoretical dynamic parameter value.
As shown in Figure 2, in concrete embodiment, also comprise wave filter 260 and amplifier 270 based on the built-in self-test system of SOC(system on a chip) or system in package.Wave filter 260 couples with digital to analog converter 230 and analog to digital converter to be measured 240 respectively, is used to eliminate the undesired signal that digital to analog converter 230 is produced.The input end of amplifier 270 links to each other with the output terminal of digital to analog converter 230, and the input end of output terminal and analog to digital converter to be measured 240 couples, and is used to adjust the amplitude of analog quantity pumping signal.Processor 250 can connect computing machine 50 through serial ports.
The above embodiment has only expressed several kinds of embodiments of the present invention, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to claim of the present invention.Should be pointed out that for the person of ordinary skill of the art under the prerequisite that does not break away from the present invention's design, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with accompanying claims.
Claims (9)
1. the built-in self-test system based on SOC(system on a chip) or system in package is characterized in that, comprising:
Waveform generator is used for generating test and uses voltage excitation signals;
Waveshape monitor is connected with said waveform generator, is used for receiving and handling said test and use voltage excitation signals, the digital stimulus signal of output waveform controllable parameters;
Digital to analog converter couples with said waveshape monitor, is used to receive said digital quantity pumping signal and converts said digital quantity pumping signal into the analog quantity pumping signal;
Analog to digital converter to be measured couples with said digital to analog converter, is used for said analog quantity pumping signal is converted into Serial No. and said Serial No. is delivered to said waveshape monitor; And
Processor is connected with said waveshape monitor, is used for controlling the instruction of said digital quantity excitation signal waveforms parameter, gathering said Serial No. and convert histogram data into through said waveshape monitor and preserve to said waveshape monitor input.
2. the built-in self-test system based on SOC(system on a chip) or system in package according to claim 1; It is characterized in that; Said waveform generator comprises digital sine wave generator and digital triangular-wave generator; Said digital sine wave generator is applied to test the dynamic parameter of said analog to digital converter to be measured, and said digital triangular-wave generator is applied to test the static parameter of said analog to digital converter to be measured.
3. the built-in self-test system based on SOC(system on a chip) or system in package according to claim 2 is characterized in that, said digital sine wave generator is the digital sine wave generator based on DDS.
4. the built-in self-test system based on SOC(system on a chip) or system in package according to claim 1 is characterized in that, said waveform parameter is waveform frequency, initial phase and the periodicity of said digital quantity pumping signal.
5. the built-in self-test system based on SOC(system on a chip) or system in package according to claim 1; It is characterized in that; Also comprise wave filter; Said wave filter couples with said digital to analog converter and said analog to digital converter to be measured respectively, is used to eliminate the undesired signal that said digital to analog converter produces.
6. the built-in self-test system based on SOC(system on a chip) or system in package according to claim 1; It is characterized in that; Also comprise amplifier; Said amplifier input terminal links to each other with the output terminal of said digital to analog converter, and the input end of output terminal and said analog to digital converter to be measured couples, and is used to adjust the amplitude of said analog quantity pumping signal.
7. the built-in self-test system based on SOC(system on a chip) or system in package according to claim 1; It is characterized in that; Also comprise interleaver and simulation multiplexer; Said interleaver is connected between said waveshape monitor and the said digital to analog converter, is used for when test, said digital quantity pumping signal being sent to digital to analog converter; Said simulation multiplexer is connected between said digital to analog converter and the said analog to digital converter to be measured, is used for when test, said analog quantity pumping signal being sent to analog to digital converter to be measured.
8. the built-in self-test system based on SOC(system on a chip) or system in package according to claim 7; It is characterized in that; Said interleaver also is used for when non-test, the analog quantity input signal being sent to analog to digital converter to be measured; Said interleaver also is used for when non-test, the digital quantity M signal of importing being sent to digital to analog converter, and said analog quantity input signal converts said digital quantity M signal to through said analog to digital converter to be detected.
9. the built-in self-test system based on SOC(system on a chip) or system in package according to claim 1 is characterized in that, also comprises storer, and said storer links to each other with said processor, is used for theory of storage static parameter value and theoretical dynamic parameter value.
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| CN2012102534254A CN102768336A (en) | 2012-07-20 | 2012-07-20 | Built-in self-test system based on on-chip system or system-in-package |
| PCT/CN2012/087896 WO2014012343A1 (en) | 2012-07-20 | 2012-12-28 | System on chip or system in package-based built-in self-test system |
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| CN2012102534254A CN102768336A (en) | 2012-07-20 | 2012-07-20 | Built-in self-test system based on on-chip system or system-in-package |
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| WO2014012343A1 (en) * | 2012-07-20 | 2014-01-23 | 中国科学院深圳先进技术研究院 | System on chip or system in package-based built-in self-test system |
| CN103941119A (en) * | 2014-03-27 | 2014-07-23 | 北京汇德信科技有限公司 | Multifunctional programmable signal generating parameter testing system |
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