CN204965243U - Low dropout regulator - Google Patents
Low dropout regulator Download PDFInfo
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- CN204965243U CN204965243U CN201520716503.9U CN201520716503U CN204965243U CN 204965243 U CN204965243 U CN 204965243U CN 201520716503 U CN201520716503 U CN 201520716503U CN 204965243 U CN204965243 U CN 204965243U
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- error amplifier
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Abstract
The utility model discloses a low dropout regulator, including the anodal error amplifier who connects, error amplifier's output is connected with MOS's grid, and MOS's drain electrode and current limiting device are connected, and MOS's source electrode and feedback resistance are connected, and feedback resistance is connected with error amplifier's negative pole. The problem of the low dropout regulator's that exists among the prior art pressure drop high, the consumption is high is solved, low dropout regulator's work efficiency has been improved.
Description
Technical field
The utility model belongs to linear voltage regulator technical field, is specifically related to a kind of low pressure difference linear voltage regulator.
Background technology
Low pressure difference linear voltage regulator LDO has the outstanding advantages such as structure is simple, low noise, has a wide range of applications in various product.Although traditional LDO self-limiting output circuit structure solves output voltage overshoot, and can cause breakdown problem after overshoot.But self-limiting circuit can increase the pressure drop of LDO, the power consumption of voltage stabilizer is caused to increase.
Utility model content
The purpose of this utility model is to provide a kind of low pressure difference linear voltage regulator, solves the problem that pressure drop is high, power consumption is high of the low pressure difference linear voltage regulator existed in prior art.
The technical scheme that the utility model adopts is, a kind of low pressure difference linear voltage regulator, comprise the error amplifier that positive pole connects reference power source, the output terminal of error amplifier is connected with the grid of MOS, the drain electrode of MOS is connected with current-limiting apparatus, the source electrode of MOS is connected with feedback resistance, and feedback resistance is connected with the negative pole of error amplifier.
Feature of the present utility model is also,
Wherein current-limiting apparatus comprises decision maker, decision maker is connected with the first current mirror, first current mirror is connected with current sampling device, is also connected with feedback assembly between the first current mirror and current sampling device, is connected with the second current mirror between current sampling device and feedback assembly.
Wherein the first current mirror is connected with the drain electrode of MOS.
Wherein the source electrode of MOS also connects output unit.
The beneficial effects of the utility model are, use error amplifier connects the grid of MOS, and the drain electrode of MOS connects current-limiting apparatus, is connected with output unit between the source electrode of MOS and the negative pole of error amplifier; Current-limiting apparatus includes decision maker, and decision maker is decision circuit CMP, the voltage difference of the output voltage of output unit that decision circuit CMP can be obtained by current sampling device and the sampled voltage of current-limiting apparatus, judges that mode of operation selected by voltage stabilizer; And be also connected with feedback resistance between the source electrode of MOS and the negative pole of error amplifier; The pressure drop of voltage stabilizer can be reduced, reduce the power consumption of linear voltage regulator, improve the work efficiency of linear voltage regulator.
Accompanying drawing explanation
Fig. 1 is the circuit structure diagram of a kind of low pressure difference linear voltage regulator of the utility model;
Fig. 2 is the circuit structure diagram of current-limiting apparatus in a kind of low pressure difference linear voltage regulator of the utility model;
Fig. 3 is the circuit connection diagram of current-limiting apparatus in a kind of low pressure difference linear voltage regulator embodiment of the utility model;
Fig. 4 is the waveform schematic diagram of output current with supply voltage and output voltage pressure reduction of the low pressure difference linear voltage regulator of a kind of low-power consumption of the present invention;
Fig. 5 is the waveform schematic diagram of output current with supply voltage and output voltage pressure reduction of existing low pressure difference linear voltage regulator.
In figure, 1. error amplifier, 2.MOS, 3. current-limiting apparatus, 4. feedback resistance, 5. output unit, 6. reference power source, 7. decision maker, 8. the first current mirror, 9. current sampling device, 10. feedback assembly, 11. second current mirrors.
In Fig. 3, CMP is decision maker; M1-M23 is MOS; I1 and I2 is reference current source.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is described in detail.
The utility model proposes a kind of low pressure difference linear voltage regulator, as shown in Figure 1, comprise error amplifier 1, the positive pole of error amplifier 1 connects reference power source 6, and the input voltage of reference power source 6 is at least 2V, and the output terminal of error amplifier 1 is connected with the grid of MOS2, the source electrode of MOS2 connects output unit 5, output unit 5 output voltage, the source electrode of MOS2 also connects feedback resistance 4, and feedback resistance 4 is connected with the negative pole of error amplifier 1; The drain electrode of MOS2 is connected with current-limiting apparatus 3.
As shown in Figure 2, current-limiting apparatus 3 comprises decision maker 7, decision maker 7 is decision circuit CMP device, the output terminal of decision maker 7 is connected with the first current mirror 8, first current mirror 8 is connected with current sampling device 9, be connected with feedback assembly 10 between first current mirror 8 and current sampling device 9, between feedback assembly 10 and current sampling device 9, be connected with the second current mirror 11; Wherein the first current mirror 8 is connected with the drain electrode of MOS2.
As shown in Figure 3, the first current mirror 8 comprises reference current source I1, metal-oxide-semiconductor M1-M9; Current sampling device 9 comprises metal-oxide-semiconductor M11-M14; Feedback assembly 10 comprises metal-oxide-semiconductor M15, M16, M19, M20, M22; Second current mirror 11 comprises reference current source I2, metal-oxide-semiconductor M17, M18, M21, M23.
The working method of a kind of low pressure difference linear voltage regulator of the utility model is, comparator circuit CMP carrys out the mode of operation of decision circuit by the pressure reduction of sampled voltage and output voltage, comparator circuit CMP control M7, the break-make of M15.Namely along with the increase of output current, when the pressure reduction of supply voltage and output voltage is greater than 1V, power tube M9 enters into triode region mode of operation from saturation operation mode.Now under identical pressure reduction, output power pipe exports more electric current, but due to current-limiting apparatus, the maximum output current of power tube is limited in 900mA.Because the comparer in decision circuit has hysteresis voltage, so can 1V be less than from the second mode of operation to the first working mode change voltage.
When the pressure reduction of supply voltage and output voltage is less than 1V, the output SELN of comparator circuit CMP is low level, M7 and M15 disconnects, reference current source I1 provides the electric current of zero-temperature coefficient, current source I1 passes through M1, M2 and M5, the current mirror of M6 composition, current amplification factor is 4, is mirrored to the drain electrode of M8.Electric current is mirrored to again the drain electrode of M9 by the current mirror of M8 and M9 composition, now M9 is operated in the first mode of operation, i.e. saturation region operation pattern, and maximum output current is Ipmos=77uA*4*2295=706mA; Now M15 turns off, and feedback circuit does not work, and the maximum current of output power pipe M10 is 706mA;
When the pressure reduction of output voltage is greater than 1V, the output SELN of comparer is high level, M7 and M15 conducting, and current source I1 is by M1, M2 and M3, and the current mirror of M4, M5, M6 composition, current amplification factor is 24, is mirrored to the drain electrode of M8.Electric current is mirrored to again the drain electrode of M9 by the current mirror of M8 and M9 composition, now M9 is operated in the first mode of operation, i.e. saturation region operation pattern, and maximum output current is Ipmos=77uA*2*12*2295=4.2A; Now M15 conducting, current-limiting circuit starts, M11 and M12 sampled output current, and being mirrored to M22 by M13, M14 and M16, M22 is by current mirror M19, the grid voltage of M9 is improved, make M9 be operated in the second mode of operation, i.e. triode region mode of operation, the maximum output current of M9 is limited in 900mA.Under working current 500mA, the VDS of power tube M9 is at 190.6mV.If do not have LDO Circuit tuning, under 500mA, VDS is about 683.6mV.This structure makes Dropout voltage reduce 493mV.
When output current is less than 500mA, compensating circuit startup work, reference current source I2 is mirrored to the drain electrode of M23 by MOSM17 and M18, electric current is again by the current mirror of M21, M23 composition, offset M22 to drain the electric current passed through, namely, when working current is less than 500mA, feedback circuit does not cause the change of M9 grid voltage.
Be illustrated in figure 4 the waveform schematic diagram using the output current of the utility model a kind of low pressure difference linear voltage regulator with supply voltage and output voltage pressure reduction, when electric current is 500mA, exports pressure reduction and only have 190.6mV; Fig. 5 is the waveform schematic diagram of output current with supply voltage and output voltage pressure reduction of existing low pressure difference linear voltage regulator, and wherein pressure drop is 683.6mV.Voltage stabilizer of the present utility model can make pressure drop reduce 493mV, and then effectively reduces the power consumption of voltage stabilizer, improves work efficiency.
Claims (4)
1. a low pressure difference linear voltage regulator, it is characterized in that, comprise the error amplifier (1) that positive pole connects reference power source (6), the output terminal of error amplifier (1) is connected with the grid of MOS (2), the drain electrode of MOS (2) is connected with current-limiting apparatus (3), the source electrode of MOS (2) is connected with feedback resistance (4), and feedback resistance (4) is connected with the negative pole of error amplifier (1).
2. a kind of low pressure difference linear voltage regulator according to claim 1, it is characterized in that, described current-limiting apparatus (3) comprises decision maker (7), decision maker (7) is connected with the first current mirror (8), first current mirror (8) is connected with current sampling device (9), also be connected with feedback assembly (10) between first current mirror (8) and current sampling device (9), between current sampling device (9) and feedback assembly (10), be connected with the second current mirror (11).
3. a kind of low pressure difference linear voltage regulator according to claim 2, is characterized in that, described first current mirror (8) is connected with the drain electrode of MOS (2).
4. a kind of low pressure difference linear voltage regulator according to claim 1-3 any one, is characterized in that, the source electrode of described MOS (2) also connects output unit (5).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520716503.9U CN204965243U (en) | 2015-09-16 | 2015-09-16 | Low dropout regulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520716503.9U CN204965243U (en) | 2015-09-16 | 2015-09-16 | Low dropout regulator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204965243U true CN204965243U (en) | 2016-01-13 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201520716503.9U Active CN204965243U (en) | 2015-09-16 | 2015-09-16 | Low dropout regulator |
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| CN (1) | CN204965243U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112859995A (en) * | 2021-01-12 | 2021-05-28 | 西安拓尔微电子有限责任公司 | Voltage reference circuit and adjusting method |
| CN113093853A (en) * | 2021-04-15 | 2021-07-09 | 东北大学 | LDO circuit for realizing low input/output voltage difference in low-voltage starting process |
-
2015
- 2015-09-16 CN CN201520716503.9U patent/CN204965243U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112859995A (en) * | 2021-01-12 | 2021-05-28 | 西安拓尔微电子有限责任公司 | Voltage reference circuit and adjusting method |
| CN112859995B (en) * | 2021-01-12 | 2024-05-24 | 拓尔微电子股份有限公司 | Voltage reference circuit and adjusting method |
| CN113093853A (en) * | 2021-04-15 | 2021-07-09 | 东北大学 | LDO circuit for realizing low input/output voltage difference in low-voltage starting process |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: B201, zero one square, Xi'an Software Park, 72 Keji 2nd Road, high tech Zone, Xi'an City, Shaanxi Province, 710000 Patentee after: Tuoer Microelectronics Co.,Ltd. Address before: 710075 406 / 408, taibaige, Xi'an Software Park, No. 72, Keji Second Road, high tech Zone, Xi'an, Shaanxi Province Patentee before: XI'AN TUOER MICROELECTRONICS Co.,Ltd. |
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| CP03 | Change of name, title or address |