CN104216457B - A kind of high-order temperature compensation circuit of non-bandgap reference source - Google Patents
A kind of high-order temperature compensation circuit of non-bandgap reference source Download PDFInfo
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- CN104216457B CN104216457B CN201410427180.1A CN201410427180A CN104216457B CN 104216457 B CN104216457 B CN 104216457B CN 201410427180 A CN201410427180 A CN 201410427180A CN 104216457 B CN104216457 B CN 104216457B
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Abstract
The invention belongs to Analogous Integrated Electronic Circuits technical field, be specifically related to a kind of high-order temperature compensation circuit of non-bandgap reference source.Of the present inventionly comprise electric current source generating circuit, low temperature compensation circuit, high temperature compensation circuit and reference source circuit; The output terminal of described electric current source generating circuit is connected with the first input end of reference source circuit, the first input end of low temperature compensation circuit, the first input end of high temperature compensation circuit respectively; The outside positive temperature voltage of second input termination first of low temperature compensation circuit, the first output terminal of its 3rd input termination reference source circuit, it exports the second input end of termination reference source circuit; The outside positive temperature voltage of second input termination second of high temperature compensation circuit, the first output terminal of its 3rd input termination reference source circuit, it exports the second input end of termination reference source circuit; Second output terminal output reference voltage of reference source circuit.The present invention has the reference voltage of less temperature coefficient; Because pipe work most of in integrated circuit is in subthreshold region, circuit integrity power consumption is reduced greatly.The present invention is particularly useful for high-order temperature compensation circuit.
Description
Technical field
The invention belongs to Analogous Integrated Electronic Circuits technical field, be specifically related to a kind of high-order temperature compensation circuit of non-bandgap reference source.
Background technology
Reference source plays key player in the application such as analog to digital converter and power integrated circuit, for providing accurate, a stable reference dc voltage.Insensitive to temperature and noise, and extremely low quiescent current and operating voltage are the design objects of following high performance circuit.
In order to reduce the voltage drift of reference source in wide temperature range, propose multiple high-order compensation technology at present, the temperature compensation of such as quadratic term, Exponential Curvature Temperature Compensation, section linear compensating and the resistance ratio compensation etc. with temperature correlation, its key concept introduces advanced digital function to offset the high-order temperature coefficient of PN junction.For subthreshold region MOS non-bandgap reference source, the principal element of restriction reference source temperature characterisitic concentrates on the nonlinear temperature characteristic of mobility, and actually rare for the compensation method of this factor, especially in low temperature range, compensates difficulty larger.
Summary of the invention
Object of the present invention, is just to provide the high-order temperature compensated method being applicable to subthreshold region MOS non-bandgap reference source, carries out high and low temperature compensation respectively, and the nonlinear temperature characteristic reducing mobility, on the impact of reference source, obtains less temperature coefficient.
Technical scheme of the present invention is, a kind of high-order temperature compensation circuit of non-bandgap reference source, is characterized in that, comprises electric current source generating circuit, low temperature compensation circuit, high temperature compensation circuit and reference source circuit; The output terminal of described electric current source generating circuit is connected with the first input end of reference source circuit, the first input end of low temperature compensation circuit, the first input end of high temperature compensation circuit respectively; The outside positive temperature voltage of second input termination first of low temperature compensation circuit, the first output terminal of its 3rd input end termination reference source circuit, it exports the second input end of termination reference source circuit; The outside positive temperature voltage of second input termination second of high temperature compensation circuit, the first output terminal of its 3rd input termination reference source circuit, it exports the second input end of termination reference source circuit; Second output terminal output reference voltage of reference source circuit.
Concrete, described low temperature compensation circuit is by PMOS M8, M9, M12, M16, M17, M18, and NMOS tube M10, M11, M13, M14, M15 are formed; Wherein, the source electrode of M8 connects supply voltage, its grid and drain interconnection, and its drain electrode connects the drain electrode of M10; The grid of M10 connects the first outside positive temperature voltage, and its source electrode connects the drain electrode of M11; The grid of M11 connects the first output terminal of reference source circuit, its source ground current potential; The source electrode of M9 connects supply voltage, and its grid connects the grid of M8, and its drain electrode connects the drain electrode of M13; The grid of M13 connects the grid of M14, its source ground current potential; The grid of M14 and drain interconnection, its drain electrode connects the drain electrode of M12, its source ground current potential; The grid of M12 connects the output terminal of electric current source generating circuit, and its source electrode connects supply voltage; The grid of M15 connects the first output terminal of reference source circuit, and its drain electrode connects the drain electrode of M16, its source ground current potential; The grid of M16 connects the interconnection point that M9 drains and M13 drains, and its source electrode connects the drain electrode of M17; The source electrode of M17 connects supply voltage, its grid and drain electrode short circuit; The source electrode of M18 connects supply voltage, and its grid connects the grid of M17, and its drain electrode is the output terminal of low temperature compensation circuit;
Described high temperature compensation circuit is by PMOS M19, M20, M25, M26, M27, M28, and NMOS tube M21, M22, M23, M24, M29 are formed; Wherein, the source electrode of M19 connects supply voltage, its grid and drain interconnection, and its drain electrode connects the drain electrode of M21; The grid of M21 connects the second outside positive temperature voltage, and its source electrode connects the drain electrode of M22; The grid of M22 connects the first output terminal of reference source circuit, its source ground current potential; The source electrode of M20 connects supply voltage, and its grid connects the grid of M19, and its drain electrode connects the drain electrode of M23; The grid of M23 and drain interconnection, its source ground current potential; The source electrode of M25 connects supply voltage, and its grid connects the output terminal of electric current source generating circuit, and its drain electrode connects the drain electrode of M24; The grid of M24 connects the grid of M23, its source ground current potential; The grid of M29 connects the first output terminal of reference source circuit, and its drain electrode connects the drain electrode of M28, its source ground current potential; The grid of M28 connects the interconnection point that M25 drains and M24 drains, and its source electrode connects the drain electrode of M26; The source electrode of M26 connects supply voltage, its grid and drain interconnection; The source electrode of M27 connects supply voltage, and its grid connects the grid of M26, and its drain electrode is as high temperature compensation circuit output end.
Beneficial effect of the present invention is, the high-order temperature compensated method being applicable to subthreshold region MOS non-bandgap reference source of the present invention, based on switch control rule, the output voltage of reference source is compensated respectively in high and low temperature range, reduce the nonlinear temperature characteristic of mobility to the impact of reference source, thus obtain the reference voltage with less temperature coefficient; Because pipe work most of in integrated circuit is in subthreshold region, circuit integrity power consumption is reduced greatly.
Accompanying drawing explanation
Fig. 1 is the high-order temperature compensated method configuration diagram being applicable to subthreshold region MOS non-bandgap reference source of the present invention;
Fig. 2 is checking a kind of current source generation practical circuit schematic diagram of the present invention;
Fig. 3 is checking a kind of reference source circuit example schematic of the present invention;
Fig. 4 is low temperature compensation circuit schematic diagram of the present invention;
Fig. 5 is high temperature compensation circuit diagram of the present invention;
Fig. 6 is low temp compensating electric current principle schematic diagram of the present invention;
Fig. 7 is high temperature compensation electric current principle schematic diagram of the present invention;
Fig. 8 be of the present invention high-order temperature compensated after reference source schematic diagram.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in detail
The configuration diagram being applicable to the high-order temperature compensated method of subthreshold region MOS non-bandgap reference source of the present invention as shown in Figure 1, comprises electric current source generating circuit, low temperature compensation circuit, high temperature compensation circuit, reference source circuit; Wherein, the first bias voltage V of electric current source generating circuit generation
b1be connected respectively to the first input end of low temperature compensation circuit, the first input end of high temperature compensation circuit, an input end of reference source circuit; The outside positive temperature voltage V of second input termination of low temperature compensation circuit
pTAT(PTAT, ProportionalToAbsoluteTemperature), an output terminal V of the 3rd input termination reference source
b2, export another input end V of termination reference source circuit
c; The outside positive temperature voltage V of second input termination of high temperature compensation circuit
pTAT1, an output terminal V of the 3rd input termination reference source
b2, export another input end V of termination reference source circuit
c; Another output terminal output reference voltage V of reference source circuit
rEF.
As shown in Figure 4, it is by 6 PMOS: M8, M9, M12, M16, M17, M18 for above-mentioned low temperature compensation circuit, 5 NMOS tube: M10, M11, M13, M14, M15 form.Concrete annexation is: the source electrode of M8 meets supply voltage VIN, its grid and drain interconnection, and its drain electrode connects the drain electrode of M10; The grid of M10 meets outside positive temperature voltage V
pTAT, its source electrode connects the drain electrode of M11; The grid of M11 meets outside second bias voltage V
b2, its source ground current potential VSS; The source electrode of M9 meets supply voltage VIN, and its grid connects the grid of M8, and its drain electrode connects the drain electrode of M13; The grid of M13 connects the grid of M14, its source ground current potential VIN; The grid of M14 and drain interconnection, its drain electrode connects the drain electrode of M12, its source ground current potential VIN; The grid of M12 meets outside first bias voltage V
b1, its source electrode meets supply voltage VIN; The grid of M15 meets outside second bias voltage V
b2, its drain electrode connects the drain electrode of M16, its source ground current potential VSS; The grid of M16 connects the interconnection point that M9 drains and M13 drains, and its source electrode connects the drain electrode of M17; The source electrode of M17 meets supply voltage VIN, its grid and drain electrode short circuit; The source electrode of M18 meets supply voltage VIN, and its grid connects the grid of M17, and its drain electrode is as the output V of this circuit
c.
As shown in Figure 5, it is by 6 PMOS: M19, M20, M25, M26, M27, M28 for above-mentioned high temperature compensation circuit, 5 NMOS tube: M21, M22, M23, M24, M29 form.Concrete annexation is: the source electrode of M19 meets supply voltage VIN, its grid and drain interconnection, and its drain electrode connects the drain electrode of M21; The grid of M21 meets outside positive temperature voltage V
pTAT1, its source electrode connects the drain electrode of M22; The grid of M22 meets outside second bias voltage V
b2, its source ground current potential VSS; The source electrode of M20 meets supply voltage VIN, and its grid connects the grid of M19, and its drain electrode connects the drain electrode of M23; The grid of M23 and drain interconnection, its source ground current potential VSS; The source electrode of M25 meets supply voltage VIN, and its grid meets outside first bias voltage V
b1, its drain electrode connects the drain electrode of M24; The grid of M24 connects the grid of M23, its source ground current potential VSS; The grid of M29 meets outside second bias voltage V
b2, its drain electrode connects the drain electrode of M28, its source ground current potential VSS; The grid of M28 connects the interconnection point that M25 drains and M24 drains, and its source electrode connects the drain electrode of M26; The source electrode of M26 meets supply voltage VIN, its grid and drain interconnection; The source electrode of M27 meets supply voltage VIN, and its grid connects the grid of M26, and its drain electrode is as the output of this circuit.
As shown in Figure 2, it produces a positive temperature electric current I=A μ to the example schematic of a kind of electric current source generating circuit in the present invention
nt
2, wherein, A is constant, μ
nbe electron mobility, T is absolute temperature, is then mirrored to reference source circuit and low temperature compensation circuit by M7 pipe.
A kind of reference source circuit example in the present invention adopts subthreshold region MOS non-bandgap reference source, and its circuit structure as shown in Figure 3, is made up of PMOS M1, M2, M5, M6 and NMOS tube M3, M4.In this circuit, M1 and M2 is operated in saturation region, and all the other metal-oxide-semiconductors are all operated in sub-threshold region.By the derivation of equation, the output voltage V of reference source can be obtained
rEFfor:
Wherein,
V
tHNbe the threshold voltage of NMOS tube, n is sub-threshold slope, μ
phole mobility, C
oXgate oxide unit-area capacitance, V
tthermal voltage, S
irepresent metal-oxide-semiconductor M
ibreadth length ratio, k is Boltzmann constant, and q is electron charge, and a is the current ratio coefficient of M1, M2.
Reference voltage can obtain temperature differentiate:
Wherein, α
vTHfor V
tHNtemperature coefficient.
Because above-mentioned positive temperature electric current source generating circuit, reference source circuit all can adopt various forms to realize, and the protection content of non-invention, setting forth just to being convenient to principle of the present invention, therefore not doing too much elaboration in the present invention.
From said reference voltage V
rEFformula is known, in theory, by controlling the positive temperature coefficient of temperature electric current I, the breadth length ratio of M1, M4, M5, M6, M7, can obtain the reference source that temperature coefficient is zero.In fact, due to the impact of the nonlinear temperature items such as carrier mobility, the waveform of reference output voltage is as shown in solid line in Fig. 6.The present invention proposes a kind of high-order temperature compensated method, be used for reducing the temperature coefficient of reference voltage.
As shown in Figure 4, wherein M8 pipe and M9 pipe, M13 pipe and M14 pipe, M17 pipe and M18 pipe form current mirror to low temperature compensation circuit of the present invention respectively, and the grid of M11 pipe, M15 pipe is by bias voltage V
b2control, the grid of M12 pipe is by bias voltage V
b1control, its leakage current can be obtained and be respectively:
Wherein, I
ifor metal-oxide-semiconductor M
ileakage current.Can be obtained fom the above equation, when M11, M12, M15 pipe is all operated in the region of respective mirror image needs, its electric current passed through is determined by image current completely, then I
11, I
15, I
12be positive temperature electric current.
When temperature is lower than certain value, i.e. T
l0time, V
pTATbe far smaller than the threshold voltage of M10, cause M10 to turn off, the drain voltage of M11 is zero, then this branch road does not have electric current, M11 cannot image current.So the grid voltage of M16 is pulled low to zero potential by M13, thus M16 conducting, and in linear zone, thus ensure that M15 can export by complete mirror image.Low temperature compensation circuit operating temperature range designed by the present invention is at this minimum temperature point T
l0on, V
pTATbe not much less than the threshold voltage of M10, so M10 is operated in subthreshold region at the very start, namely there is not T
l0this temperature spot, in the working temperature interval of the low temperature compensation circuit namely designed by the present invention, M10 can not turn off.
Along with the continuous rising of temperature, V
pTATincrease gradually, then the source voltage of M10 is raised gradually, then the drain voltage of M11 is raised gradually, the drain current of M11 is increased gradually, is finally stabilized in certain value, as follows:
The leakage current I of M11
11by obtaining the leakage current of M9 after the current mirror mirror image that is made up of M8 and M9 be
In above process, the drain current of M11 constantly increases, and the grid voltage of M16 is increased gradually, then the drain voltage of M15 reduces gradually.When reaching T
l1during this temperature spot, the drain potential of M15 reaches the critical point realizing complete mirror image, and the drain current that can be obtained M18 by mirror image is as follows:
From above formula, I
18for positive temperature electric current, flow into the V of reference source
cnode, change the size of tail current, its curent change trend as shown in Figure 5.
Temperature continues to raise, and the grid voltage of M16 continues to raise, and the drain voltage of M15 continues to decline, and the electric current that mirror image is come then declines gradually, output reference is crossed T
l1after this point, decline gradually.
When in temperature, height is to TL2, M16 turns off, and the drain voltage of M15 is zero, then M15 no current flows through, and final compensation is exited.
Accordingly, when temperature is lower than T
l1time, M15 can realize complete image current, and the electric current flow through on M15 is proportional to μ
nt
2.Therefore along with the rising of temperature, reference source V is circulated into
cthe electric current I of node
18increase, M2 managed and increases with the temperature coefficient of the difference of the gate source voltage of M1 pipe, reference voltage be greater than compensation before value; When temperature is higher than T
l1and lower than T
l2time, along with the rising of temperature, I
18electric current reduces gradually, thus M2 pipe is reduced, until at T with the temperature coefficient of the difference of the gate source voltage of M1 pipe
l2temperature spot place, I
18electric current is kept to zero, the value before reference voltage restoration and compensation.Reference voltage after compensation, its temperature coefficient obviously reduces, as shown in phantom in Figure 8.
In like manner, high temperature compensation side's ratio juris and low temperature compensating method similar, wherein V
pTAT1effect temperature spot and low temperature compensating method in V
pTATapplication point is different.When temperature is lower than T
htime, the grid voltage of M28 is high, and its place branch current is zero; Along with temperature raises, the grid voltage of M28 reduces gradually, and this branch road has electric current to flow through, and electric current raises with temperature and raises gradually, and this electric current is by flowing into the V in reference source after mirror image
cnode, the drain current variation tendency of M27 as shown in Figure 7.Reference voltage after high temperature compensation as shown in phantom in Figure 8.
The present invention is based on switch control rule, carry out high-order temperature compensated to subthreshold region MOS non-bandgap reference source, achieve excellent temperature coefficient, in whole circuit, most of metal-oxide-semiconductor is operated in subthreshold region, and the overall power of circuit is reduced greatly.
Claims (1)
1. a high-order temperature compensation circuit for non-bandgap reference source, is characterized in that, comprises electric current source generating circuit, low temperature compensation circuit, high temperature compensation circuit and reference source circuit; The output terminal of described electric current source generating circuit is connected with the first input end of reference source circuit, the first input end of low temperature compensation circuit, the first input end of high temperature compensation circuit respectively; The outside positive temperature voltage of second input termination first of low temperature compensation circuit, the first output terminal of its 3rd input end termination reference source circuit, it exports the second input end of termination reference source circuit; The outside positive temperature voltage of second input termination second of high temperature compensation circuit, the first output terminal of its 3rd input termination reference source circuit, it exports the second input end of termination reference source circuit; Second output terminal output reference voltage of reference source circuit;
Described low temperature compensation circuit is by PMOS M8, M9, M12, M16, M17, M18, and NMOS tube M10, M11, M13, M14, M15 are formed; Wherein, the source electrode of M8 connects supply voltage, its grid and drain interconnection, and its drain electrode connects the drain electrode of M10; The grid of M10 connects the first outside positive temperature voltage, and its source electrode connects the drain electrode of M11; The grid of M11 connects the first output terminal of reference source circuit, its source ground current potential; The source electrode of M9 connects supply voltage, and its grid connects the grid of M8, and its drain electrode connects the drain electrode of M13; The grid of M13 connects the grid of M14, its source ground current potential; The grid of M14 and drain interconnection, its drain electrode connects the drain electrode of M12, its source ground current potential; The grid of M12 connects the output terminal of electric current source generating circuit, and its source electrode connects supply voltage; The grid of M15 connects the first output terminal of reference source circuit, and its drain electrode connects the drain electrode of M16, its source ground current potential; The grid of M16 connects the interconnection point that M9 drains and M13 drains, and its source electrode connects the drain electrode of M17; The source electrode of M17 connects supply voltage, its grid and drain electrode short circuit; The source electrode of M18 connects supply voltage, and its grid connects the grid of M17, and its drain electrode is the output terminal of low temperature compensation circuit;
Described high temperature compensation circuit is by PMOS M19, M20, M25, M26, M27, M28, and NMOS tube M21, M22, M23, M24, M29 are formed; Wherein, the source electrode of M19 connects supply voltage, its grid and drain interconnection, and its drain electrode connects the drain electrode of M21; The grid of M21 connects the second outside positive temperature voltage, and its source electrode connects the drain electrode of M22; The grid of M22 connects the first output terminal of reference source circuit, its source ground current potential; The source electrode of M20 connects supply voltage, and its grid connects the grid of M19, and its drain electrode connects the drain electrode of M23; The grid of M23 and drain interconnection, its source ground current potential; The source electrode of M25 connects supply voltage, and its grid connects the output terminal of electric current source generating circuit, and its drain electrode connects the drain electrode of M24; The grid of M24 connects the grid of M23, its source ground current potential; The grid of M29 connects the first output terminal of reference source circuit, and its drain electrode connects the drain electrode of M28, its source ground current potential; The grid of M28 connects the interconnection point that M25 drains and M24 drains, and its source electrode connects the drain electrode of M26; The source electrode of M26 connects supply voltage, its grid and drain interconnection; The source electrode of M27 connects supply voltage, and its grid connects the grid of M26, and its drain electrode is as high temperature compensation circuit output end.
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CN1508643A (en) * | 2002-12-20 | 2004-06-30 | 上海贝岭股份有限公司 | Voltage source using second-order temperature compensating energy gap reference voltage and method thereof |
JP2004336373A (en) * | 2003-05-07 | 2004-11-25 | Toyo Commun Equip Co Ltd | Temperature compensation piezoelectric oscillator |
WO2006038057A1 (en) * | 2004-10-08 | 2006-04-13 | Freescale Semiconductor, Inc | Reference circuit |
CN1987713A (en) * | 2005-12-23 | 2007-06-27 | 深圳市芯海科技有限公司 | Reference voltage source for low temperature coefficient with gap |
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US5952873A (en) * | 1997-04-07 | 1999-09-14 | Texas Instruments Incorporated | Low voltage, current-mode, piecewise-linear curvature corrected bandgap reference |
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CN1508643A (en) * | 2002-12-20 | 2004-06-30 | 上海贝岭股份有限公司 | Voltage source using second-order temperature compensating energy gap reference voltage and method thereof |
JP2004336373A (en) * | 2003-05-07 | 2004-11-25 | Toyo Commun Equip Co Ltd | Temperature compensation piezoelectric oscillator |
WO2006038057A1 (en) * | 2004-10-08 | 2006-04-13 | Freescale Semiconductor, Inc | Reference circuit |
CN1987713A (en) * | 2005-12-23 | 2007-06-27 | 深圳市芯海科技有限公司 | Reference voltage source for low temperature coefficient with gap |
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