CN204441279U - Bi-directional symmetrical ESD protective device - Google Patents
Bi-directional symmetrical ESD protective device Download PDFInfo
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- CN204441279U CN204441279U CN201520201899.3U CN201520201899U CN204441279U CN 204441279 U CN204441279 U CN 204441279U CN 201520201899 U CN201520201899 U CN 201520201899U CN 204441279 U CN204441279 U CN 204441279U
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- emitter region
- protective device
- esd protective
- doping type
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Abstract
The utility model provides a kind of bi-directional symmetrical ESD protective device, and this device comprises: the Semiconductor substrate of the first doping type, and described Semiconductor substrate is as collector region; The buried regions of the second doping type, is positioned at the front of described Semiconductor substrate, and described second doping type is contrary with the first doping type; The epitaxial loayer of the second doping type, covers on the front of described buried regions; The emitter region of the first doping type, is positioned at the front of described epitaxial loayer.The utility model can make collector electrode in triode to emitter voltage and emitter to collector voltage almost symmetry, forms the ESD protective device of bi-directional symmetrical.
Description
Technical field
The utility model relates to ESD protective device, particularly relates to a kind of bi-directional symmetrical ESD protective device of deep trouth technique.
Background technology
The ESD device of bidirectional protective is more in the market, but the performance of both direction is not substantially symmetrical.Main cause is, current bidirectional protective ESD device all adopts the audion of the NPN type shown in Fig. 1 to realize mostly.This triode comprises: N+ substrate 10, N-epitaxial loayer 11, P+ well region 12, N+ emitter region 13, dielectric layer 14 and electrode 15.Wherein, N-epitaxial loayer 11 is positioned on N+ substrate 10, and P+ well region 12 is formed in N-epitaxial loayer 11, and N+ emitter region 13 is formed in P+ well region 12, is formed with contact hole in dielectric layer 14, and electrode 15 is positioned at this contact hole and and N+ emitter region 13 electrical contact.N+ substrate 10 is as the collector electrode C of triode, and N+ emitter region 13 and electrode 15 are as the emitter E of triode.
For the triode shown in Fig. 1, the doping content of N-epitaxial loayer 11 far below the doping content of N+ emitter region 13, thus causes collector electrode C to emitter E and emitter E to the voltage V of this both direction of collector electrode C
cE, V
eCdiffer more, be difficult to Voltage Cortrol to symmetrical.When applying, generally just the voltage of both direction being adjusted to respectively and can working.
In addition, with reference to figure 2, at present symmetrical ESD protective device is all close envelope by the unidirectional ESD protective device 100 that two characteristics are identical to form usually.Such structure not only causes that chip area is large, cost is high, and is not suitable for small-sized packaging body.
Therefore, need one can realize bi-directional symmetrical performance, and the single-chip protection device that area is less.
Utility model content
Problem to be solved in the utility model is to provide a kind of bi-directional symmetrical ESD protective device, and collector electrode in triode can be made to emitter voltage and emitter to collector voltage almost symmetry.
For solving the problems of the technologies described above, the utility model provides a kind of bi-directional symmetrical ESD protective device, comprising:
The Semiconductor substrate of the first doping type, described Semiconductor substrate is as collector region;
The buried regions of the second doping type, is positioned at the front of described Semiconductor substrate, and described second doping type is contrary with the first doping type;
The epitaxial loayer of the second doping type, covers on the front of described buried regions;
The emitter region of the first doping type, is positioned at the front of described epitaxial loayer.
According to an embodiment of the present utility model, the doping content of described emitter region is consistent with the doping content of described collector region.
According to an embodiment of the present utility model, the voltage of described collector region to emitter region is consistent with the voltage of described emitter region to collector region.
According to an embodiment of the present utility model; described bi-directional symmetrical ESD protective device also comprises: deep trouth; be formed in the subregion of described emitter region, described deep trouth extends from facing down of described emitter region and at least penetrates described epitaxial loayer, is filled with first medium layer in described deep trouth.
According to an embodiment of the present utility model, the width of described deep trouth is 1.5 μm ~ 3.0 μm, and the degree of depth of described deep trouth is 5.0 μm ~ 8.0 μm.
According to an embodiment of the present utility model, described deep trouth runs through described emitter region, epitaxial loayer, buried regions extending in described Semiconductor substrate.
According to an embodiment of the present utility model; described bi-directional symmetrical ESD protective device also comprises: second dielectric layer; cover the front of described emitter region; contact hole is formed in described second dielectric layer; emitter region electrode is filled with, described emitter region electrode and the electrical contact of described emitter region in described contact hole.
According to an embodiment of the present utility model, the thickness of described epitaxial loayer is 4.0 μm ~ 10.00 μm, and resistivity is 2.0 Ω cm-4.0 Ω cm.
Compared with prior art, the utility model has the following advantages:
The bi-directional symmetrical ESD protective device of the utility model embodiment comprises the emitter region of the Semiconductor substrate of the first doping type, the buried regions of the second doping type, the epitaxial loayer of the second doping type and the first doping type; doping content wherein as the Semiconductor substrate of collector region can be consistent with the doping content of emitter region, thus make the V of the triode formed
cEand V
eCbasically identical, form the ESD protective device of bi-directional symmetrical.
Adopt the manufacture method of the utility model embodiment, the ESD protective device of bi-directional symmetrical can be formed, wherein V
cEand V
eCmost low energy is low to moderate 5.0V simultaneously, and under guaranteeing that device capacitor is less than the prerequisite of 7pF, bi-directional ESD ability can be greater than 30kV, and two-way peak current is all greater than 10A, thus goes for the bidirectional protective of the equipment such as mobile phone, notebook computer interface.
In addition, the bi-directional symmetrical ESD protective device of the utility model embodiment also has deep trouth, and this deep trouth is formed in the subregion of emitter region, and facing down to extend to and at least penetrate epitaxial loayer from emitter region, is filled with first medium layer in deep trouth.Deep trouth and first medium layer can provide electric isolution, are conducive to the performance improving bi-directional symmetrical ESD protective device further
Accompanying drawing explanation
Fig. 1 is the cross-sectional view of a kind of bidirectional ESD protective device in prior art;
Fig. 2 is the electrical block diagram of another kind of bidirectional ESD protective device in prior art;
Fig. 3 is the schematic flow sheet of the manufacture method of bi-directional symmetrical ESD protective device according to the utility model embodiment;
Fig. 4 to Figure 11 is the device profile structural representation that in the manufacture method according to the bi-directional symmetrical ESD protective device of the utility model embodiment, each step is corresponding.
Embodiment
Below in conjunction with specific embodiments and the drawings, the utility model is described in further detail, but should not limit protection range of the present utility model with this.
With reference to figure 3, the manufacture method of the bi-directional symmetrical ESD protective device of the utility model embodiment can comprise the steps:
Step S21, provides the Semiconductor substrate of the first doping type, and described Semiconductor substrate is as collector region;
Step S22, forms the buried regions of the second doping type in the front of described Semiconductor substrate, described second doping type is contrary with the first doping type;
Step S23, forms the epitaxial loayer of the second doping type in the front of described buried regions, described epitaxial loayer covers described buried regions;
Step S24, forms the emitter region of the first doping type in the front of described epitaxial loayer.
Wherein, the first doping type is contrary with the second doping type, and one of them is the doping of P type, and another is N-type doping.In the present embodiment, the first doping type is N-type doping, and the second doping type is the doping of P type.It will be appreciated by those skilled in the art that in the embodiment that another are different, the first doping type can be the doping of P type, and the second doping type can be N-type doping.
Be described in detail below in conjunction with Fig. 4 to Figure 11.
With reference to figure 4, provide N+ (that is, N-type is heavily doped) Semiconductor substrate 20, this Semiconductor substrate 20 can be the substrate type of various routine in semiconducter process, such as silicon substrate.The resistivity of this Semiconductor substrate 20 can be such as 0.005 Ω cm≤ρ≤0.02 Ω cm.Semiconductor substrate 20 as the collector region of triode, for the present embodiment, as the collector region of NPN triode.
With reference to figure 5, at the front doped p-type impurity of Semiconductor substrate 20, to form P+ (that is, P type is heavily doped) buried regions 21.Doped chemical, doping way and doping are determined by the voltage request of EDS device.For the device of the 5V voltage request of the present embodiment, impurity can be boron, and doping way is ion implantation, and ion implantation dosage is 4E15/cm
2~ 8E15/cm
2.
After formation buried regions 21, can anneal to buried regions 21.Annealing temperature is preferably 1100 DEG C-1200 DEG C, and annealing time is preferably 1.0h-3.0h.
With reference to figure 6, buried regions 21 forms P-(that is, P type is lightly doped) epitaxial loayer 22.The formation method of epitaxial loayer 22 can be such as chemical vapour deposition (CVD) (CVD).The thickness of epitaxial loayer 22 is preferably 4.0-10.0 μm, and resistivity is preferably 2.0-4.0 Ω cm.
With reference to figure 7, at the front doped N-type impurity of epitaxial loayer 22, to form N+ emitter region 23.The doped chemical of N-type impurity, doping way and doping can be determined according to the voltage request of ESD protective device.For the device of the 5V voltage request of the present embodiment, impurity is preferably phosphorus, and doping way can be ion implantation, and dopant dose is preferably 4E15/cm
2~ 8E15/cm
2.
Behind formation emitter region 23, can anneal to emitter region 23.Annealing temperature is preferably 900 DEG C-1000 DEG C, and annealing time is preferably 0.5h-2.0h.
Preferably, by the control to technological parameter, the doping content of emitter region 23 can be made consistent with the doping content of Semiconductor substrate 20, to realize the bi-directional symmetrical performance of ESD protective device.It should be noted that, " unanimously " in the application refers to that both are identical, or both are in the error range allowed.
Composition graphs 7 and Fig. 8, etch the subregion of emitter region 23, to form deep trouth 25.Furthermore, the forming process of deep trouth 25 can comprise: on the surface of emitter region 23, form mask layer 24, and mask layer 24 can be photoresist or hard mask layer; Mask layer 24 is carried out graphical to define the pattern of deep trouth 25; With patterned mask layer 24 for mask, the rete below emitter region 23 and emitter region 23 is etched, to form deep trouth 25; Remove mask layer 24.
Wherein, deep trouth 25 from the extension that faces down of emitter region 23, and at least penetrates epitaxial loayer 22.In the example shown in Fig. 8, deep trouth 25 runs through emitter region 23, epitaxial loayer 22, buried regions 21 extending in Semiconductor substrate 20.As a nonrestrictive example, the width of deep trouth 25 is 1.5 μm ~ 3.0 μm, and the degree of depth of deep trouth 25 is 5.0 μm ~ 8.0 μm.
With reference to figure 9, fill first medium layer 26 in deep trouth, first medium layer 26 can be such as SiO
2, polysilicon etc.The thickness of first medium layer 26 can be such as 2.0-3.5 μm.
Afterwards, can form second dielectric layer 27 on emitter region 23, the material of second dielectric layer 27 can be identical or different with first medium layer 26.
With reference to Figure 10, by the common process such as photoetching and etching, in second dielectric layer 27, form contact hole 28.The bottom-exposed of the second contact hole 28 goes out a part for emitter region 23.
With reference to Figure 11, fill emitter region electrode 29 in the contact hole.Such as, evaporation or sputtering can be adopted to form the aluminium that thickness is 2.0 μm-3.0 μm.Afterwards, photoetching and etching are carried out to the aluminium formed, has formed emitter region electrode 29.
Afterwards, can deposit passivation layer (not shown) to cover emitter region electrode 29.This passivation layer can be such as thickness be Si of 1.0 μm
3n
4.
Afterwards, photoetching and etching can be carried out to passivation layer, to form pressure point.
In addition, can also form back metal at the back side of Semiconductor substrate 20, this back metal can be such as aluminium.After formation back metal, back metal can be thinned to suitable thickness.
So far, the present embodiment defines the NPN type triode of bi-directional symmetrical, comprising: Semiconductor substrate 20, and Semiconductor substrate 20 is as collector region; Buried regions 21, is positioned at the front of Semiconductor substrate 20; Epitaxial loayer 22, covers on the front of buried regions 21; Emitter region 23, is positioned at the front of epitaxial loayer 22; Deep trouth, is formed in the subregion of emitter region 23, and deep trouth extends from facing down of emitter region 23 and at least penetrates epitaxial loayer 22, is filled with first medium layer 26 in deep trouth; Second dielectric layer 27, covers the front of emitter region 23, is formed with contact hole, is filled with emitter region electrode 29 in this contact hole in second dielectric layer 27, emitter region electrode 29 and emitter region 23 electrical contact.
More specifically, the triode of the present embodiment is N+/P+/P-/N+ structure, the doping content of the doping content of the Semiconductor substrate 20 as collector region and emitter region 23 can be consistent, thus make the V of triode
cEand V
eCunanimously, bi-directional symmetrical is realized.In a concrete example, V
cEand V
eCmost low energy is low to moderate 5.0V simultaneously, and under guaranteeing that device capacitor is less than the prerequisite of 7pF, bi-directional ESD ability can be greater than 30kV, and two-way peak current is all greater than 10A, thus goes for the bidirectional protective of the equipment such as mobile phone, notebook computer interface.
In above-described embodiment, the first doping type is N-type doping, and the second doping type is the doping of P type.It will be appreciated by those skilled in the art that when other conditions are constant, doping type can be exchanged, also namely the first doping type is the doping of P type, and the second doping type is N-type doping, thus forms PNP triode.Such PNP triode also can realize bi-directional symmetrical function.
The above is only preferred embodiment of the present utility model, not does any pro forma restriction to the utility model.Therefore, every content not departing from technical solutions of the utility model, just according to technical spirit of the present utility model to any simple amendment made for any of the above embodiments, equivalent conversion, all still belong in the protection range of technical solutions of the utility model.
Claims (8)
1. a bi-directional symmetrical ESD protective device, is characterized in that, comprising:
The Semiconductor substrate of the first doping type, described Semiconductor substrate is as collector region;
The buried regions of the second doping type, is positioned at the front of described Semiconductor substrate, and described second doping type is contrary with the first doping type;
The epitaxial loayer of the second doping type, covers on the front of described buried regions;
The emitter region of the first doping type, is positioned at the front of described epitaxial loayer.
2. bi-directional symmetrical ESD protective device according to claim 1, is characterized in that, the doping content of described emitter region is consistent with the doping content of described collector region.
3. bi-directional symmetrical ESD protective device according to claim 1 and 2, is characterized in that, the voltage of described collector region to emitter region is consistent with the voltage of described emitter region to collector region.
4. bi-directional symmetrical ESD protective device according to claim 1, is characterized in that, also comprise:
Deep trouth, is formed in the subregion of described emitter region, and described deep trouth extends from facing down of described emitter region and at least penetrates described epitaxial loayer, is filled with first medium layer in described deep trouth.
5. bi-directional symmetrical ESD protective device according to claim 4, is characterized in that, the width of described deep trouth is 1.5 μm ~ 3.0 μm, and the degree of depth of described deep trouth is 5.0 μm ~ 8.0 μm.
6. bi-directional symmetrical ESD protective device according to claim 4, is characterized in that, described deep trouth runs through described emitter region, epitaxial loayer, buried regions extending in described Semiconductor substrate.
7. bi-directional symmetrical ESD protective device according to claim 1, is characterized in that, also comprise:
Second dielectric layer, covers the front of described emitter region, is formed with contact hole in described second dielectric layer, is filled with emitter region electrode in described contact hole, described emitter region electrode and the electrical contact of described emitter region.
8. bi-directional symmetrical ESD protective device according to claim 1, is characterized in that, the thickness of described epitaxial loayer is 4.0 μm ~ 10.00 μm, and resistivity is 2.0 Ω cm-4.0 Ω cm.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201520201899.3U CN204441279U (en) | 2015-04-03 | 2015-04-03 | Bi-directional symmetrical ESD protective device |
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| CN201520201899.3U CN204441279U (en) | 2015-04-03 | 2015-04-03 | Bi-directional symmetrical ESD protective device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104752411A (en) * | 2015-04-03 | 2015-07-01 | 杭州士兰集成电路有限公司 | Two-way symmetric ESD (electronic static discharge) protective device and production method thereof |
| CN111540711A (en) * | 2020-05-09 | 2020-08-14 | 捷捷半导体有限公司 | Method for manufacturing unidirectional negative resistance ESD protection device and unidirectional negative resistance ESD protection device |
-
2015
- 2015-04-03 CN CN201520201899.3U patent/CN204441279U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104752411A (en) * | 2015-04-03 | 2015-07-01 | 杭州士兰集成电路有限公司 | Two-way symmetric ESD (electronic static discharge) protective device and production method thereof |
| CN104752411B (en) * | 2015-04-03 | 2017-10-10 | 杭州士兰集成电路有限公司 | Bi-directional symmetrical ESD protective device and its manufacture method |
| CN111540711A (en) * | 2020-05-09 | 2020-08-14 | 捷捷半导体有限公司 | Method for manufacturing unidirectional negative resistance ESD protection device and unidirectional negative resistance ESD protection device |
| CN111540711B (en) * | 2020-05-09 | 2024-05-14 | 捷捷半导体有限公司 | Method for manufacturing unidirectional negative resistance ESD protection device and unidirectional negative resistance ESD protection device |
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