CN204348708U - 一种扇出型圆片级芯片倒装封装结构 - Google Patents

一种扇出型圆片级芯片倒装封装结构 Download PDF

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CN204348708U
CN204348708U CN201420832321.3U CN201420832321U CN204348708U CN 204348708 U CN204348708 U CN 204348708U CN 201420832321 U CN201420832321 U CN 201420832321U CN 204348708 U CN204348708 U CN 204348708U
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石磊
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Tongfu Microelectronics Co Ltd
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Nantong Fujitsu Microelectronics Co Ltd
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Abstract

本实用新型提供了一种扇出型圆片级芯片倒装封装结构，包括焊盘(2)、芯片(8)、导电层(6)、电介层(5)、锡球(7)和塑封层(4)，芯片(8)安装固定在焊盘(2)上；焊盘(2)与导电层(6)相连，导电层(6)和电介层(5)在同一层面上，电介层(5)把导电层(6)分隔成不相连的不同区域；塑封层(4)是用填料包封芯片(8)、焊盘(2)以及导电层(6)和电介层(5)的上面形成。本实用新型使用铜的含量降低有利于低成本化；另外本实用新型通过去除载板(1)并在底层进行再布线，实现了低成本且可用于各种封装形式以及较高的精准度，同时植球间距利用线路层中铜的部分可以明显降低，加强整体的支撑强度。

Description

一种扇出型圆片级芯片倒装封装结构
技术领域
本实用新型涉及半导体封装技术领域，尤其涉及一种扇出型圆片级芯片倒装封装结构。
背景技术
在当前的半导体行业中，电子封装已经成为行业发展的一个重要方面。几十年的封装技术的发展，使高密度、小尺寸的封装要求成为封装的主流方向。扇出WLP是在晶圆一级加工的埋置型封装，也是一个I/O数量大，集成灵活性高的主要先进封装工艺。而且，它能在一个封装内实现垂直和水平方向多芯片集成且不用衬底。这样，扇出WLP技术目前正在发展成为下一代封装技术，如多芯片、低剖面封装和3DSip。随着电子产品向更薄、更轻、更高引脚密度、更低成本方面发展，采用单颗芯片封装技术已经逐渐无法满足产业需求，一种新的封装技术即圆片级封装技术的出现为封装行业向低成本封装发展提供了契机。
目前，圆片级扇出倒装封装结构，通过重构圆片和圆片级再布线的方式，实现芯片扇出结构的塑封，最终切割成单颗封装体，但其仍存在如下不足：
1)、其强度偏低，使扇出(Fan-out)结构的支撑强度不够，在薄型封装中难以应用；
2)、扇出(Fan-out)结构较为单一，应用不够广泛；
3)、现有工艺不利于产品的低成本化；
4)、I/O端密度相对较低。
如CN103552977A公开了一种微机电系统晶圆级封装结构，包括晶圆，该晶圆具有相对的侧面，其中一个侧面上规律的排布若干个芯片，所述封装结构还包括光学玻璃和环氧树脂圆片，所述环氧树脂圆片上对应所述晶圆的每个芯片位置处分别形成一通孔，该环氧树脂圆片的相对侧面分别与所述光学玻璃的一个侧面和晶圆的设有芯片的一个侧面对应压合形成一体，且压合时所述晶圆上的芯片分别对应所述环氧树脂圆片上的通孔。其采用环氧树脂作为封装材料强度偏低，使扇出(Fan-out)结构的支撑强度不够，在薄型封装中难以应用，其扇出(Fan-out)结构较为单一，应用不够广泛，其I/O端密度相对较低，待封装芯片在塑封工艺中容易出现偏移。
发明内容
为克服现有技术中存在的强度低、成本高、应用范围小以及制造时容易出现偏移等问题，本实用新型提供了一种扇出型圆片级芯片倒装封装结构，包括焊盘2、芯片8、导电层6、电介层5，芯片8安装固定在所述焊盘2上；焊盘2与导电层6相连并位于导电层6上方，导电层6和电介层5在同一层面上，电介层5把导电层6分隔成不相连的不同区域，导电层底部裸露形成电极。
优选地，所述扇出型圆片级芯片倒装封装结构，其特征在于：还包括塑封层4，塑封层4包封芯片8、焊盘2以及导电层6和电介层5。导电层6和电介层5位于塑封层4和焊盘2之下；导电层6位于电介层5和焊盘之间。
进一步，芯片8倒装固定于焊盘2上。导电层6和电介层5有一层或多层。当导电层6有多层时，多层导电层6层层相连形成导电线路。导电层6底部处焊植有金属球7。
与现有技术相比，本实用新型的有益效果是：芯片8外面包覆塑封料，塑封料为酚醛树脂或者增强不饱和树脂材料，其强度高，使扇出(Fan-out)结构的支撑强度增强，适合在薄型封装应用；而且扇出(Fan-out)结构多变，应用广泛；使用铜的含量降低有利于低成本化；I/O端密度一般不会偏低；另外本实用新型通过去除载板1并在底层进行再布线，实现了低成本且可用于各种封装形式以及较高的精准度，同时植球间距利用线路层中铜的部分可以明显降低，加强整体的支撑强度。
附图说明
图1是本实用新型第一具体实施方式中载板1的结构示意图；
图2是本实用新型第一具体实施方式中在载板1上固定焊盘后的结构示意图；
图3是本实用新型第一具体实施方式中在焊盘上倒装芯片8并填充间隙后的结构示意图；
图4是本实用新型第一具体实施方式中包封后的结构示意图；
图5是本实用新型第一具体实施方式中去除载板1的结构示意图；
图6是本实用新型第一具体实施方式中填充电介层5的结构示意图；
图7是本实用新型第一具体实施方式中填充电介层5和填充导电层6的结构示意图；
图8是本实用新型第一具体实施方式和第二具体实施方式中植球后的结构示意图；
图9是本实用新型第一具体实施方式和第二具体实施方式中单颗晶圆封装的结构示意图；
具体实施方式
以下结合附图和实施例，对本实用新型进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本实用新型，并不用于限定本实用新型。
第一具体实施方式：如图1‐图9所示，一种扇出型圆片级芯片倒装封装结构制造方法如下：
步骤一：准备载板1和芯片8，载板1由玻璃片或硅片或者陶瓷片制成；
步骤二：在载板1上布置焊盘2；
步骤三：将芯片8倒装固定于焊盘2上；
步骤四：用填料将芯片8和载板1之间的缝隙填实；
步骤五：包封，用填料料将芯片8、焊盘2以及载板1的上面完全包封形成塑封层4，填料采用非环氧树脂类材料，如酚醛树脂、不饱和树脂类聚合物其中的任一种或其混合材料；
步骤六：采用光刻、化学蚀刻、减薄等方法去除载板1；
步骤七：在底部填充电介层5，电介层5不完全覆盖焊盘2，电阶层采用有机高分子绝缘材料或者无机绝缘材料制成；
步骤八：填充导电层6，导电层6和焊盘2相连，导电层6采用铜或者其合金制成；
步骤九：重复步骤七、八进行再布线，使多层导电层(6)相连形成底层线路；
步骤十：对上述步骤九中形成的封装芯片进行减薄、切割，形成单颗的扇出型圆片级芯片封装结构。
步骤十一：在导电层6部位焊接锡球7。
第二具体实施方式：如图9所示，一种扇出型圆片级芯片倒装封装结构，包括焊盘2、芯片8、导电层6、电介层5、锡球7和塑封层4；芯片8倒装固定于焊盘2上；塑封层4是用填料包封芯片8、焊盘2以及导电层6和电介层5的上面形成，塑封层4的材料采用非环氧树脂类高分子材料，如酚醛树脂或者增强不饱和树脂类材料；导电层6连接焊盘2并且有一层或多层，当有多层时，多层导电层6相连形成导电线路，底部导电层6位置处设置有锡球7；导电层6采用铜或者铜的合金为材料。
导电层6部位焊接有锡球7。
在使用时外接设备连接一个芯片封装结构的锡球7，则芯片8通过焊盘2、导电层6和锡球7与外接设备形成电流回路。
本实用新型的有益效果是：芯片8外面包覆塑封料，塑封料为酚醛树脂或者增强不饱和树脂材料，其强度高，使扇出(Fan‐out)结构的支撑强度增强，适合在薄型封装应用；而且扇出(Fan‐out)结构多变，应用广泛；使用铜的含量降低有利于低成本化；I/O端密度一般不会偏低；另外本实用新型通过去除载板1并在底层进行再布线，实现了低成本且可用于各种封装形式以及较高的精准度，同时植球间距利用线路层中铜的部分可以明显降低，加强整体的支撑强度。
上述说明示出并描述了本实用新型的优选实施例，如前所述，应当理解本实用新型并非局限于本文所披露的形式，不应看作是对其他实施例的排除，而可用于各种其他组合、修改和环境，并能够在本文所述发明构想范围内，通过上述教导或相关领域的技术或知识进行改动。而本领域人员所进行的改动和变化不脱离本实用新型的精神和范围，则都应在本实用新型所附权利要求的保护范围内。

Claims (8)

1.一种扇出型圆片级芯片倒装封装结构，包括焊盘(2)、芯片(8)、导电层(6)、电介层(5)，其特征在于：芯片(8)安装固定在所述焊盘(2)上；焊盘(2)与导电层(6)相连并位于导电层(6)上方，导电层(6)和电介层(5)在同一层面上，电介层(5)把导电层(6)分隔成不相连的不同区域，导电层底部裸露形成电极。
2.根据权利要求1所述的一种扇出型圆片级芯片倒装封装结构，其特征在于：还包括塑封层(4)，塑封层(4)包封芯片(8)、焊盘(2)以及导电层(6)和电介层(5)。
3.根据权利要求2所述的一种扇出型圆片级芯片倒装封装结构，其特征在于：
芯片(8)倒装固定于焊盘(2)上。
4.根据权利要求3所述的一种扇出型圆片级芯片倒装封装结构，其特征在于：导电层(6)和电介层(5)有一层或多层。
5.根据权利要求4所述的一种扇出型圆片级芯片倒装封装结构，其特征在于：当导电层(6)有多层时，多层导电层(6)层层相连形成导电线路。
6.根据权利要求5所述的一种扇出型圆片级芯片倒装封装结构，其特征在于：导电层(6)底部处焊植有金属球(7)。
7.根据权利要求6所述的一种扇出型圆片级芯片倒装封装结构，其特征在于：金属球为锡球。
8.根据权利要求7所述的一种扇出型圆片级芯片倒装封装结构，其特征在于：导电层(6)采用铜或者铜的合金为材料。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105206539A (zh) * 2015-09-01 2015-12-30 华进半导体封装先导技术研发中心有限公司 扇出型封装制备方法
CN111430322A (zh) * 2020-03-05 2020-07-17 广东工业大学 一种系统级扇出型封装结构及封装方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105206539A (zh) * 2015-09-01 2015-12-30 华进半导体封装先导技术研发中心有限公司 扇出型封装制备方法
CN111430322A (zh) * 2020-03-05 2020-07-17 广东工业大学 一种系统级扇出型封装结构及封装方法

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