CN204335023U - A kind of gate drivers based on boostrap circuit - Google Patents
A kind of gate drivers based on boostrap circuit Download PDFInfo
- Publication number
- CN204335023U CN204335023U CN201420707145.0U CN201420707145U CN204335023U CN 204335023 U CN204335023 U CN 204335023U CN 201420707145 U CN201420707145 U CN 201420707145U CN 204335023 U CN204335023 U CN 204335023U
- Authority
- CN
- China
- Prior art keywords
- driving chip
- field effect
- effect transistor
- pin
- transistor mos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection
Abstract
The utility model discloses a kind of gate drivers based on boostrap circuit, primarily of driving chip M, and the drive circuit to be connected with driving chip M forms, it is characterized in that, also be provided with boostrap circuit, and this boostrap circuit is by field effect transistor MOS, one end is connected with the source electrode of field effect transistor MOS, the resistance R5 of other end ground connection, positive pole is connected with the source electrode of field effect transistor MOS, the polar capacitor C6 that negative pole is connected with the INP pin of driving chip M, negative pole is connected with the grid of field effect transistor MOS, the compositions such as the polar capacitor C1 that positive pole is connected with the drain electrode of field effect transistor MOS after resistance R1.The utility model overall structure is very simple, and it makes and very easy to use.Meanwhile, be only 1/4 of conventional gate drive circuit start-up time start-up time of the present utility model, its start-up time is extremely short.
Description
Technical field
The utility model relates to a kind of LED drive circuit, specifically refers to a kind of gate drivers based on boostrap circuit.
Background technology
At present, because LED has, energy consumption is low, the feature such as long service life and safety and environmental protection, and it has become one of main product of people's life lighting.Because LED is different from traditional incandescent lamp, therefore its needs are driven by special drive circuit.But, the widely used gate driver circuit of current people due to the irrationality of its project organization, defects such as result in current gate driver circuit and have that energy consumption is higher, current noise comparatively large and start-up time is longer.
Utility model content
The purpose of this utility model is the defect that energy consumption is higher, current noise is comparatively large and start-up time is longer overcoming the existence of current gate driver circuit, a kind of reasonable in design is provided, can effectively reduce energy consumption and current noise, obviously shorten a kind of gate drivers based on boostrap circuit of start-up time.
The purpose of this utility model is achieved through the following technical solutions: a kind of gate drivers based on boostrap circuit, and primarily of driving chip M, and the drive circuit be connected with driving chip M forms.Simultaneously, also be provided with boostrap circuit, and this boostrap circuit is by field effect transistor MOS, one end is connected with the source electrode of field effect transistor MOS, the resistance R5 of other end ground connection, positive pole is connected with the source electrode of field effect transistor MOS, the polar capacitor C6 that negative pole is connected with the INP pin of driving chip M, negative pole is connected with the grid of field effect transistor MOS, the polar capacitor C1 that positive pole is connected with the drain electrode of field effect transistor MOS after resistance R1, the resistance R2 be in parallel with polar capacitor C1, positive pole is connected with the positive pole of polar capacitor C1, the polar capacitor C5 that negative pole is connected with the source electrode of field effect transistor MOS, and one end is connected with the positive pole of polar capacitor C5, the resistance R4 of other end ground connection forms, the drain electrode of described field effect transistor MOS is also connected with the VCC pin of driving chip M.
Described drive circuit is by transformer T, be serially connected with the diode D1 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C2 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R3 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode in turn after electric capacity C3 and electric capacity C4 ground connection and the transistor Q1 of grounded emitter form; The Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C4 with electric capacity C3, ground connection after its non-same polarity is then connected with the emitter of transistor Q1; Meanwhile, the emitter of transistor Q1 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
For guaranteeing result of use, described driving chip M preferentially adopts LTC4440A integrated chip to realize.
The utility model comparatively prior art is compared, and has the following advantages and beneficial effect:
(1) the utility model overall structure is very simple, and it makes and very easy to use.
(2) be only 1/4 of conventional gate drive circuit start-up time start-up time of the present utility model, its start-up time is extremely short.
(3) the utility model adopts boostrap circuit to provide control signal for driving chip, therefore has very high input impedance, can guarantee the stable performance of whole circuit.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present utility model.
Embodiment
Below in conjunction with embodiment, the utility model is described in further detail, but execution mode of the present utility model is not limited thereto.
Embodiment
As shown in Figure 1, the gate drivers based on boostrap circuit described in the utility model, primarily of driving chip M, the drive circuit be connected with driving chip M, and the boostrap circuit be connected with driving chip M forms.
Described boostrap circuit is made up of field effect transistor MOS, polar capacitor C1, polar capacitor C5, polar capacitor C6, resistance R1, resistance R2, resistance R4 and resistance R5.During connection, one end of resistance R5 is connected with the source electrode of field effect transistor MOS, its other end ground connection; The positive pole of polar capacitor C6 is connected with the source electrode of field effect transistor MOS, and its negative pole is connected with the INP pin of driving chip M; The negative pole of polar capacitor C1 is connected with the grid of field effect transistor MOS, and its positive pole is connected with the drain electrode of field effect transistor MOS after resistance R1, and resistance R2 is then in parallel with polar capacitor C1.
The positive pole of described polar capacitor C5 is connected with the positive pole of polar capacitor C1, and its negative pole is connected with the source electrode of field effect transistor MOS.And one end of resistance R4 is connected with the positive pole of polar capacitor C5, its other end ground connection.
For guaranteeing the normal work of field effect transistor MOS and driving chip M, therefore the drain electrode of this field effect transistor MOS is also connected with the VCC pin of driving chip M, and the VCC pin of this driving chip M needs the power supply of external+12V.
For guaranteeing result of use, the high-frequency N-channel MOS FET grid drive chip that this driving chip M preferentially adopts Linear Techn Inc. to produce, namely LTC4440A integrated chip realizes.The feature of this driving chip M is can with the input voltage work up to 80V, and can up to can continuous operation during 100V transient state.
Described drive circuit is then made up of transformer T, diode D1, electric capacity C2, resistance R3, electric capacity C3, electric capacity C4 and transistor Q1.During connection, the P pole of diode D1 is connected with the VCC pin of driving chip M, and its N pole is then connected with the BOOST pin of driving chip M.The positive pole of electric capacity C2 is connected with the BOOST pin of driving chip M, and its negative pole is then connected with the TG pin of driving chip M.For guaranteeing the normal operation of driving chip M, its VCC holds the voltage needing external+12V.
Resistance R3 is divider resistance, and it is serially connected with between the TG pin of driving chip M and TS pin.The base stage of transistor Q1 is then connected with the TG pin of driving chip M, and its collector electrode is ground connection after electric capacity C3 and electric capacity C4 in turn, its grounded emitter.Meanwhile, the collector electrode of this transistor Q1 also needs the direct voltage of external+6V, to guarantee that transistor Q1 has enough bias voltages to drive himself conducting.
For guaranteeing result of use, described electric capacity C2, electric capacity C3 and electric capacity C4 all adopt patch capacitor to realize.Described transformer T exports to outside field effect transistor after being used for that+the 6V of outside direct voltage is carried out transformation process.
The Same Name of Ends of the primary coil of this transformer T is connected with the tie point of electric capacity C4 with electric capacity C3, ground connection after its non-same polarity is then connected with the emitter of transistor Q1.Meanwhile, the emitter of transistor Q1 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
The Same Name of Ends of the secondary coil of transformer T, tap Y1, tap Y2 together with the non-same polarity of secondary coil as output of the present utility model.According to the situation of reality, user can only select any one or several port of these four outputs to use.
As mentioned above, just the utility model can well be realized.
Claims (3)
1. the gate drivers based on boostrap circuit, primarily of driving chip M, and the drive circuit to be connected with driving chip M forms, it is characterized in that, also be provided with boostrap circuit, and this boostrap circuit is by field effect transistor MOS, one end is connected with the source electrode of field effect transistor MOS, the resistance R5 of other end ground connection, positive pole is connected with the source electrode of field effect transistor MOS, the polar capacitor C6 that negative pole is connected with the INP pin of driving chip M, negative pole is connected with the grid of field effect transistor MOS, the polar capacitor C1 that positive pole is connected with the drain electrode of field effect transistor MOS after resistance R1, the resistance R2 be in parallel with polar capacitor C1, positive pole is connected with the positive pole of polar capacitor C1, the polar capacitor C5 that negative pole is connected with the source electrode of field effect transistor MOS, and one end is connected with the positive pole of polar capacitor C5, the resistance R4 of other end ground connection forms, the drain electrode of described field effect transistor MOS is also connected with the VCC pin of driving chip M.
2. a kind of gate drivers based on boostrap circuit according to claim 1, it is characterized in that, described drive circuit is by transformer T, be serially connected with the diode D1 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C2 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R3 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode in turn after electric capacity C3 and electric capacity C4 ground connection and the transistor Q1 of grounded emitter form; The Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C4 with electric capacity C3, ground connection after its non-same polarity is then connected with the emitter of transistor Q1; Meanwhile, the emitter of transistor Q1 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
3. a kind of gate drivers based on boostrap circuit according to claim 2, is characterized in that, described driving chip M is LTC4440A integrated chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420707145.0U CN204335023U (en) | 2014-11-22 | 2014-11-22 | A kind of gate drivers based on boostrap circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420707145.0U CN204335023U (en) | 2014-11-22 | 2014-11-22 | A kind of gate drivers based on boostrap circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204335023U true CN204335023U (en) | 2015-05-13 |
Family
ID=53171327
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420707145.0U Expired - Fee Related CN204335023U (en) | 2014-11-22 | 2014-11-22 | A kind of gate drivers based on boostrap circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204335023U (en) |
-
2014
- 2014-11-22 CN CN201420707145.0U patent/CN204335023U/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104470105A (en) | Logic protection amplifying grid drive system based on bootstrap circuit | |
| CN204335023U (en) | A kind of gate drivers based on boostrap circuit | |
| CN104486868A (en) | Power amplification type grid electrode driving system | |
| CN104485804A (en) | Novel logic protection emitter coupling type gate driving system | |
| CN104411047A (en) | Energy-saving power-amplifying-type grid driving system | |
| CN204316789U (en) | A kind of self-locking optical excitation raster data model system based on power amplification | |
| CN104470077A (en) | Gate driver based on bootstrap circuit | |
| CN104470088A (en) | Grid drive system for LED lamp protection system | |
| CN204316804U (en) | A kind of novel grid drive system | |
| CN204335037U (en) | A kind of virtual protection amplifying type raster data model system based on boostrap circuit | |
| CN204316791U (en) | A kind of power amplification formula raster data model system | |
| CN104393742A (en) | Power amplifying circuit and excitation circuit based mixed type gate driving system | |
| CN204316796U (en) | A kind of energy-saving power amplification formula raster data model system | |
| CN204316313U (en) | A kind of new logic protection emitter-base bandgap grading manifold type raster data model system | |
| CN204316782U (en) | A kind of mixed type raster data model system | |
| CN204335006U (en) | A kind of self-locking optical excitation gate driver circuit | |
| CN104394629A (en) | Novel gate drive system | |
| CN204316788U (en) | A kind of LED protection system raster data model system | |
| CN204335053U (en) | A kind of mixed type raster data model system | |
| CN204335005U (en) | A kind of homophase AC signal amplifying type optical excitation gate driver circuit | |
| CN204316792U (en) | A kind of power amplification formula mixed type raster data model system | |
| CN204305404U (en) | Based on the raster data model system of beam excitation formula switch power amplifying circuit | |
| CN204335046U (en) | A kind of mixed type raster data model system of logic-based protection manifold type amplifying circuit | |
| CN204335030U (en) | A kind of virtual protection amplifying type self-locking optical excitation raster data model system | |
| CN204335045U (en) | A kind of homophase AC signal amplifying type raster data model system of logic-based protection emitter-base bandgap grading manifold type |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150513 Termination date: 20151122 |
|
| EXPY | Termination of patent right or utility model |