CN204335045U - A kind of homophase AC signal amplifying type raster data model system of logic-based protection emitter-base bandgap grading manifold type - Google Patents
A kind of homophase AC signal amplifying type raster data model system of logic-based protection emitter-base bandgap grading manifold type Download PDFInfo
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- CN204335045U CN204335045U CN201420735493.9U CN201420735493U CN204335045U CN 204335045 U CN204335045 U CN 204335045U CN 201420735493 U CN201420735493 U CN 201420735493U CN 204335045 U CN204335045 U CN 204335045U
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Abstract
The utility model discloses the homophase AC signal amplifying type raster data model system of a kind of logic-based protection emitter-base bandgap grading manifold type; primarily of driving chip M; self-locking optical excitation circuit; the drive circuit be connected with driving chip M; and the homophase AC signal amplifying circuit be arranged between driving chip M and self-locking energizing circuit forms; it is characterized in that, between the negative input of the output AND OR NOT gate IC3 of NOR gate IC2, be also serially connected with virtual protection emitter-base bandgap grading manifold type amplifying circuit.The utility model can excite the correlation function of driving chip M automatically according to outside illumination condition, without the need to increasing extra starting drive, therefore its power consumption is lower.
Description
Technical field
The utility model relates to a kind of LED drive circuit, specifically refers to the homophase AC signal amplifying type raster data model system of a kind of logic-based protection emitter-base bandgap grading manifold type.
Background technology
At present, because LED has, energy consumption is low, the feature such as long service life and safety and environmental protection, and it has become one of main product of people's life lighting.Because LED is different from traditional incandescent lamp, therefore its needs are driven by special drive circuit.But, the widely used gate driver circuit of current people due to the irrationality of its project organization, defects such as result in current gate driver circuit and have that energy consumption is higher, current noise comparatively large and start-up time is longer.
Utility model content
The purpose of this utility model is the defect that energy consumption is higher, current noise is comparatively large and start-up time is longer overcoming the existence of current gate driver circuit; a kind of reasonable in design is provided; can effectively reduce energy consumption and current noise, obviously shorten the homophase AC signal amplifying type raster data model system of a kind of logic-based protection emitter-base bandgap grading manifold type of start-up time.
The purpose of this utility model is achieved through the following technical solutions: a kind of homophase AC signal amplifying type raster data model system of logic-based protection emitter-base bandgap grading manifold type, primarily of driving chip M, self-locking optical excitation circuit, the drive circuit be connected with driving chip M, and the homophase AC signal amplifying circuit be arranged between driving chip M and self-locking energizing circuit forms; Described homophase AC signal amplifying circuit is by power amplifier P1, the resistance R4 that one end is connected with the VCC pin of driving chip M, the other end is connected with the electrode input end of power amplifier P1, the resistance R5 that one end is connected with the negative input of power amplifier P1, the other end is connected with self-locking optical excitation circuit, and positive pole is connected with the electrode input end of power amplifier P1, the polar capacitor C5 of negative pole external power supply forms, the output of described power amplifier P1 is connected with the INP pin of driving chip M; Described self-locking optical excitation circuit is by NOR gate IC1, NOR gate IC2, NOR gate IC3, one end is connected with the electrode input end of power amplifier P1, the photocell CDS of other end ground connection after potentiometer R2, the resistance R1 that one end is connected with the electrode input end of power amplifier P1, the negative input of other end AND OR NOT gate IC2 is connected, and the electric capacity C1 be serially connected between the electrode input end of NOR gate IC3 and output forms; The electrode input end of described NOR gate IC1 is connected with the tie point of potentiometer R2 with photocell CDS, and the output of its negative input AND OR NOT gate IC2 is connected, and the electrode input end of its output then AND OR NOT gate IC2 is connected; The output of described NOR gate IC3 is connected with the output of power amplifier P1, and the output of the other end of resistance R5 then AND OR NOT gate IC2 is connected.
Meanwhile, between the negative input of the output AND OR NOT gate IC3 of NOR gate IC2, virtual protection emitter-base bandgap grading manifold type amplifying circuit is also serially connected with, this virtual protection emitter-base bandgap grading manifold type amplifying circuit is primarily of triode Q2, triode Q3, power amplifier P2, power amplifier P3, be serially connected in the resistance R7 between the negative input of power amplifier P2 and output, be serially connected in the polar capacitor C8 between the electrode input end of power amplifier P3 and output, be serially connected in the resistance R6 between the electrode input end of power amplifier P2 and the collector electrode of triode Q2, be serially connected in the resistance R8 between the collector electrode of triode Q2 and the base stage of triode Q3, the electric capacity C7 be in parallel with resistance R8, negative pole is connected with the electrode input end of power amplifier P2, the polar capacitor C6 that positive pole is connected with the emitter of triode Q2 after resistance R9, be serially connected in the resistance R10 between the base stage of triode Q3 and the positive pole of polar capacitor C6, positive pole is connected with the emitter of triode Q3, negative pole is in turn through electric capacity C9 that voltage stabilizing didoe D2 is connected with the output of power amplifier P2 after resistance R11, P pole is connected with the output of power amplifier P3, the diode D3 that N pole is connected with the tie point of resistance R11 with voltage stabilizing didoe D2 after resistance R12 through resistance R13, and P pole is connected with the negative pole of electric capacity C9, the voltage stabilizing didoe D4 that N pole is connected with the tie point of resistance R13 with diode D3 forms, the base stage of described triode Q2 is connected with the positive pole of polar capacitor C6, and its emitter is connected with the emitter of triode Q3, and its collector electrode is connected with the negative input of power amplifier P2, the collector electrode of triode Q3 is connected with the negative input of power amplifier P3, and the electrode input end of power amplifier P3 is connected with the output of power amplifier P2, the output of the positive pole AND OR NOT gate IC2 of described polar capacitor C6 is connected, and the negative input of the tie point of resistance R13 and resistance R12 then AND OR NOT gate IC3 is connected.
Described drive circuit is by transformer T, be serially connected with the diode D1 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C2 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R3 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode in turn after electric capacity C3 and electric capacity C4 ground connection and the transistor Q1 of grounded emitter form; The Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C4 with electric capacity C3, ground connection after its non-same polarity is then connected with the emitter of transistor Q1; Meanwhile, the emitter of transistor Q1 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
For guaranteeing result of use, described driving chip M is LTC4440A integrated chip.
The utility model comparatively prior art is compared, and has the following advantages and beneficial effect:
(1) the utility model can excite the correlation function of driving chip M automatically according to outside illumination condition, and without the need to increasing extra starting drive, therefore its power consumption is lower.
(2) be only 1/4 of conventional gate drive circuit start-up time start-up time of the present utility model, therefore its start-up time is extremely short.
(3) the utility model effectively can avoid external electromagnetic interference, can reduce current noise significantly.
(4) be provided with homophase AC signal amplifying circuit in the utility model, therefore can guarantee that the intensity of pulse signal can not decay, thus guarantee stable performance.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present utility model.
Fig. 2 is the structural representation of virtual protection emitter-base bandgap grading manifold type amplifying circuit of the present utility model.
Embodiment
Below in conjunction with embodiment, the utility model is described in further detail, but execution mode of the present utility model is not limited thereto.
Embodiment
As shown in Figure 1; the utility model primarily of driving chip M, virtual protection emitter-base bandgap grading manifold type amplifying circuit, self-locking optical excitation circuit; the drive circuit be connected with driving chip M, the homophase AC signal amplifying circuit be arranged between driving chip M and self-locking energizing circuit forms.
The pulse signal that described homophase AC signal amplifying circuit is used for self-locking energizing circuit lock produces amplifies, to avoid signal attenuation.It is by power amplifier P1, and resistance R4, resistance R5 and polar capacitor C5 form.During connection, one end of resistance R4 is connected with the VCC pin of driving chip M, and its other end is connected with the electrode input end of power amplifier P1; One end of resistance R5 is connected with the negative input of power amplifier P1, and its other end is then connected with self-locking optical excitation circuit; The positive pole of polar capacitor C5 is then connected with the electrode input end of power amplifier P1, its negative pole external power supply.Meanwhile, the output of this power amplifier P1 will be connected with the INP pin of driving chip M.
For guaranteeing that power amplifier P1 can normally work, the supply voltage that the negative pole of this polar capacitor C5 is external needs to be between 6 ~ 12V.Meanwhile, for guaranteeing result of use, the high-frequency N-channel MOS FET grid drive chip that this driving chip M preferentially adopts Linear Techn Inc. to produce, namely LTC4440A integrated chip realizes.The feature of this driving chip M is can with the input voltage work up to 80V, and can up to can continuous operation during 100V transient state.
Wherein, described self-locking optical excitation circuit is then by NOR gate IC1, and NOR gate IC2, NOR gate IC3, photocell CDS, resistance R1, potentiometer R2 and electric capacity C1 form.During connection, one end of photocell CDS is connected with the electrode input end of power amplifier P1, and its other end is ground connection after potentiometer R2.One end of resistance R1 is connected with the electrode input end of power amplifier P1, and the negative input of its other end AND OR NOT gate IC2 is connected; The electrode input end of the positive pole AND OR NOT gate IC3 of electric capacity C1 is connected, and the output of its negative pole then AND OR NOT gate IC3 is connected.
The electrode input end of described NOR gate IC1 is connected with the tie point of potentiometer R2 with photocell CDS, and the output of its negative input AND OR NOT gate IC2 is connected, and the electrode input end of its output then AND OR NOT gate IC2 is connected.The output of described NOR gate IC3 is connected with the output of power amplifier P1.
The output of the other end of described resistance R5 then AND OR NOT gate IC2 is connected, and the pulse signal that namely output of NOR gate IC2 exports can be input to the negative input of power amplifier P1 after resistance R5.
Described drive circuit is then made up of transformer T, diode D1, electric capacity C2, resistance R3, electric capacity C3, electric capacity C4 and transistor Q1.During connection, the P pole of diode D1 is connected with the VCC pin of driving chip M, and its N pole is then connected with the BOOST pin of driving chip M.The positive pole of electric capacity C2 is connected with the BOOST pin of driving chip M, and its negative pole is then connected with the TG pin of driving chip M.For guaranteeing the normal operation of driving chip M, its VCC holds the voltage needing external+12V.
Resistance R3 is divider resistance, and it is serially connected with between the TG pin of driving chip M and TS pin.The base stage of transistor Q1 is then connected with the TG pin of driving chip M, and its collector electrode is ground connection after electric capacity C3 and electric capacity C4 in turn, its grounded emitter.Meanwhile, the collector electrode of this transistor Q1 also needs the direct voltage of external+6V, to guarantee that transistor Q1 has enough bias voltages to drive himself conducting.
Described transformer T exports to outside field effect transistor after being used for that+the 6V of outside direct voltage is carried out transformation process.The Same Name of Ends of the primary coil of this transformer T is connected with the tie point of electric capacity C4 with electric capacity C3, ground connection after its non-same polarity is then connected with the emitter of transistor Q1.Meanwhile, the emitter of transistor Q1 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
The Same Name of Ends of the secondary coil of transformer T, tap Y1, tap Y2 together with the non-same polarity of secondary coil as output of the present utility model.According to the situation of reality, user can only select any one or several port of these four outputs to use.
As shown in Figure 2, this virtual protection emitter-base bandgap grading manifold type amplifying circuit is primarily of triode Q2, triode Q3, power amplifier P2, power amplifier P3, be serially connected in the resistance R7 between the negative input of power amplifier P2 and output, be serially connected in the polar capacitor C8 between the electrode input end of power amplifier P3 and output, be serially connected in the resistance R6 between the electrode input end of power amplifier P2 and the collector electrode of triode Q2, be serially connected in the resistance R8 between the collector electrode of triode Q2 and the base stage of triode Q3, the electric capacity C7 be in parallel with resistance R8, negative pole is connected with the electrode input end of power amplifier P2, the polar capacitor C6 that positive pole is connected with the emitter of triode Q2 after resistance R9, be serially connected in the resistance R10 between the base stage of triode Q3 and the positive pole of polar capacitor C6, positive pole is connected with the emitter of triode Q3, negative pole is in turn through electric capacity C9 that voltage stabilizing didoe D2 is connected with the output of power amplifier P2 after resistance R11, P pole is connected with the output of power amplifier P3, the diode D3 that N pole is connected with the tie point of resistance R11 with voltage stabilizing didoe D2 after resistance R12 through resistance R13, and P pole is connected with the negative pole of electric capacity C9, the voltage stabilizing didoe D4 that N pole is connected with the tie point of resistance R13 with diode D3 forms.
The base stage of described triode Q2 is connected with the positive pole of polar capacitor C6, and its emitter is connected with the emitter of triode Q3, and its collector electrode is connected with the negative input of power amplifier P2; The collector electrode of triode Q3 is connected with the negative input of power amplifier P3, and the electrode input end of power amplifier P3 is connected with the output of power amplifier P2.During connection, the output of the positive pole AND OR NOT gate IC2 of described polar capacitor C6 is connected, and the negative input of the tie point of resistance R13 and resistance R12 then AND OR NOT gate IC3 is connected.
As mentioned above, just the utility model can well be realized.
Claims (3)
1. the homophase AC signal amplifying type raster data model system of a logic-based protection emitter-base bandgap grading manifold type, primarily of driving chip M, self-locking optical excitation circuit, the drive circuit be connected with driving chip M, and the homophase AC signal amplifying circuit be arranged between driving chip M and self-locking energizing circuit forms; Described homophase AC signal amplifying circuit is by power amplifier P1, the resistance R4 that one end is connected with the VCC pin of driving chip M, the other end is connected with the electrode input end of power amplifier P1, the resistance R5 that one end is connected with the negative input of power amplifier P1, the other end is connected with self-locking optical excitation circuit, and positive pole is connected with the electrode input end of power amplifier P1, the polar capacitor C5 of negative pole external power supply forms, the output of described power amplifier P1 is connected with the INP pin of driving chip M; Described self-locking optical excitation circuit is by NOR gate IC1, NOR gate IC2, NOR gate IC3, one end is connected with the electrode input end of power amplifier P1, the photocell CDS of other end ground connection after potentiometer R2, the resistance R1 that one end is connected with the electrode input end of power amplifier P1, the negative input of other end AND OR NOT gate IC2 is connected, and the electric capacity C1 be serially connected between the electrode input end of NOR gate IC3 and output forms; The electrode input end of described NOR gate IC1 is connected with the tie point of potentiometer R2 with photocell CDS, and the output of its negative input AND OR NOT gate IC2 is connected, and the electrode input end of its output then AND OR NOT gate IC2 is connected; The output of described NOR gate IC3 is connected with the output of power amplifier P1, the output of the other end of resistance R5 then AND OR NOT gate IC2 is connected, it is characterized in that, between the negative input of the output AND OR NOT gate IC3 of NOR gate IC2, be also serially connected with virtual protection emitter-base bandgap grading manifold type amplifying circuit;
This virtual protection emitter-base bandgap grading manifold type amplifying circuit is primarily of triode Q2, triode Q3, power amplifier P2, power amplifier P3, be serially connected in the resistance R7 between the negative input of power amplifier P2 and output, be serially connected in the polar capacitor C8 between the electrode input end of power amplifier P3 and output, be serially connected in the resistance R6 between the electrode input end of power amplifier P2 and the collector electrode of triode Q2, be serially connected in the resistance R8 between the collector electrode of triode Q2 and the base stage of triode Q3, the electric capacity C7 be in parallel with resistance R8, negative pole is connected with the electrode input end of power amplifier P2, the polar capacitor C6 that positive pole is connected with the emitter of triode Q2 after resistance R9, be serially connected in the resistance R10 between the base stage of triode Q3 and the positive pole of polar capacitor C6, positive pole is connected with the emitter of triode Q3, negative pole is in turn through electric capacity C9 that voltage stabilizing didoe D2 is connected with the output of power amplifier P2 after resistance R11, P pole is connected with the output of power amplifier P3, the diode D3 that N pole is connected with the tie point of resistance R11 with voltage stabilizing didoe D2 after resistance R12 through resistance R13, and P pole is connected with the negative pole of electric capacity C9, the voltage stabilizing didoe D4 that N pole is connected with the tie point of resistance R13 with diode D3 forms, the base stage of described triode Q2 is connected with the positive pole of polar capacitor C6, and its emitter is connected with the emitter of triode Q3, and its collector electrode is connected with the negative input of power amplifier P2, the collector electrode of triode Q3 is connected with the negative input of power amplifier P3, and the electrode input end of power amplifier P3 is connected with the output of power amplifier P2, the output of the positive pole AND OR NOT gate IC2 of described polar capacitor C6 is connected, and the negative input of the tie point of resistance R13 and resistance R12 then AND OR NOT gate IC3 is connected.
2. the homophase AC signal amplifying type raster data model system of a kind of logic-based protection emitter-base bandgap grading manifold type according to claim 1, it is characterized in that, described drive circuit is by transformer T, be serially connected with the diode D1 between the VCC pin of driving chip M and BOOST pin, be serially connected with the electric capacity C2 between the BOOST pin of driving chip M and TG pin, be serially connected with the resistance R3 between the TG pin of driving chip M and TS pin, and base stage is connected with the TG pin of driving chip M, collector electrode is ground connection after electric capacity C3 and electric capacity C4 in turn, and the transistor Q1 of grounded emitter forms, the Same Name of Ends of the primary coil of described transformer T is connected with the tie point of electric capacity C4 with electric capacity C3, ground connection after its non-same polarity is then connected with the emitter of transistor Q1, meanwhile, the emitter of transistor Q1 is also connected with the TS pin of driving chip M, and the secondary coil of described transformer T is provided with tap Y1 and tap Y2.
3. the homophase AC signal amplifying type raster data model system of a kind of logic-based protection emitter-base bandgap grading manifold type according to claim 2, it is characterized in that, described driving chip M is LTC4440A integrated chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420735493.9U CN204335045U (en) | 2014-11-28 | 2014-11-28 | A kind of homophase AC signal amplifying type raster data model system of logic-based protection emitter-base bandgap grading manifold type |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420735493.9U CN204335045U (en) | 2014-11-28 | 2014-11-28 | A kind of homophase AC signal amplifying type raster data model system of logic-based protection emitter-base bandgap grading manifold type |
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| CN204335045U true CN204335045U (en) | 2015-05-13 |
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| CN201420735493.9U Expired - Fee Related CN204335045U (en) | 2014-11-28 | 2014-11-28 | A kind of homophase AC signal amplifying type raster data model system of logic-based protection emitter-base bandgap grading manifold type |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150513 Termination date: 20151128 |