CN204044342U - Two-way hysteresis comparator circuit and magnetic sensor circuit - Google Patents

Two-way hysteresis comparator circuit and magnetic sensor circuit Download PDF

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Publication number
CN204044342U
CN204044342U CN201420296254.8U CN201420296254U CN204044342U CN 204044342 U CN204044342 U CN 204044342U CN 201420296254 U CN201420296254 U CN 201420296254U CN 204044342 U CN204044342 U CN 204044342U
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current mirror
circuit
mirror transistor
input end
hysteresis comparator
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杨瑞聪
姜帆
高耿辉
高伟钧
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DALIAN LIANSHUN ELECTRONICS CO LTD
Xiamen Yuanshun Microelectronics Technology Co ltd
Unisonic Technologies Co Ltd
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DALIAN LIANSHUN ELECTRONICS CO LTD
Xiamen Yuanshun Microelectronics Technology Co ltd
Unisonic Technologies Co Ltd
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Abstract

The utility model relates to a kind of two-way hysteresis comparator circuit and magnetic sensor circuit, and this two-way hysteresis comparator circuit feature is: by be biased and hysteresis feedback regulating circuit, hysteresis comparator, logic control circuit are electrically connected successively; The utility model separately provides the magnetic sensor circuit of this two-way hysteresis comparator circuit of application.The utility model can realize comparing forward or negative sense differential voltage signal, produces two-way hysteresis effects, and all insensitive to supply voltage, resistance, has good use value for the magnetic sensor circuit detecting N pole or S pole field.

Description

Two-way hysteresis comparator circuit and magnetic sensor circuit
Technical field
The utility model relates to a kind of two-way hysteresis comparator circuit for Magnetic Sensor and applies its magnetic sensor circuit.
Background technology
Magnetic sensor circuit is as one of contactless chip, the equipment such as brushless electric machine, notebook computer, mobile phone are applied more and more extensive, the not only requirement of demand fulfillment function, power consumption, also very important in stability, degree of accuracy, as the hysteresis comparator in magnetic sensor circuit, directly have influence on stability and the precision of magnetic sensor circuit.
Affect hysteresis comparator precision because have operating voltage, temperature, bias current, semiconducter process deviation etc., traditional two-way hysteresis comparator circuit adopts two Schmidt trigger, although this circuit structure is simple, but the turn threshold that shortcoming is Schmidt trigger can be subject to supply voltage impact, when operating voltage change or when having noise, turn threshold changes, and Output rusults is just inaccurate.Meanwhile, contrast the patent of other two-way hysteresis comparator circuit, find that there is some factors such as temperature impact, process deviation etc. and do not take into account.
So be necessary to design a kind of high precision and affect minimum two-way hysteresis comparator circuit by working environment, improve stability and the precision of magnetic sensor circuit, make application conditions more extensive.
Utility model content
In view of this, the utility model provides a kind of two-way hysteresis comparator circuit, can be applicable to magnetic sensor circuit etc., by eliminating supply voltage to the impact of bias current and last trading day change in resistance, improves stability and the precision of comparator circuit.
The purpose of this utility model is achieved in that a kind of two-way hysteresis comparator circuit, it is characterized in that: by be biased and hysteresis feedback circuit, hysteresis comparator and logic control circuit connect to form according to electrical signals; Described first input end that is biased and hysteresis feedback circuit is reference voltage signal input end, second input end connects the feedback signal of the first output terminal of described logic control circuit, the first output terminal that is biased and hysteresis feedback circuit is connected with hysteresis comparator, for the comparer of hysteresis comparator inside provides bias current, its second output terminal is connected with hysteresis comparator, for adjusting the compare threshold of hysteresis comparator, produce magnetic hysteresis; The first input end of described hysteresis comparator connects the first output terminal that is biased and hysteresis feedback circuit, second input end connects the second output terminal that is biased and hysteresis feedback circuit, the positive input terminal of hysteresis comparator, negative input end are a pair differential comparison voltage, hysteresis comparator adjusts the compare threshold of hysteresis comparator according to the second output terminal that is biased and hysteresis feedback circuit, and the first output terminal, the second output terminal andlogic control circuit of hysteresis comparator connect; The first input end of described logic control circuit, the second input end connect the first output terminal, second output terminal of hysteresis comparator, first output terminal of logic control circuit, be connected with described the second input end that is biased and hysteresis feedback regulating circuit, the second output terminal is the output of two-way hysteresis comparator circuit.
In the utility model one embodiment, described biased and feedback regulating circuit is made up of the first amplifier, the first current limiting transistor, the first current-limiting resistance, the first current mirror transistor, the second current mirror transistor, the 3rd current mirror transistor, the 4th current mirror transistor, the 5th current mirror transistor, the 6th current mirror transistor, the first switching transistor and second switch transistor; The first described amplifier, its positive input terminal is a reference voltage signal input end, and its output terminal connects the grid of the first current limiting transistor, and its negative input end connects the source electrode of the first current limiting transistor, the first input end of the first current-limiting resistance; The drain electrode of the first described current limiting transistor connects the grid of the grid of the first current mirror transistor and drain electrode, the grid of the second current mirror transistor, the grid of the 3rd current mirror transistor and the 4th current mirror transistor; The drain electrode of the second described current mirror transistor connects the bias input end of the second comparer of the drain and gate of the 5th current mirror transistor, the first comparator offset input end of described hysteresis comparator and described hysteresis comparator; The drain electrode of the 3rd described current mirror transistor connects the source electrode of the first switching transistor; The drain electrode of the 4th described current mirror transistor connects the source electrode of second switch transistor; The grid of the first described switching transistor connects GND, and its drain electrode connects the grid of the drain electrode of second switch transistor, the source electrode of the 6th current mirror transistor and the 7th, the 8th, the 9th current mirror transistor of drain electrode and described hysteresis comparator; First output terminal feedback signal of the logic control circuit described in grid connection of described second switch transistor; The source electrode of the source electrode of the first described current mirror transistor, the source electrode of the second current mirror transistor, the 3rd current mirror transistor and the source electrode of the 4th current mirror transistor connect power vd D; The source electrode of the second input end of the first described current-limiting resistance, the source electrode of the 5th current mirror transistor and the 6th current mirror transistor connects GND.
In the utility model one embodiment, the first described current mirror transistor, the second current mirror transistor, the 3rd current mirror transistor, the 4th current mirror transistor mate mutually; Second resistor of the first described current-limiting resistor and described hysteresis comparator circuit, the 3rd resistor, the 4th resistor, the 5th resistor mate mutually; 7th current mirror transistor of the 6th described current mirror transistor and described hysteresis comparator, the 8th current mirror transistor, the 9th current mirror transistor mate mutually.
In the utility model one embodiment, described hysteresis comparator is made up of the 7th current mirror transistor, the 8th current mirror transistor, the 9th current mirror transistor, the tenth current mirror transistor, the 11 current mirror transistor, the 12 current mirror transistor, the second resistor, the 3rd resistor, the first comparer and the second comparer; The drain electrode of the 7th described current mirror transistor connects grid and drain electrode, the grid of the 11 current mirror transistor and the grid of the 12 current mirror transistor of the tenth current mirror transistor; The drain electrode of the 8th described current mirror transistor connects the second input end of the 3rd resistor, the negative input end of the second comparer; The drain electrode of the 11 described current mirror transistor connects the first input end of the second resistor, the positive input terminal of the first comparer; Second input end of the second described resistor connects the positive input terminal of the first input end of the 3rd resistor, the differential input signal of described two-way hysteresis comparator circuit; The drain electrode of the 9th described current mirror transistor connects the second input end of the 5th resistor; The drain electrode of the 12 described current mirror transistor connects the first input end of the 4th resistor; Second input end of the 4th described resistor connects the negative input end of the differential input signal of the first input end of the 5th resistor, the negative input end of the first comparer, the positive input terminal of the second comparer and described two-way hysteresis comparator circuit; The first input end of the logic control circuit described in output terminal connection of the first described comparer; Second input end of the logic control circuit described in output terminal connection of the second described comparer; The source electrode of the source electrode of the tenth described current mirror transistor, the source electrode of the 11 current mirror transistor, the 12 current mirror transistor connects power vd D; The source electrode of the source electrode of the 7th described current mirror transistor, the source electrode of the 8th current mirror transistor, the 9th current mirror transistor connects GND.
In the utility model one embodiment, the 7th described current mirror transistor, the 8th current mirror transistor, the 9th current mirror transistor, described the 6th current mirror transistor that is biased and feedback regulating circuit mate mutually; The tenth described current mirror transistor, the 11 current mirror transistor, the 12 current mirror transistor mate mutually; The second described resistor, the 3rd resistor, the 4th resistor, the 5th resistor, described the first current-limiting resistor that is biased and feedback regulating circuit mate mutually; The first described comparer mates mutually with the second comparer.
In the utility model one embodiment, described logic control circuit is made up of the first Sheffer stroke gate, the first phase inverter and the second phase inverter; The first input end of the first described Sheffer stroke gate connects the output terminal of the first comparer of described hysteresis comparator, and its second input end connects the output terminal of the second comparer of described hysteresis comparator; The output terminal of the first described Sheffer stroke gate connects the input end of the first phase inverter; The output terminal of the first described phase inverter connects the input end of the second phase inverter, the output terminal of described two-way hysteresis comparator; Second input end of the biased and feedback regulating circuit described in the output terminal connection of the second described phase inverter.
In the utility model one embodiment, the first input end of the first described Sheffer stroke gate connects the output terminal of described hysteresis comparator first comparer, and the second input end connects the output terminal of described hysteresis comparator second comparer.
The utility model provides a kind of magnetic field sensor circuit applying above-mentioned two-way hysteresis comparator circuit in addition, this circuit has good stability and precision, can effectively avoid mains voltage variations and process deviation cause resistance to change and cause reducing stability and precision, and the application conditions of this two-way hysteresis comparator is also more extensive.
This object adopts following scheme: a kind of magnetic sensor circuit applying above-mentioned two-way hysteresis comparator circuit, comprise voltage modulation circuit, on-off circuit, Hall disc circuit, amplifier circuit, offset cancellation circuit, two-way hysteresis comparator circuit, logical circuit and driving tube, it is characterized in that: described voltage modulation circuit connecting valve circuit, amplifier circuit, offset cancellation circuit and two-way hysteresis comparator circuit; Described on-off circuit connects Hall disc circuit, to switch Hall disc different directions electric current; Described Hall disc circuit output end connects the input end of amplifier circuit, and the Hall voltage input amplifier circuit that Hall disc circuit is set up amplifies; The input end of the offset cancellation circuit described in described amplifier circuit output connects, the Hall voltage after amplification enters offset cancellation circuit and carries out imbalance elimination; The two-way hysteresis comparator circuit described in output terminal connection of described offset cancellation circuit, two-way hysteresis comparator exports comparative result according to input signal; The output terminal of described two-way hysteresis comparator circuit connects logical circuit, and described logical circuit controls driving tube according to the Output rusults of two-way hysteresis comparator circuit; The first described driving tube, the second driving tube form the 3rd phase inverter, and the output terminal of logical circuit connects the input end of the 3rd phase inverter, and the output terminal of the 3rd phase inverter exports the testing result of whole magnetic sensor circuit.
The utility model can realize comparing forward or negative sense differential voltage signal, produces two-way hysteresis effects, and all insensitive to supply voltage, resistance, has good use value for the magnetic sensor circuit detecting N pole or S pole field.
Accompanying drawing explanation
Fig. 1 is with magnetic sensor circuit system schematic of the present utility model.
Fig. 2 is the connection diagram of a kind of two-way hysteresis comparator circuit for Magnetic Sensor of the utility model.
Fig. 3 is biased and hysteresis feedback regulating circuit.
Fig. 4 is hysteresis comparator circuit.
Fig. 5 is logic control circuit.
Fig. 6 is signal input-output wave shape figure of the present utility model.
Fig. 7 is the input-output wave shape figure with magnetic sensor circuit system of the present utility model.
Primary clustering symbol description:
10000: with magnetic sensor circuit system of the present utility model
1000: biased and hysteresis feedback regulating circuit
2000: hysteresis comparator system
3000: logic control circuit
4000: two-way hysteresis comparator circuit
100: amplifier
201,202: comparer
301: Sheffer stroke gate
302,303: phase inverter
P0, P1, P2, P3, P4, P5, P6, P7, P8:PMOS transistor
N0, N1, N2, N3, N4, N5:NMOS transistor
R0, R1, R2, R3, R4: resistor
S. pn: the breadth length ratio being numbered the PMOS transistor of Pn
S. nn: the breadth length ratio being numbered the nmos pass transistor of Nn
I dS.Pn: the source-drain current being numbered the PMOS transistor of Pn
I dS.Nn: the source-drain current being numbered the nmos pass transistor of Nn
V h1, V h2: Hall voltage
V a1, V a2: the Hall voltage after amplification
Hysin1, hysin2: the input signal of hysteresis comparator circuit
Hysout1, hysout2: the output signal of hysteresis comparator circuit
OUT: the output signal of hysteresis comparator circuit
FB: the feedback signal of hysteresis comparator circuit
Ctrl: with the drive singal of the output stage of magnetic sensor circuit system of the present utility model
Embodiment
Below in conjunction with drawings and Examples, the utility model is described further.
The utility model provides a kind of two-way hysteresis comparator circuit for Magnetic Sensor, it is characterized in that: by be biased and hysteresis feedback regulating circuit, hysteresis comparator and logic control circuit connect to form according to electrical signals.Concrete, see Fig. 2, Fig. 2 is the circuit connection diagram of a kind of two-way hysteresis comparator circuit 4000 for Magnetic Sensor of this example, in figure, by be biased and hysteresis feedback regulating circuit 1000, hysteresis comparator circuit 2000 and logic control circuit 3000 link together according to electrical signals; Biased and feedback regulating circuit 1000 produces bias voltage V bias1and image current I bias1, for the first comparer 201, second comparer 202 of hysteresis comparator circuit 2000 provides biased, biased and feedback regulating circuit 1000, according to the feedback signal FB of logic control circuit 3000, produces bias voltage V bias2and image current I bias2, regulate the compare threshold of hysteresis comparator 2000; Voltage Cortrol Regulator circuit 4001 in first input end Vref and Fig. 1 of Fig. 2 connects, and provides reference voltage by it; The first output terminal, the second output terminal connection of Offset Cancelling circuit 4005 are eliminated in imbalance in the second input end hysin1, the 3rd input end hysin2 and Fig. 1 of Fig. 2; Logic control circuit 4006 input end in output terminal OUT and Fig. 1 of Fig. 2 connects.
The system that Fig. 1 describes, it is a typical magnetic sensor circuit system 10000, eliminated Offset Cancelling circuit 4005, two-way hysteresis comparator Hyseteresis circuit 4000, logic control Logic Control circuit 4006 and driving tube P100, N100 and form by voltage modulated Regulator circuit 4001, switch control rule Switch circuit 4002, Hall disc Hall Plate circuit 4003, amplifier AMP circuit 4004, imbalance, and connected according to electrical signals.It is characterized in that: Voltage Cortrol Regulator circuit 4001 produces the operating voltage of internal system, biased, reference voltage; Switch S witch circuit 4002, connects Hall disc Hall Plate circuit 4003, switches the different direction of current of Hall disc Hall Plate circuit 4003; Hall disc Hall Plate circuit 4003, under constant voltage and externally-applied magnetic field condition, produces Hall voltage V h1, V h2, the input end of input amplifier AMP circuit 4004; Amplifier AMP circuit 4004 couples of V h1, V h2amplifying, is generally that fixing enlargement factor is amplified, and exports V a1, V a2, and the input end of Offset Cancelling circuit 4005 is eliminated in input imbalance; Offset Cancelling circuit 4005 couples of V are eliminated in imbalance a1, V a2carry out imbalance Processing for removing, eliminate the mismatch equal error of Hall disc Hall Plate circuit 4003 structural imbalance, technique imbalance, amplifier AMP circuit 4004 input pipe, export hysin1, hysin2, and input two-way hysteresis comparator Hyseteresis circuit 4000; Two-way hysteresis comparator Hyseteresis circuit 4000, compares input model hysin1, hysin2, exports OUT, and input logic control Logic Control circuit 4006; Logic control Logic Control circuit 4006 control system and output drive signal Ctrl, control the output stage of transistor P100, N100 composition.
In order to allow those skilled in the art better understand the utility model, below our combined circuit principle of work of the present utility model is further described:
Please continue see Fig. 2, Fig. 3, Fig. 4, Fig. 5, Fig. 6, Fig. 7, for a circuit for the two-way hysteresis comparator circuit 4000 of Magnetic Sensor, by be biased and hysteresis feedback circuit 1000, hysteresis comparator 2000 and logic control circuit 3000 link together according to electrical signal; Biased and hysteresis feedback circuit 1000 can produce the image current irrelevant with supply voltage, provides bias voltage V to the first comparer 201, second comparer 202 of hysteresis comparator circuit 2000 bias1with image current I bias1, also for hysteresis comparator circuit 2000 provides the image current I changing compare threshold bias2; Be biased and feedback regulating circuit 2000, according to input signal FB gauge tap pipe, produce another one bias voltage V bias2with image current I bias2, produce hysteresis function to hysteresis comparator circuit 2000; Hysteresis comparator circuit 2000 is according to input signal hysin1, hysin2 and image current I that is biased and hysteresis feedback regulating circuit bias2produce output signal hysout1, hysout2, and be input to logic control circuit 3000; Logic control circuit 3000 produces feedback signal FB and output signal OUT according to input signal hysout1, hysout2.
Concrete biased and hysteresis feedback regulating circuit as shown in Figure 3, is made up of the first amplifier 100, first current limiting transistor N0, the first current-limiting resistance R0, the first current mirror transistor P0, the second current mirror transistor P1, the 3rd current mirror transistor P2, the 4th current mirror transistor P3, the 5th current mirror transistor N1, the 6th current mirror transistor N2, the first switching transistor P4 and second switch transistor P5; First amplifier 100, its positive input terminal is a reference voltage signal Vref, and its output terminal connects the grid of the first current limiting transistor N0, and its negative input end connects the source electrode of the first current limiting transistor N0, the first input end of the first current-limiting resistance R0; The drain electrode of the first current limiting transistor N0 connects the grid of the grid of the first current mirror transistor P0 and drain electrode, the grid of the second current mirror transistor P1, the grid of the 3rd current mirror transistor P2 and the 4th current mirror transistor P3; The drain electrode of the second current mirror transistor P1 connects the bias input end of the drain and gate of the 5th current mirror transistor N1, the first comparer 201, second comparer 202 of hysteresis comparator 2000; The drain electrode of the 3rd current mirror transistor P2 connects the source electrode of the first switching transistor P4; The drain electrode of the 4th current mirror transistor P3 connects the source electrode of second switch transistor P5; The grid of the first switching transistor P4 connects GND, and its drain electrode connects the grid of drain electrode of second switch transistor P5, the source electrode of the 6th current mirror transistor N2 and drain electrode, the grid of the 7th current mirror transistor N3 of hysteresis comparator 2000, the grid of the 8th current mirror transistor N4 of hysteresis comparator 2000, the 9th current mirror transistor N5 of hysteresis comparator 2000; The grid of second switch transistor P5 connects the first output terminal FB feedback signal of logic control circuit 3000.
This offset generating circuit principle of work is as follows:
Work as system starts, the positive input terminal of the first amplifier 100 connects reference voltage V ref, because the short effect of the void of amplifier, secondary input terminal voltage can be clamped at Vref, the voltage be equivalent on the first current-limiting resistance R0 is Vref, the electric current by the first current mirror transistor P0 source and drain:
I DS.P0≈I R0=Vref/R0 (1)
Electric current by the 5th current mirror transistor N1 source and drain:
I bias1=I DS.P1=I DS.P0*S P1/S P0=Vref*(S P1/S P0)/R0 (2)
Suppose S p1=S p0, the electric current by the 5th current mirror transistor N1:
I bias1=Vref/R0 (3)
From above formula, bias current and supply voltage have nothing to do.
As FB=0, second switch transistor P5 opens, and the electric current flowing through the 6th current mirror transistor N2 is that the 3rd current mirror transistor P2 and the first switching transistor P4 passage current add the 4th current mirror transistor P3 and second switch transistor P5 passage current sum; As FB=1, second switch transistor P5 closes, and the electric current flowing through the 6th current mirror transistor N2 only has the electric current of the 3rd current mirror transistor P2 and the first switching transistor P4 path.
As FB=0, the electric current by the 6th current mirror transistor N2:
I bias2=I DS.N2=I DS.P2+I DS.P3=I DS.P0*(S P2+S P3)/S P0 (4)
=(Vref/R0)*(S P2+S P3)/S P0
Suppose S p2=S p3=S p0, the electric current by the 6th current mirror transistor N2:
I bias2=2*(Vref/R0) (5)
As FB=1, the electric current by the 6th current mirror transistor N2:
I′ bias2=I DS.N2=I DS.P2=I DS.P0*(S P2/S P0) (6)
=(Vref/R0)*(S P2/S P0)
Suppose S p2=S p0, the electric current by the 6th current mirror transistor N2:
I′ bias2=Vref/R0 (7)
Concrete hysteresis comparator circuit as shown in Figure 4, hysteresis comparator circuit 2000, is made up of the 7th current mirror transistor N3, the 8th current mirror transistor N4, the 9th current mirror transistor N5, the tenth current mirror transistor P6, the 11 current mirror transistor P7, the 12 current mirror transistor P8, the second resistor R1, the 3rd resistor R2, the 4th resistor R3, the 5th resistor R4, the first comparer 201 and the second comparer 202; The drain electrode of the 7th current mirror transistor N3 connects grid and drain electrode, the grid of the 11 current mirror transistor P7 and the grid of the 12 current mirror transistor P8 of the tenth current mirror transistor P6; The drain electrode of the 8th current mirror transistor N4 connects second input end of the 3rd resistor R2, the negative input end of the second comparer 202; The drain electrode of the 11 current mirror transistor P7 connects the first input end of the second resistor R1, the positive input terminal of the first comparer 201; Second input end of the second resistor R1 connects the positive input terminal hysin1 of the first input end of the 3rd resistor R2, the differential input signal of described two-way hysteresis comparator 4000; The drain electrode of the 9th current mirror transistor N5 connects second input end of the 5th resistor R4; The drain electrode of the 12 current mirror transistor P8 connects the first input end of the 4th resistor R3; Second input end of the 4th resistor R3 connects the negative input end hysin2 of the differential input signal of the first input end of the 5th resistor R4, the negative input end of the first comparer 201, the positive input terminal of the second comparer 202 and described two-way hysteresis comparator circuit 4000; The output terminal of the first comparer 201 connects the first input end of logic control circuit 3000; The output terminal of the second comparer 202 connects the second input end of logic control circuit 3000.
The principle of work of this hysteresis comparator is as follows:
When hysteresis comparator 2000 is in running order,
The positive input terminal voltage of the first comparer 201:
V CMP1+=V hysin1+I DS.N4*R1=V hysin1+I DS.N2*(S N4/S N2)*R1 (8)
The negative input end voltage of the first comparer 201:
V CMP1-=V hysin2 (9)
The positive input terminal voltage of the second comparer 202:
V CMP2+=V hysin2 (10)
The negative input end voltage of the second comparer 202:
V CMP2-=V hysin1-I DS.N4*R2=V hysin1-I DS.N2*(S N4/S N2)*R2 (11)
As FB=0, suppose S p0=S p2=S p3, S n2=s n3=S n4=S n5, S p6=S p7=S p8, R1=R2=R3=R4=0.1*R0, is obtained by formula (5):
The positive input terminal voltage of the first comparer 201:
V CMP1+=V hysin1+ IDS.N4*R1=V hysin1+I DS.N2*(S N4/S N2)*R1 (12)
=V hysin1+I bias2*R1=V hysin1+0.2*Vref
By formula (9), obtain the positive-negative input end difference of the first comparer 201:
V CMP1+-V CMP1-=V hysin1+0.2*Vref-V hysin2 (13)
The output hysout1 upset of the first comparer 201 occurs in:
V CMP1+-V CMP1-=V hysin1+0.2*Vref-V hysin2=0 (14)
The i.e. compare threshold of the first comparer 201:
V CMP1_th=0.2*Vref (15)
The negative input end voltage of the second comparer 202:
V CMP2-=V hysin1-I DS.N4*R2=V hysin1-I DS.N2*(S N4/S N2)*R2 (16)
=V hysin1-I bias2*R2=V hysin1-0.2*Vref
By formula (10), obtain the positive-negative input end difference of the second comparer 202:
V CMP2+-V CMP2-=V hysin2-V hysin1+0.2*Vref (17)
The output hysout2 upset of the second comparer 202 occurs in:
V CMP2+-V CMP2-=V hysin2-V hysin1+0.2*Vref=0 (18)
The i.e. compare threshold of the second comparer 202:
V CMP2_th=0.2*Vref (19)
As FB=1, suppose S p0=S p2=S p3, S n2=S n3=S n4=S n5, S p6=S p7=S p8, R1=R2=R3=R4=0.1*R0, is obtained by formula (7):
The positive input terminal voltage of the first comparer 201:
V CMP1+=V hysin1+I DS.N4*R1=V hysin1+I DS.N2*(S N4/S N2)*R1 (20)
=V hysin1+I′ b'ias2*R1=V hysin1+0.1*Vref
By formula (9), obtain the positive-negative input end difference of the first comparer 201:
V CMP1+-V CMP1-=V hysin1+0.1*Vref-V hysin2 (21)
The output hysout1 upset of the first comparer 201 occurs in:
V CMP1+-V CMP1-=V hysin1+0.1*Vref-V hysin2=0 (22)
The i.e. compare threshold of the first comparer 201:
V′ CMP1_th=0.1*Vref (23)
The negative input end voltage of the second comparer 202:
V CMP2-=V hysin1-I DS.N4*R2=V hysin1-I DS.N2*(S N4/S N2)*R2 (24)
=V hysin1-I′ bias2*R2=V hysin1-0.1*Vref
By formula (10), obtain the positive-negative input end difference of the second comparer 304:
V CMP2+-V CMP2-=V hysin2-V hysin1+0.1*Vref (25)
The output hysout2 upset of the second comparer 202 occurs in:
V CMP2+-V CMP2-=V hysin2-V hysin1+0.1*Vref=0 (26)
The i.e. compare threshold of the second comparer 202:
V′ CMP2_th=0.1*Vref (27)
When magnetic sensor circuit 10000 original state is in without magnetic field state, V hysin1=V hysin2and FB=0,
Therefore original state:
For the first comparer 201, V cMP1+>V cMP1-, V hysout1=1, V cMP1_th=0.2*Vref;
For the second comparer 202, V cMP2+>V cMP2-, V hysout2=1, V cMP2_th=0.2*Vref;
When magnetic sensor circuit 10000 is in S pole field and magnetic field intensity B constantly increases, the Hall voltage V that Hall disc circuit 4003 exports h1continuous reduction V h2continuous increase, the output V of amplifier AMP circuit 4004 a1continuous reduction V a2continuous increase, the output V of Offset Cancelling circuit 4005 is eliminated in imbalance hysin1continuous reduction V hysin2continuous increase.
Work as B=B oPStime,
The positive-negative input end difference of the first comparer 201 is reduced to and equals zero,
V CMP1+-V CMP1-=V hysin1+0.2*Vref-V hysin2=0
I.e. V hysin2-V hysin1=0.2*Vref=V cMP1_th
V hysout1=0
The positive-negative input end difference of the second comparer 202 is increasing all the time,
V CMP2+-V CMP2-=V hysin2-V hysin1+0.2*Vref>0
V hysout2=1
When magnetic sensor circuit 10000 is in N pole field and magnetic field intensity B constantly increases, the Hall voltage V that Hall disc circuit 4003 exports h1continuous increase V h2continuous reduction, the output V of amplifier AMP circuit 4004 a1continuous increase V a2continuous reduction, the output V of Offset Cancelling circuit 4005 is eliminated in imbalance hysin1continuous increase V hysin2continuous reduction.
Work as B=B oPNtime,
The positive-negative input end difference of the first comparer 201 is increasing all the time,
V CMP1+-V CMP1-=V hysin1+0.2*Vref-V hysin2>0
V hysout1=1
The positive-negative input end difference of the second comparer 202 is reduced to and equals zero,
V CMP2+-V CMP2-=V hysin2-V hysin1+0.2*Vref=0
I.e. V hysin1-V hysin2=0.2*Vref=V cMP2_th
V hysout2=0
As shown in Figure 5, logic control circuit 3000, is made up of the first Sheffer stroke gate 301, first phase inverter 302, second phase inverter 303 concrete logic control circuit; The first input end of the first Sheffer stroke gate 301 connects the output terminal hysout1 of hysteresis comparator 2,000 first comparer 201, and the second input end of the first Sheffer stroke gate 301 connects the output terminal hysout2 of hysteresis comparator 2,000 second comparer 202; The output terminal of the first Sheffer stroke gate 301 connects the input end of the first phase inverter 302; The output terminal of the first phase inverter 302 connects the input end of the second phase inverter 303, is also the output terminal OUT of two-way hysteresis comparator 4000; The output terminal of the second phase inverter 303 connects the second input end that is biased and feedback regulating circuit 1000, is feedback signal FB.
The principle of work of this logic control circuit is as follows:
When magnetic sensor circuit 10000 is in zero magnetic field or magnetic field intensity B oPN<B<B oPSmagnetic field in, the first output terminal hyoust1=1 of hysteresis comparator 3000, the second output terminal hysout2=1, the output terminal OUT=hysout1 & hysout2=1 of the first phase inverter 302, the output terminal FB=0 of the second phase inverter 303.
When magnetic sensor circuit 10000 is in magnetic field intensity | B|>|B oPS| S pole field in, a kind of first output terminal hyoust1=0 of the two-way hysteresis comparator 4000 for Magnetic Sensor, the second output terminal hysout2=1, the output terminal OUT=hysout1 & hysout2=0 of the first phase inverter 302, the output terminal FB=1 of the second phase inverter 303.
When magnetic sensor circuit 10000 is in magnetic field intensity | B|>|B oPN| N pole field in, a kind of first output terminal hysout1=1 of the two-way hysteresis comparator 4000 for Magnetic Sensor, the second output terminal hysout2=0, the output terminal OUT=hysout1 & hysout2=0 of the first phase inverter 302, the output terminal FB=1 of the second phase inverter 303.
Therefore, as long as hysout1=0 or hysout2=0, OUT=0, FB=1.And when FB=0 becomes FB=1,
The compare threshold of hysteresis comparator 2,000 first comparer 201:
By V cMP1_th=0.2*Vref becomes V ' cMP1_th=0.1*Vref
The compare threshold of hysteresis comparator 2,000 second comparer 202:
By V cMP2_th=0.2*Vref becomes V ' cMP2_th=0.1*Vref
When the compare threshold of hysteresis comparator 2,000 first comparer 201, second comparer 202 diminishes, the overturn point of comparer will change.If now magnetic field intensity B starts to reduce,
When S pole field intensity | B|=|B oPS|, for the first comparer 201, even if
V hysin2-V hysin1=0.2*Vref=V cMP1_th, hysout1 also can not overturn, and keeps hysout1=0;
Or when N pole field intensity | B|=|B oPN|, for the second comparer 202, even if
V hysin1-V hysin2=0.2*Vref=V cMP2_th, hysout2 also can not overturn, and keeps hysout2=0;
Magnetic field intensity B is only had to continue to reduce,
When S pole field intensity | B|=|B rPS| <|B oPS|, for the first comparer 201,
V hysin2-V hysin1=0.1*Vref=V ' cMP1_th, hysout1 just can overturn, and becomes hysout1=1 by hysout1=0;
Or when N pole field intensity | B|=|B rPN| <|B oPN|, for the second comparer 202,
V hysin1-V hysin2=0.1*Vref=V ' cMP2_th, hysout2 just can overturn, and becomes hysout2=1 by hysout2=0;
Because the change of comparer overturn point, so there is hysteresis function.
A kind of two-way hysteresis comparator input-output wave shape for Magnetic Sensor as shown in Figure 6.
With magnetic sensor circuit input-output wave shape of the present utility model as shown in Figure 7.
Although the utility model discloses as above with preferred embodiment, but it should not limit the utility model, any person skilled in the art, not departing from spirit and scope of the present utility model, when doing few modifications and replacement.Therefore protection domain of the present utility model is when being as the criterion depending on accompanying the scope of the claims person of defining.

Claims (8)

1. a two-way hysteresis comparator circuit, is characterized in that: by be biased and hysteresis feedback regulating circuit, hysteresis comparator and logic control circuit connect to form according to electrical signals; Described first input end that is biased and hysteresis feedback regulating circuit is reference voltage signal input end, second input end connects the feedback signal of the first output terminal of described logic control circuit, the first output terminal that is biased and hysteresis feedback regulating circuit is connected with hysteresis comparator, for the comparer of hysteresis comparator inside provides bias current, its second output terminal is connected with hysteresis comparator, for adjusting the compare threshold of hysteresis comparator, produce magnetic hysteresis; The first input end of described hysteresis comparator connects the first output terminal that is biased and hysteresis feedback regulating circuit, second input end connects the second output terminal that is biased and hysteresis feedback regulating circuit, the positive input terminal of hysteresis comparator, negative input end are a pair differential comparison voltage, hysteresis comparator adjusts the compare threshold of hysteresis comparator according to the second output terminal that is biased and hysteresis feedback regulating circuit, and the first output terminal, the second output terminal andlogic control circuit of hysteresis comparator connect; The first input end of described logic control circuit, the second input end connect the first output terminal, second output terminal of hysteresis comparator, first output terminal of logic control circuit, be connected with described the second input end that is biased and hysteresis feedback regulating circuit, the second output terminal is the output of two-way hysteresis comparator circuit.
2. two-way hysteresis comparator circuit according to claim 1, is characterized in that: described biased and hysteresis feedback regulating circuit is made up of the first amplifier, the first current limiting transistor, the first current-limiting resistance, the first current mirror transistor, the second current mirror transistor, the 3rd current mirror transistor, the 4th current mirror transistor, the 5th current mirror transistor, the 6th current mirror transistor, the first switching transistor and second switch transistor; The first described amplifier, its positive input terminal is a reference voltage signal input end, and its output terminal connects the grid of the first current limiting transistor, and its negative input end connects the source electrode of the first current limiting transistor, the first input end of the first current-limiting resistance; The drain electrode of the first described current limiting transistor connects the grid of the grid of the first current mirror transistor and drain electrode, the grid of the second current mirror transistor, the grid of the 3rd current mirror transistor and the 4th current mirror transistor; The drain electrode of the second described current mirror transistor connects the bias input end of the second comparer of the drain and gate of the 5th current mirror transistor, the first comparator offset input end of described hysteresis comparator and described hysteresis comparator; The drain electrode of the 3rd described current mirror transistor connects the source electrode of the first switching transistor; The drain electrode of the 4th described current mirror transistor connects the source electrode of second switch transistor; The grid of the first described switching transistor connects GND, and its drain electrode connects the grid of the drain electrode of second switch transistor, the source electrode of the 6th current mirror transistor and the 7th, the 8th, the 9th current mirror transistor of drain electrode and described hysteresis comparator; First output terminal feedback signal of the logic control circuit described in grid connection of described second switch transistor; The source electrode of the source electrode of the first described current mirror transistor, the source electrode of the second current mirror transistor, the 3rd current mirror transistor and the source electrode of the 4th current mirror transistor connect power vd D; The source electrode of the second input end of the first described current-limiting resistance, the source electrode of the 5th current mirror transistor and the 6th current mirror transistor connects GND.
3. two-way hysteresis comparator circuit according to claim 2, is characterized in that: the first described current mirror transistor, the second current mirror transistor, the 3rd current mirror transistor, the 4th current mirror transistor mate mutually; Second resistor of the first described current-limiting resistor and described hysteresis comparator circuit, the 3rd resistor, the 4th resistor, the 5th resistor mate mutually; 7th current mirror transistor of the 6th described current mirror transistor and described hysteresis comparator, the 8th current mirror transistor, the 9th current mirror transistor mate mutually.
4. two-way hysteresis comparator circuit according to claim 1, is characterized in that: described hysteresis comparator is made up of the 7th current mirror transistor, the 8th current mirror transistor, the 9th current mirror transistor, the tenth current mirror transistor, the 11 current mirror transistor, the 12 current mirror transistor, the second resistor, the 3rd resistor, the 4th resistor, the 5th resistor, the first comparer and the second comparer; The drain electrode of the 7th described current mirror transistor connects grid and drain electrode, the grid of the 11 current mirror transistor and the grid of the 12 current mirror transistor of the tenth current mirror transistor; The drain electrode of the 8th described current mirror transistor connects the second input end of the 3rd resistor, the negative input end of the second comparer; The drain electrode of the 11 described current mirror transistor connects the first input end of the second resistor, the positive input terminal of the first comparer; Second input end of the second described resistor connects the positive input terminal of the first input end of the 3rd resistor, the differential input signal of described two-way hysteresis comparator circuit; The drain electrode of the 9th described current mirror transistor connects the second input end of the 5th resistor; The drain electrode of the 12 described current mirror transistor connects the first input end of the 4th resistor; Second input end of the 4th described resistor connects the negative input end of the differential input signal of the first input end of the 5th resistor, the negative input end of the first comparer, the positive input terminal of the second comparer and described two-way hysteresis comparator circuit; The first input end of the logic control circuit described in output terminal connection of the first described comparer; Second input end of the logic control circuit described in output terminal connection of the second described comparer; The source electrode of the source electrode of the tenth described current mirror transistor, the source electrode of the 11 current mirror transistor, the 12 current mirror transistor connects power vd D; The source electrode of the source electrode of the 7th described current mirror transistor, the source electrode of the 8th current mirror transistor, the 9th current mirror transistor connects GND.
5. two-way hysteresis comparator circuit according to claim 4, is characterized in that: the 7th described current mirror transistor, the 8th current mirror transistor, the 9th current mirror transistor, described the 6th current mirror transistor that is biased and hysteresis feedback regulating circuit mate mutually; The tenth described current mirror transistor, the 11 current mirror transistor, the 12 current mirror transistor mate mutually; The second described resistor, the 3rd resistor, the 4th resistor, the 5th resistor, described the first current-limiting resistor that is biased and hysteresis feedback regulating circuit mate mutually; The first described comparer mates mutually with the second comparer.
6. two-way hysteresis comparator circuit according to claim 1, is characterized in that: described logic control circuit is made up of the first Sheffer stroke gate, the first phase inverter and the second phase inverter; The first input end of the first described Sheffer stroke gate connects the output terminal of the first comparer of described hysteresis comparator, and its second input end connects the output terminal of the second comparer of described hysteresis comparator; The output terminal of the first described Sheffer stroke gate connects the input end of the first phase inverter; The output terminal of the first described phase inverter connects the input end of the second phase inverter, the output terminal of described two-way hysteresis comparator; Second input end of the biased and hysteresis feedback regulating circuit described in the output terminal connection of the second described phase inverter.
7. two-way hysteresis comparator circuit according to claim 6, it is characterized in that: the first input end of the first described Sheffer stroke gate connects the output terminal of described hysteresis comparator first comparer, and the second input end connects the output terminal of described hysteresis comparator second comparer.
8. the magnetic sensor circuit of a kind of two-way hysteresis comparator circuit described in an application rights 1, comprise voltage modulation circuit, on-off circuit, Hall disc circuit, amplifier circuit, offset cancellation circuit, two-way hysteresis comparator circuit, logical circuit and driving tube, it is characterized in that: described voltage modulation circuit connecting valve circuit, amplifier circuit, offset cancellation circuit and two-way hysteresis comparator circuit; Described on-off circuit connects Hall disc circuit, to switch Hall disc different directions electric current; Described Hall disc circuit output end connects the input end of amplifier circuit, and the Hall voltage input amplifier circuit that Hall disc circuit is set up amplifies; The input end of the offset cancellation circuit described in described amplifier circuit output connects, the Hall voltage after amplification enters offset cancellation circuit and carries out imbalance elimination; The two-way hysteresis comparator circuit described in output terminal connection of described offset cancellation circuit, two-way hysteresis comparator exports comparative result according to input signal; The output terminal of described two-way hysteresis comparator circuit connects logical circuit, and described logical circuit controls driving tube according to the Output rusults of two-way hysteresis comparator circuit; First driving tube, the second driving tube form the 3rd phase inverter, and the output terminal of logical circuit connects the input end of the 3rd phase inverter, and the output terminal of the 3rd phase inverter exports the testing result of whole magnetic sensor circuit.
CN201420296254.8U 2014-06-05 2014-06-05 Two-way hysteresis comparator circuit and magnetic sensor circuit Expired - Lifetime CN204044342U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108923781A (en) * 2018-08-24 2018-11-30 西安爱科赛博电气股份有限公司 A kind of symmetrical comparison circuit of positive and negative two directions' inputing based on single supply power supply
CN110120803A (en) * 2018-02-06 2019-08-13 意瑞半导体(上海)有限公司 A kind of full pole Hall switch circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110120803A (en) * 2018-02-06 2019-08-13 意瑞半导体(上海)有限公司 A kind of full pole Hall switch circuit
CN108923781A (en) * 2018-08-24 2018-11-30 西安爱科赛博电气股份有限公司 A kind of symmetrical comparison circuit of positive and negative two directions' inputing based on single supply power supply

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