CN203981764U

CN203981764U - High-speed pulse peak value is screened sample circuit

Info

Publication number: CN203981764U
Application number: CN201420235398.2U
Authority: CN
Inventors: 刘南; 农永光; 胡刚; 唐丽; 刘明辉
Original assignee: Cecep Liuhe Talroad Environmental Technology Co Ltd
Current assignee: Cecep Liuhe Talroad Environmental Technology Co Ltd
Priority date: 2014-05-09
Filing date: 2014-05-09
Publication date: 2014-12-03
Anticipated expiration: 2024-05-09

Abstract

A kind of high-speed pulse peak value is screened sample circuit, it comprises that voltage comparator LM311, sampling keep chip LF398, trigger SN74LS74, analog switch MAX4541 and resistance, electric capacity, it is characterized in that: take high speed voltage comparator LM311, keep the peak value of pulse judgement holding circuit that sampling A/D chip LF398 and trigger SN74LS74 are core parts, wherein voltage comparator LM311 is used for judging whether pulse reaches peak value, keep sampling A/D chip LF398 that crest voltage is kept to a period of time, trigger SN74LS74 triggers the sampling that MCU control module completes AD; MCU control module be take C8051F410 single-chip microcomputer as core, receives the sampled signal from trigger, sends the order of AD sampling and control to keep discharging and recharging of electric capacity.The utility model project organization is simple, is easy to debugging, has met the requirement of pulse height analyzer AD sampling in energy spectrum analysis.

Description

High-speed pulse peak value is screened sample circuit

Technical field

The utility model relates to a kind of high-speed pulse peak value and screens sample circuit, particularly relates in a kind of circuit that is applied in pulse height classification and counting in energy spectrum analysis.

Background technology

Peak holding circuit has maintenance and two states of sampling.When sample states, input signal is followed in the output of circuit all the time; When hold mode, before the output of circuit is keeping, once sample and finish the input quantity of front moment.In high speed peak value gatherer process, in order to guarantee the precision of AD conversion, in transfer process, its input signal variable quantity can not be greater than 1/2LSB.Suppose input signal Vin=Vmsin ω t, the maximum rate of change of Vin is when the resolution of AD converter is n position, while being t, be the normal work that guarantees AD converter switching time, can obtain the maximum frequency that input signal allows to be if t=100us switching time of 8 bit A/D converters, substitution above formula can be calculated, the maximum input signal frequency f allowing of AD converter _max=6Hz.For obtaining the pulse signal peak value of high frequency, must before signal AD converter, to its peak value, keep.

As shown in Figure 1, by integrated operational amplifier, diode and electric capacity form traditional peak holding circuit schematic diagram.In traditional peak holding circuit, input signal is by the backward maintenance capacitor charging of voltage follower being comprised of operational amplifier, until be charged to the maximal value of input voltage.In the ideal case, maintenance electric capacity can keep the crest voltage of input signal, but in reality, the back resistance of diode is not infinitely great, and circuit next stage also exists resistance and keeps electric capacity to have electric leakage.From frequency domain, the network integral nonlinearity of diode and maintenance electric capacity composition is large, dynamic range is little and have limit, and because diode internal resistance is not steady state value, the position of limit is fixing.The peak signal collecting by such circuit, can not meet the requirement that high-speed pulse signal is processed.

Summary of the invention

The utility model, in order to overcome above-mentioned the deficiencies in the prior art, provides a kind of high-speed pulse peak value to screen sample circuit.

The technical scheme the utility model proposes is, a kind of high-speed pulse peak value is screened sample circuit, comprise that high speed voltage comparator LM311, sampling keep chip LF398, trigger SN74LS74, analog switch MAX4541 and resistance, electric capacity, form signal filter element, peak value examination unit, trigger element, peak value holding unit, sampling unit composition, it is characterized in that:

Signal filter element consists of two high speed voltage comparator LM311 and two BOURNS precision resistors, and the output terminal of signal filter element is connected with the input end that peak value is screened unit;

Peak value is screened unit and is consisted of 1 high speed voltage comparator LM311 and signal holding circuit, and peak value is screened the order output terminal of unit as the control end of described trigger element; The signal output part that peak value is screened unit is connected with the input end of described peak value holding unit;

Trigger element is SN74LS74 trigger, is connected with the control end of peak value holding unit;

Peak value holding unit keeps chip LF398, keeps charging capacitor, analog switch MAX4541 to form by sampling, the signal of described signal holding circuit keeps end to be connected with keeping one end of charging capacitor, keeps the other end ground connection of charging capacitor; Described maintenance charging capacitor earth terminal is connected with the common port of analog switch, and the other end of described maintenance charging capacitor is connected with the Chang Kaiduan of analog switch;

Sampling unit consists of AD circuit and reference voltage base circuit, and sampling unit is connected with peak value holding unit.

Take high speed voltage comparator LM311, sampling keeps the peak value of pulse judgement holding circuit that chip LF398 and trigger SN74LS74 are core parts, wherein high speed voltage comparator LM311 is used for judging whether pulse reaches peak value, sampling keeps chip LF398 that crest voltage is kept to a period of time, and trigger SN74LS74 triggers the sampling that MCU control module completes AD; MCU control module be take C8051F410 single-chip microcomputer as core, receives the sampled signal from trigger, sends the order of AD sampling and control to keep discharging and recharging of electric capacity.Sample circuit is selected high-speed AD sampling A/D chip TLC4545, after receiving the sample command of MCU, completes rapidly AD sampling task.

A kind of high-speed pulse peak value the utility model proposes is screened sample circuit, its advantage is: adopt high-speed low-power-consumption voltage comparator LM311 to differentiate pulse height, voltage upper-level threshold, lower threshold are obtained by adjustable precision potentiometer dividing potential drop, adopt the sampling of National Semiconductor company to keep chip LF398 to realize sampling maintenance function, its control end can directly be connected to TTL, CMOS L logic level, LOGIC pin level decision-making circuit, in sampling or hold mode, adopts trigger SN74LS74 to send a signal to MCU and controls AD sampling.Adopt C8051F410 single-chip microcomputer as controller, its response low in energy consumption is fast, has realized well circuit development requirement.Can carry out peak value broadening to high-speed pulse, thereby guarantee the accuracy of AD sampling.The utility model selects induced absorption and all less polystyrene electric capacity of leakage current as keeping electric capacity, has reduced error, has improved the precision of sampling.The method for designing the utility model proposes is easily understood, and can the person of being designed grasp easily and be applied in integrated circuit (IC) design.

Accompanying drawing explanation

Below in conjunction with drawings and Examples, the utility model is described in further detail:

Fig. 1 is conventional peak holding circuit schematic diagram

Fig. 2 is high-speed pulse sampling process flow diagram

Fig. 3 is that high-speed pulse peak value is screened sample circuit schematic diagram

Embodiment

As shown in Figure 1, traditional peak holding circuit is by integrated operational amplifier, and diode and electric capacity form.

As seen from Figure 2, high-speed pulse sampling flow process is, first judges the arrival of peak value of pulse, and then trigger pulse peak holding circuit, triggers MCU issue sample command subsequently, and last sample circuit completes peak signal sampling.

As seen from Figure 3, a kind of high-speed pulse peak value is screened sample circuit, and it comprises that voltage comparator LM311, sampling keep chip LF398, trigger SN74LS74, analog switch MAX4541 and other resistance capacitances.In figure, voltage comparator U3 and U4 complete determining of pulse height sensing range jointly, and when the pulse signal of inputting is within the scope of amplitude detection, voltage comparator U3 and U4 output terminal are realized line and function; Now sampling keeps chip U5 to be operated in sample states, and output OUT1 follows input signal INPUT and changes; When peak value does not arrive, OUT1 magnitude of voltage is less than the magnitude of voltage of input signal INPUT, voltage comparator U6 output low level, and trigger U7 does not trigger; When peak value arrives, voltage comparator U3, U4 and sampling keep chip U5 state to remain unchanged, and because OUT1 magnitude of voltage is greater than the magnitude of voltage of input signal INPUT, voltage comparator U6 export high level, produces rising edge, trigger U7 triggering, output low level, sampling keeps chip U8 to work in voltage hold mode, and the high level of 1Q output simultaneously, sends look-at-me to single-chip microcomputer, and notice single-chip microcomputer peak value arrives, and single-chip microcomputer is received after signal, starts AD conversion, completes last sampling.After AD converts, single-chip microcomputer sends reset signal to trigger, and control simulation switch S 1 closure, keeps capacitor C 1 and C2 to discharge simultaneously, waits for the arrival of next pulse.

Claims

1. a high-speed pulse peak value is screened sample circuit, by high speed voltage comparator LM311, sampling, keeping chip LF398, trigger SN74LS74, analog switch MAX4541 and resistance, electric capacity to form signal filter element, peak value screens unit, trigger element, peak value holding unit, sampling unit and forms, it is characterized in that:

Peak value is screened unit and is kept chip LF398 to form by 1 high speed voltage comparator LM311 and sampling, and peak value is screened the order output terminal of unit as the control end of described trigger element; The signal output part that peak value is screened unit is connected with the input end of described peak value holding unit;

Peak value holding unit keeps chip LF398, keeps charging capacitor, analog switch MAX4541 to form by sampling, described sampling keeps the signal of chip to keep end to be connected with keeping one end of charging capacitor, keeps the other end ground connection of charging capacitor; Described maintenance charging capacitor earth terminal is connected with the common port of analog switch, and the other end of described maintenance charging capacitor is connected with the Chang Kaiduan of analog switch;