CN104407208B - A kind of system of utilization circuit energy based on the relatively quasi- current in resistance property measurement of the positive inverse transformations of Fourier FFT - Google Patents
A kind of system of utilization circuit energy based on the relatively quasi- current in resistance property measurement of the positive inverse transformations of Fourier FFT Download PDFInfo
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Abstract
The present invention relates to a kind of system of utilization circuit energy based on the relatively quasi- current in resistance property measurement of the positive inverse transformations of Fourier FFT, device including energy collecting device and based on the relatively quasi- current in resistance property measurement of the positive inverse transformations of Fourier FFT, solve to solve powerup issue in the case where meeting available data monitoring, be a kind of arrester on-Line Monitor Device that disclosure satisfy that and support to realize by controller of DSP under microampere order Leakage Current.
Description
Technical field
The invention belongs to power network monitoring field, and in particular to arrester monitoring system field.
Background technology
Existing arrester monitoring system monitors the electric current for flowing through arrester using the mode of PT obtaining currents, and this mode
The present situation that existing intelligent station, transformer station's transmission system, high ferro electric power nowhere set PT is not adapted to, to be asked more than solving
Topic, the present invention solves to keep away using method and related device based on the positive inverse transformation relative calibration current in resistance property measurements of Fourier FFT
The measurement problem of thunder device.
As power network development monitoring real-time to efficiently and accurately is always that arrester on-line monitoring system is crucial, but it is existing at present
There is accuracy in monitoring device, such as traditional analog table, total current can only be monitored and meanwhile can not teletransmission, deposited in harsh adverse circumstances
In long-term consistency and stability problem, existing electronic detecting device exists and powered and transmission problem, using outside confession more than power supply
Electricity or battery power supply mode, all there are problems that engineering or, transmission is how logical using wired, wireless and traditional fiber
Letter mode, wired in the presence of introducing, Keep Clear-High Voltage, and wirelessly existence and stability problem, conventional fibre optic communication will to power consumption in transformer station
Ask larger, external power source can bring safety and construction problem according to actual field service condition, battery is powered due to that can not realize
, there is certain life-span in cycle charging, and arrester is in outdoor operation, and difference variation is huge, different geographical and Various Seasonal
Certain influence will be caused on battery, increases the fault rate of arrester monitoring device, general DSP belongs to high side controller, to work(
Consumption is required than larger.In order to solve to solve powerup issue in the case where meeting available data monitoring, ad hoc meter one kind disclosure satisfy that micro-
The arrester on-Line Monitor Device realized by controller of DSP is supported under peace level Leakage Current.
The content of the invention
The present invention realizes one and adopted without a kind of arrester electric leakage that externally fed only can just be realized with Leakage Current
Monitor set device, emphasis is to realize the collection transformation task that DSP is realized under microampere order leakage.
When there is Leakage Current by current sampling unit and limit volt rectification unit, by limit volt rectification circuit table alternation electricity
Stream is made into direct current, and capacitor storage unit electric capacity is charged, and voltage increases over time, and voltage 3.3V is started when increasing to
When, interval insulating power supply, which starts, starts working, and the utilization of power D/C power filled in electric capacity is transferred to D/C power output end, surely
A 3.3V unit is pressed, DC is exported after a stable 3.3V voltages, and triggering DSP Processor is started working, and DSP Processor is quick
Low-power consumption ADC amplifier units are opened, starts the over-pressed sampling units of A/D, starts sample streams overcurrent sampling unit electric current, quickly adopt
After sample is completed, in order to save electricity, DSP closes rapidly low-power consumption ADC amplifiers unit and the over-pressed sampling units of A/D save energy
Amount, DSP Processor will gather signal by high scheduling algorithm FFT and carry out time domain to frequency-domain transform post analysis fundamental wave and multiple harmonic
Data, calculate acquisition and finally require parameter recently, after the completion of calculating, and data packing modulates one by Manchester's code mode
Individual high frequency 1MHZ carrier signals LED radiating circuits, are completed after data transmitting, DSP immediately enters super low-power consumption park mode, once
Complete test can drop in 2.5V complete in interval isolation D/C power output voltage from 3.3V.Because Leakage Current is uninterrupted long
Phase is present, and front end energy collection unit may proceed to obtain electric energy, when voltage, which is charged to interval isolation D/C power, starts point, measurement electricity
Road can further circulate previous step data acquisition measurement work, and this circuit measuring is limited by path Leakage Current size,
Unit interval pendulous frequency increase when electric current is big, on the contrary reduce.
Main electrical current sampling unit uses the difference amplifier of high input impedance by sampling resistor, realizes path Leakage Current
Ratio-voltage relation is converted into, realizes that filtering is scaling by DSP control A/D over-samplings by low-power consumption AGC amplifiers unit
Element circuit realizes A/D12 ability in sampling, and DSP is with 1.2K sample rate, and 4096 points of sampling are changed by fft algorithm, obtained
The fundamental wave and each harmonic of sample rate current is taken to obtain high-precision current sampled value；
Power pack is by ac-dc converter circuit charges to energy collection unit, is filled in this circuit using comparator judgement
Electric amplitude, in order to reduce amplitude limit rectification unit to the whole influence for measuring current non-linear, energy collection unit sampling method
Capacitive way storage electric charge is drawn, judges that charging voltage reaches 3.3V by comparator, interval isolation DC-DC switch electricity is then turned on
Source, energy is transformed into inside output capacitor, and when output capacitance voltage can reach 3.3V, automatic start DSP is operated,
Start low-power consumption AGC amplifiers unit after DSP work and A/D over-sampling units realize signal acquisition, then pass through internal Fourier FFT
Conversion process analyzes valid data, and valid data are transferred to data by light form by LED pulse emitting units afterwards
Receiving terminal.
Its concrete technical scheme is as follows：
A kind of system of utilization circuit energy based on the relatively quasi- current in resistance property measurement of the positive inverse transformations of Fourier FFT, including
Energy collecting device and the device based on the relatively quasi- current in resistance property measurement of the positive inverse transformations of Fourier FFT, described collection of energy
Limit volt rectification unit, energy collection unit, low-power consumption DC isolating converters unit, the rectifying and voltage-stabilizing that device includes being sequentially connected are filtered
Ripple output unit and the low work(being connected with limit volt rectification unit, energy collection unit, low-power consumption DC isolating converter units
Comparator control unit is consumed, described limit volt rectification unit is directly connected in tested loop, has electric current to flow through in tested loop
When, be converted to DC voltage form by limit volt rectification unit and energy collection unit is charged, energy collection unit uses electric capacity
Mode storage energy；The described device based on the relatively quasi- current in resistance property measurement of the positive inverse transformations of Fourier FFT is received using energy
The energy function that acquisition means are collected, including accurate AGC amplifiers, low pass filter, accurate zero-crossing comparator, time-delay trigger,
ADC triggerings sampling unit, sampling initial phase angle control unit, MCU controllers, described accurate AGC amplifiers, low pass filter, ADC
Triggering sampling unit and MCU controllers are sequentially connected, and accurate AGC amplifiers are also connected with MCU controllers, described accurate zero passage ratio
Compared with device connection low pass filter, ADC triggerings sampling unit, time-delay trigger and MCU controllers, described time-delay trigger also connects
ADC triggering sampling units and MCU controllers are connected to, described sampling initial phase angle control unit is connected with MCU controllers.
It is preferred that, described accurate AGC amplifiers are used to amplifying input signal, described low pass filter be used to realizing to
More than the 1KHz input signal Jing Guo precision AGC amplifiers plays filter action, after filtered processing, and accurate zero passage ratio is sent all the way
Compared with device, send ADC triggering collection units etc. to be collected all the way, described accurate zero-crossing comparator is used for when it detects forward signal
Zero crossing, that is, export a rising edge signal, all the way to time-delay trigger, realized all the way to MCU controllers to input signal
Frequency monitor in real time, the rising edge signal that described time-delay trigger is used to be exported according to accurate zero-crossing comparator is delayed one
ADC triggering collection units are triggered after setting value, described ADC triggering collections unit does not work under normal circumstances, works as Time-delayed trigger
When device is to ADC triggering collections one signal of unit, ADC triggering collection units are brought into operation ADC collecting works, and described ADC is adopted
Collecting trigger element circuit coordinates MCU controllers to the discrete acquisitions of input signal, completes after sampled point number, by based in Fu
The relatively quasi- current in resistance property measuring method of the positive inverse transformations of leaf FFT realizes the analyzing and processing to sampled signal, obtains total current and resistance
Property electric current.
Described sampling initial phase angle control unit is used in the case where the current in resistance property of measurement is inaccurate, is controlled by MUC
The delay value of device adjustment time-delay trigger setting processed realizes the adjustment to the discrete sampling fundamental wave first phase angle in algorithm.
Described energy collecting device include be sequentially connected limit volt rectification unit, energy collection unit, low-power consumption DC every
Isolate from converter unit, rectifying and voltage-stabilizing filtering output unit and with limit volt rectification unit, energy collection unit, low-power consumption DC
The low power consumption comparator control unit that converter unit is connected, described limit volt rectification unit is directly connected on tested loop
In, when thering is the electric current to flow through in tested loop, be converted to DC voltage form by limit volt rectification unit and energy collection unit is filled
Electricity, energy collection unit uses capacitive way storage energy.
Described limit volt rectification unit is in the series circuit of arrester Leakage Current, including low loss capacitance C6, TVS
Pipe V1, NMOS tube Q1, PMOS Q2, NMOS tube Q7 and PMOS Q8, described low loss capacitance C6 and TVS pipe V1 are in parallel and set
Between the first input end J1 and the second input J2 of arrester Leakage Current, described NMOS tube Q1 drain electrode and first defeated
Enter to hold J1, NMOS tube Q7 and PMOS Q8 grid to be connected, NMOS tube Q1 grid and NMOS tube Q7 drain electrode and PMOS
Q2 grid is connected, and NMOS tube Q1 source electrode is connected in energy collection unit and is connected with NMOS tube Q7 source electrode；Described
NMOS tube Q7 drain electrode is connected to the second input J2, and grid of its grid also with PMOS Q8 is connected；The PMOS Q2's
Source electrode is connected with PMOS Q8 source electrode, and is connected to energy collection unit, PMOS Q2 grid and NMOS tube Q7 and PMOS
Pipe Q8 drain electrode is connected.
Described energy collection unit includes 3.3v limits volt voltage-stabiliser tube D1 and energy storage farad capacitor C1, described 3.3v limit volts
Voltage-stabiliser tube D1 and energy storage farad capacitor C1 are connected in PMOS Q2, PMOS Q8 source electrode and NMOS tube Q1, NMOS tube Q7
Between source electrode, wherein, 3.3v limit volt voltage-stabiliser tubes D1 positive pole is connected with NMOS tube Q1, NMOS tube Q7 source electrode, and 3.3v limit volts are steady
Pressure pipe D1 negative pole is connected with PMOS Q2, PMOS Q8 source electrode.
Described low power consumption comparator control unit include comparator U1, voltage-stablizer U2, nmos switch pipe and resistance R1,
R2, R3, R4, R5, R6, R7, described voltage-stablizer U2 first input end are connected with the 3.3v positive poles for limiting volt voltage-stabiliser tube D1, the
Two inputs connect through resistance R5, resistance R6 and the 3.3v positive pole for limiting volt voltage-stabiliser tube D1, and voltage-stablizer U2 output end is through resistance R2
It is connected with the 3.3v negative poles for limiting volt voltage-stabiliser tube D1, described comparator U1 positive input+IN are limited through resistance R1 and 3.3v to be lied prostrate
Voltage-stabiliser tube D1 negative pole connection, is connected, comparator U1 reverse input ends-IN through resistance R4 and the 3.3v positive pole for limiting volt voltage-stabiliser tube D1
It is connected through resistance R6 and the 3.3v positive pole for limiting volt voltage-stabiliser tube D1, comparator U1 power input V+ and 3.3v limit volt voltage-stabiliser tube D1
Negative pole be connected, the negative pole of comparator U1 output end vo ut through resistance R3 and 3.3v limit volt voltage-stabiliser tubes D1 is connected, and compares
Device U1 Voltage Reference basic point GND and 3.3v limit volt voltage-stabiliser tube D1 positive pole is connected, and described nmos switch pipe includes NMOS tube
Q9, NMOS tube Q10, the NMOS tube Q9 drain electrode are connected through resistance R7 with comparator U1 reverse input ends-IN, through resistance R7,
Resistance R6 is connected with the 3.3v positive poles for limiting volt voltage-stabiliser tube D1, and NMOS tube Q9, NMOS tube Q10 source electrode lie prostrate voltage stabilizing with 3.3v limits
Pipe D1 positive pole is connected, and NMOS tube Q9 grid is connected and steady through resistance R3 and 3.3v limit volts with NMOS tube Q10 grid
Pressure pipe D1 negative pole is connected.
Described low-power consumption DC isolating converters unit include transformer T1, electric capacity C3, C2, C4, diode D2, D5,
In PMOS Q11, the transformer T1 primary coils electric capacity C2 and diode D2, the transformation are serially connected between inductance L1 two ends
Inductance L2 p8 ends are connect through diode D5 in NMOS tube Q10 drain electrode, the transformer T1 primary coils in device T1 primary coils
Grid of the inductance L2 p7 ends through electric capacity C3 connection PMOSs Q11, PMOS Q11 source electrode connects NMOS tube Q10 drain electrode, inductance
L2 p7 ends connect in NMOS tube Q10 drain electrode, transformer T1 secondary coils through electric capacity C3, resistance R8 and gone here and there between inductance L3 two ends
It is connected to electric capacity C4.
The rectifying and voltage-stabilizing filtering output unit is included by NMOS tube Q3, NMOS tube Q4, PMOS Q5 and PMOS Q6 groups
Into diode bridge rectifier circuit and connected voltage regulation filtering output circuit.
Brief description of the drawings
Fig. 1 is schematic structural view of the invention；
Fig. 2 is energy collecting device structural representation；
Fig. 3 is the apparatus structure schematic diagram based on the positive inverse transformation relative calibration current in resistance property measurements of Fourier FFT.
Fig. 4 is energy collecting device electrical block diagram；
Embodiment
The present invention will be further described with reference to the accompanying drawings and examples.
As shown in Fig. 2 the energy collecting device for arrester monitoring system, by limit volt rectification unit, collection of energy list
Member, low-power consumption DC isolating converters are sequentially connected composition；Ask for limit volt rectification unit to be directly connected in tested loop, in loop
When thering is the electric current to flow through, be converted to DC voltage form by limit volt rectification unit and energy collection unit capacitor energy is filled
Electricity, energy collection unit uses capacitive way storage energy.
Described limit volt rectification unit is in the series circuit of arrester Leakage Current, by low loss capacitance, TVS pipe,
3.3v limits volt voltage-stabiliser tube and four metal-oxide-semiconductor structure compositions, for alternating current to be made into direct current, to the electricity of energy collection unit
Hold energy-storage units charging.
V1, C6 are in order to prevent moment thunderbolt pulse from causing to damage to the impact of metal-oxide-semiconductor rectification unit circuit in circuit, and D1 is selected
The minimum voltage stabilizing quiescent current of low-power consumption is less than 5uA voltage-stabiliser tubes, reduces charge loss electric current, limits charging voltage within 3.3V,
Because D1 and metal-oxide-semiconductor are nonlinear device, if charging voltage is not done under any limitation, it can increase with voltage, more than 3.3V
More than, nonlinear device influence starts to show, and causes the non-linear aggravation of loop current, loop current waveform is distorted, especially
Influence for three, quintuple harmonics is notable.
Described capacitor storage unit is opened by ultra-low power consumption comparer, super low-power consumption voltage-stablizer, energy storage farad capacitor, NMOS
Close pipe to constitute, for collecting the direct current that limit volt rectification unit is transmitted, be directly stored in accumulator farad capacitor, when farad electricity
When appearance terminal voltage is charged to 3.3V, comparator work output high level, NMOS tube is open-minded, exports 3.3V voltages and isolates to low-power consumption DC
Converter, starts concussion work and the energy in accumulator electric capacity is transformed into output end by transformer mode.
Rectification circuit uses unconventional diode bridge rectifier circuit, solves under low input current, and diode exists high
Up to 0.7V pressure drops, because diode is nonlinear device, non-linear effects equally are caused to loop current.
In order to reduce circuit oneself power consumption, it is to avoid energy is wasted, R1, R3, R4, R5, R6, R7 resistance are selected in circuit
Resistance more than megaohm, while U1, U2 select ultra-low power consumption comparer and parameter voltage stabilizator, makes loop works during collection of energy
Current power dissipation is within 12uA.
Described interval isolation D/C power is made up of rectification unit, self-oscillation unit, rectification stable pressuring unit, for receiving
Electric energy that capacitor storage unit is transmitted simultaneously is transmitted to arrester monitoring system.
Low-power consumption DC isolating converters, are unconventional complicated DC-DC switch power modules, using many one group of coils of coiling
Inductance L and electric capacity C3 resistance R8, metal-oxide-semiconductor Q11, diode D5, automatic oscillator is constituted according to input voltage amplitude, and non-traditional
The big oscillator of power consumption, substantially reduces the complexity of DC Switching Power Supply static working currents, power consumption≤10uA, and circuit, by electricity
Hold the energy in C1, output end is transformed into by Switching Power Supply mode.
When there is electric current to flow through in loop, Q2, Q7 and Q1, Q8 alternate conductions are converted to direct current, by D1 limit volt voltage stabilizings pair
C1 farad capacitors charge, voltage-stabiliser tube U2 work one 2.0V reference voltage of output, anti-to comparator U1 by R5, R6 partial pressure 1.0V
To input-IN, when C1 terminal voltages are charged to 3.3V, by R1, R4 electric resistance partial pressure input comparator U1 positive input+
IN voltages are more than reverse input end reference voltage, comparator U1 input high levels, metal-oxide-semiconductor Q9, Q10 conducting, after R7 and R6 are in parallel
Partial pressure reduction input comparator U1 reverse input voltage, can stablize defeated before keeping U1 when C1 terminal voltages are reduced to 1.6V
Go out high level, keep Q9, Q10 constant conduction；Q10 conductings rear end isolation D/C power work, C3, R8 and T1 (p7-p8) transformer
Combination concussion, is transformed into output port, entered Q3, Q6 and Q4, Q5 alternations and be transformed to Rectified alternating current, by D3, D4 is steady
Pressure one stable DC voltage of output.
The present invention solve current existing Switching Power Supply be all in the form of voltage and quiescent dissipation all at least several mA with
On, it is impossible to loop current is applied to only in tens uA low current ac current source loop circuits.
As shown in figure 3, the device circuit design based on the relatively quasi- current in resistance property measurement of the positive inverse transformations of Fourier FFT is such as
Under：Circuit is single by accurate AGC amplifiers, 1KHz low pass filters, accurate zero-crossing comparator, time-delay trigger, ADC triggering samplings
Member, sampling initial phase angle control unit, MCU controllers are constituted.
Accurate AGC amplifiers：The amplification to input signal is completed, it is inputted by AGC automatic gain control circuits
Signal is amplified in a suitable amplitude range, is that post-processing prepares；
Low pass filter：Realize and filter action is played in more than 1KHz to frequency input signal, reduce in useful signal
Noise disturbance causes measurement error, for input signal amplitude it is exceptionally weak in the case of, in signal carry substantial amounts of interference information,
This type of information is exaggerated simultaneously, if the untreated accurate Zero-cross comparator that can cause rear end can not accurately judge useful signal
Zero crossing is so as to cause error
Accurate zero-crossing comparator：The judgement work to input signal zero crossing is realized, frequency of the rear end to input signal is realized
Rate judges, so as to be prepared for the synchronized sampling of rear end；
Time-delay trigger：When accurate zero-crossing comparator detects forward signal zero crossing, that is, a rising edge signal is exported,
Time-delay trigger is delayed after a setting value according to the rising edge signal and triggers ADC triggering collection units；
ADC triggering collection units：The unit does not work under normal circumstances, when time-delay trigger gives ADC triggering collection units
During one signal, ADC triggering collection units bring into operation ADC collecting works；
Gather initial phase angle control unit：This functional unit is realized appoints to the discrete sampling fundamental wave angle of arrival adjustment in algorithm
Business, meets it and requires；
Operation principle process：Total current is after sampling resistor RS, into accurate AGC amplifiers, the signal after amplification,
By low pass filter, after filtering process, accurate zero-crossing comparator is sent all the way, send ADC triggering collection units etc. to be collected all the way,
Accurate zero-crossing comparator operation detection is to a rising edge trigger signal is exported during positive zero crossing, all the way to time-delay trigger,
Realized all the way to MCU controllers and the frequency of input signal is monitored in real time, to realize synchro measure requirement, time-delay trigger root
According to setting delay value, after delay certain time reaches, triggering ADC collecting units circuit work, ADC collecting units circuit coordinates
MCU controllers are completed after sampled point number to the discrete acquisitions of input signal, real by above-mentioned algorithm by Fourier transformation method
Now to the analyzing and processing of sampled signal, obtain total current and current in resistance property, but measurement current in resistance property it is inaccurate in the case of, illustrate electricity
Road is not accurate enough to sampling initial phase angle and true total current and the tracking of current in resistance property angle, now by adjusting sampling initial phase angle
Control unit circuit, you can realize that the tracking to angle is met, realize the accurate measurement work of current in resistance property.
Embodiment one
Tested by the full VA characteristic curve to Zinc-Oxide Arrester test product, zinc oxide ZnO arrester working characteristics is bent
Line can be divided into two big sections, low current section linearity range, and high current section inelastic region；During normal operation, oxidation zinc metal sheet operating point leads to
Low current i.e. linearity range is often to run；
According to test low current linearity range, the equivalent model of Zinc-Oxide Arrester is realized for Rx and Cx parallel way.
Reference signal terminal voltage is set according to RC capacitance-resistances characteristic in parallelElectric current is represented in Rx
ForElectric current in Cx is
Can must be by the total current of Zinc-Oxide Arrester according to theoreticalI is to flow through
The circuital virtual value of Zinc-Oxide Arrester, f0For fundamental frequency, θ0To refer to initial phase angle, θ1For current in resistance property iRWith total current i
Angle, because of IR=Icos (θ1), as long as so obtaining total current I and θ by measurement1I can be obtainedRValue.
If synchronized sampling rate is Fs, measured signal fundamental frequency (i.e. fundamental frequency) is f0；
The requirement of synchronized sampling rate is that itself and measured signal frequency ratio are integral multiple relation, i.e. Fs/f0=Nk；(Nk is whole
Number), sampling real-time tracking compensates Fs to reach synchronized sampling requirement in circuit, according to measured signal fundamental frequency f0Excursion
Between 45Hz~65Hz, Nk can value be Nk=20；Sample rate Fs selections are Fs=Nk*f0=20* (45Hz~65Hz)=
0.99KHz~1.3KHz.
Required according to sampling thheorem and the analysis of three quintuple harmonics, sample rate Fs selections, which are met, to be required, analyze in order to accurate and
Spectral leakage is prevented, continuous sampling points are set to N=8192, and minimal physical resolution ratio is that 0.12Hz meets measurement request.
As shown in figure 3, real according to arrester to circuital discrete sampling in Zinc-Oxide Arrester by Rs sampling resistors
Border running situation, major harmonic component is concentrated mainly in three quintuple harmonics, so Main Analysis fundamental wave and three quintuple harmonics, lead to
Cross Fourier's FFT time-domain signals and change to frequency-region signal conversion elimination higher hamonic wave, recycle the reduction discrete sampling of FFT inverse transformations
Signal can obtain,
I.e.
Obtain current weight I, I of fundamental wave and three quintuple harmonics respectively by above-mentioned expression formula3、I5, and first phase of accordingly sampling
Position θ2、θ3、θ5；Do not consider under three quintuple harmonics first, i.e.,Truly pass through zinc oxide
Total current in arresterCompare, learn and disclosure satisfy that θ1=θ2In the case of basis
θ is tried to achieve after discrete sampling FFT1, according to IR=Icos (θ1), you can obtain the current in resistance property under fundamental wave, same method difference
The current in resistance property under three quintuple harmonics is obtained, total current in resistance property is the average value of each harmonic vector sum.
Tested according to the working characteristics of Zinc-Oxide Arrester, in the main linear section of low current section, θ is met in order to reach1
=θ2, θ is realized using the first calibration method that carries out herein1=θ2；Because θ1、θ2Actual angle scope is led to all between (- π -+π)
Control hardware circuit is crossed with hop controller, it is that θ can be achieved to adjust the control to total current discrete sampling starting sample position1=θ2,
The accuracy of low current section measurement can be ensured in longtime running, for high current non-linear section, three or five in the signal of sampling
Subharmonic substantially has aggravation phenomenon, is the average value under work each harmonic wave because of the algorithm to calculate total current in resistance property, so
It still disclosure satisfy that accurate measurement request, i.e., disclosure satisfy that monitoring task to current in resistance property by testing the method；
As shown in figure 3, hardware circuit design of the present invention is as follows：Circuit is by accurate AGC amplifiers, 1KHz low pass filters, essence
Close zero-crossing comparator, time-delay trigger, ADC triggerings sampling unit, sampling initial phase angle control unit, MCU controllers are constituted：
Accurate AGC amplifiers：The amplification to input signal is completed, it is inputted by AGC automatic gain control circuits
Signal is amplified in a suitable amplitude range, is that post-processing prepares.
Low pass filter：Realize and filter action is played in more than 1KHz to frequency input signal, reduce in useful signal
Noise disturbance causes measurement error, for input signal amplitude it is exceptionally weak in the case of, in signal carry substantial amounts of interference information,
This type of information is exaggerated simultaneously, if the untreated accurate Zero-cross comparator that can cause rear end can not accurately judge useful signal
Zero crossing is so as to cause error.
Accurate zero-crossing comparator：The judgement work to input signal zero crossing is realized, frequency of the rear end to input signal is realized
Rate judges, so as to be prepared for the synchronized sampling of rear end.
Time-delay trigger：When accurate zero-crossing comparator detects forward signal zero crossing, that is, a rising edge signal is exported,
Time-delay trigger is delayed after a setting value according to the rising edge signal and triggers ADC triggering collection units.
ADC triggering collection units：The unit does not work under normal circumstances, when time-delay trigger gives ADC triggering collection units
During one signal, ADC triggering collection units bring into operation ADC collecting works.
Gather initial phase angle control unit：This functional unit is realized appoints to the discrete sampling fundamental wave first phase angle adjustment in algorithm
Business, makes it meet θ1=θ2It is required that.
Operation principle process：Total current is after sampling resistor Rs, into accurate AGC amplifiers, the letter after amplification
Number, by low pass filter, after filtering process, accurate zero-crossing comparator is sent all the way, is sent ADC triggering collections unit to wait all the way and is adopted
Collection, accurate zero-crossing comparator operation detection is to a rising edge trigger signal is exported during positive zero crossing, all the way to Time-delayed trigger
Device, realizes to MCU controllers and the frequency of input signal is monitored in real time all the way, to realize synchro measure requirement, Time-delayed trigger
Device is according to setting delay value, after delay certain time reaches, triggering ADC collecting units circuit work, ADC collecting unit circuits are matched somebody with somebody
Discrete acquisitions of the MCU controllers to input signal are closed, are completed after sampled point number, above-mentioned algorithm is pressed by Fourier transformation method
The analyzing and processing to sampled signal is realized, total current and current in resistance property is obtained, in the case where the current in resistance property of measurement is inaccurate, said
Bright circuit is not accurate enough to sampling initial phase angle and true total current and the tracking of current in resistance property angle, now by adjusting sampling just
Phase angle control unit circuit, you can realize that the tracking to angle meets θ1=θ2, realize the accurate measurement work of current in resistance property.
Described energy collecting device, including be sequentially connected limit volt rectification unit, energy collection unit, low-power consumption DC every
Isolate from converter unit, rectifying and voltage-stabilizing filtering output unit and with limit volt rectification unit, energy collection unit, low-power consumption DC
The low power consumption comparator control unit that converter unit is connected, described limit volt rectification unit is directly connected on tested loop
In, when thering is the electric current to flow through in tested loop, be converted to DC voltage form by limit volt rectification unit and energy collection unit is filled
Electricity, energy collection unit uses capacitive way storage energy.
Described limit volt rectification unit is in the series circuit of arrester Leakage Current, including low loss capacitance C6, TVS
Pipe V1, NMOS tube Q1, PMOS Q2, NMOS tube Q7 and PMOS Q8, described low loss capacitance C6 and TVS pipe V1 are in parallel and set
Between the first input end J1 and the second input J2 of arrester Leakage Current, described NMOS tube Q1 drain electrode and first defeated
Enter to hold J1, NMOS tube Q7 and PMOS Q8 grid to be connected, NMOS tube Q1 grid and NMOS tube Q7 drain electrode and PMOS
Q2 grid is connected, and NMOS tube Q1 source electrode is connected in energy collection unit and is connected with NMOS tube Q7 source electrode；Described
NMOS tube Q7 drain electrode is connected to the second input J2, and grid of its grid also with PMOS Q8 is connected；The PMOS Q2's
Source electrode is connected with PMOS Q8 source electrode, and is connected to energy collection unit, PMOS Q2 grid and NMOS tube Q7 and PMOS
Pipe Q8 drain electrode is connected.For alternating current to be made into direct current, so that the capacitor storage unit to energy collection unit fills
Electricity.TVS pipe V1, low loss capacitance C6 cause to prevent moment thunderbolt pulse from being impacted to metal-oxide-semiconductor rectification unit circuit in circuit
Damage.
Described energy collection unit includes 3.3v limits volt voltage-stabiliser tube D1 and accumulator farad capacitor C1, described 3.3v limits
Volt voltage-stabiliser tube D1 and accumulator farad capacitor C1 is connected in PMOS Q2, PMOS Q8 source electrode and NMOS tube Q1, NMOS tube
Between Q7 source electrode, wherein, 3.3v limit volt voltage-stabiliser tubes D1 positive pole is connected with NMOS tube Q1, NMOS tube Q7 source electrode, 3.3v limits
Volt voltage-stabiliser tube D1 negative pole is connected with PMOS Q2, PMOS Q8 source electrode.For collecting the direct current that limit volt rectification unit is transmitted
Electricity, is directly stored in accumulator farad capacitor C1.3.3v limits volt voltage-stabiliser tube D1 is small from the minimum voltage stabilizing quiescent current of low-power consumption
In 5uA voltage-stabiliser tubes, reduce charge loss electric current, limitation charging voltage is within 3.3V, due to 3.3v limit volt voltage-stabiliser tubes D1 and MOS
Manage as nonlinear device, if charging voltage is not done under any limitation, can increase with voltage, it is non-linear more than more than 3.3V
Component influences start to show, and cause the non-linear aggravation of loop current, and loop current waveform is distorted, especially for three, five times
The influence of harmonic wave is notable.
Described low power consumption comparator control unit include comparator U1, voltage-stablizer U2, nmos switch pipe and resistance R1,
R2, R3, R4, R5, R6, R7, described voltage-stablizer U2 first input end are connected with the 3.3v positive poles for limiting volt voltage-stabiliser tube D1, the
Two inputs connect through resistance R5, resistance R6 and the 3.3v positive pole for limiting volt voltage-stabiliser tube D1, and voltage-stablizer U2 output end is through resistance R2
It is connected with the 3.3v negative poles for limiting volt voltage-stabiliser tube D1, described comparator U1 positive input+IN are limited through resistance R1 and 3.3v to be lied prostrate
Voltage-stabiliser tube D1 negative pole connection, is connected, comparator U1 reverse input ends-IN through resistance R4 and the 3.3v positive pole for limiting volt voltage-stabiliser tube D1
It is connected through resistance R6 and the 3.3v positive pole for limiting volt voltage-stabiliser tube D1, comparator U1 power input V+ and 3.3v limit volt voltage-stabiliser tube D1
Negative pole be connected, the negative pole of comparator U1 output end vo ut through resistance R3 and 3.3v limit volt voltage-stabiliser tubes D1 is connected, and compares
Device U1 Voltage Reference basic point GND and 3.3v limit volt voltage-stabiliser tube D1 positive pole is connected, and described nmos switch pipe includes NMOS tube
Q9, NMOS tube Q10, the NMOS tube Q9 drain electrode are connected through resistance R7 with comparator U1 reverse input ends-IN, through resistance R7,
Resistance R6 is connected with the 3.3v positive poles for limiting volt voltage-stabiliser tube D1, and NMOS tube Q9, NMOS tube Q10 source electrode lie prostrate voltage stabilizing with 3.3v limits
Pipe D1 positive pole is connected, and NMOS tube Q9 grid is connected and steady through resistance R3 and 3.3v limit volts with NMOS tube Q10 grid
Pressure pipe D1 negative pole is connected.In order to reduce circuit oneself power consumption, it is to avoid R1 in the waste of energy, circuit, R3, R4, R5, R6,
R7 resistance from megaohm more than resistance, while comparator U1, voltage-stablizer U2 from ultra-low power consumption comparer and super low-power consumption it is steady
Depressor, loop works current power dissipation is within 12uA during making collection of energy.When accumulator farad capacitor C1 terminal voltages are charged to
During 3.3V, ultra-low power consumption comparer U1 work output high level, nmos switch pipe is open-minded, export 3.3V voltages to low-power consumption DC every
From converter unit, start concussion work and the energy in accumulator farad capacitor C1 is transformed into output by transformer mode
End.
Described low-power consumption DC isolating converters unit include transformer T1, electric capacity C3, C2, C4, diode D2, D5,
In PMOS Q11, the transformer T1 primary coils electric capacity C2 and diode D2, the transformation are serially connected between inductance L1 two ends
Inductance L2 p8 ends are connect through diode D5 in NMOS tube Q10 drain electrode, the transformer T1 primary coils in device T1 primary coils
Grid of the inductance L2 p7 ends through electric capacity C3 connection PMOSs Q11, PMOS Q11 source electrode connects NMOS tube Q10 drain electrode, inductance
L2 p7 ends connect in NMOS tube Q10 drain electrode, transformer T1 secondary coils through electric capacity C3, resistance R8 and concatenated between inductance L3 two ends
There is electric capacity C4.Low-power consumption DC isolating converter units, are unconventional complicated DC-DC switch power modules, using many coilings one
Group coil inductance L and electric capacity C3 resistance R8, metal-oxide-semiconductor Q11, diode D5, automatic oscillator is constituted according to input voltage amplitude, and
The big oscillator of non-traditional power consumption, substantially reduces the complexity of DC Switching Power Supply static working currents, power consumption≤10uA, and circuit
Degree, by the energy in accumulator farad capacitor C1, output end is transformed into by Switching Power Supply mode.
The rectifying and voltage-stabilizing filtering output unit is included by NMOS tube Q3, NMOS tube Q4, PMOS Q5 and PMOS Q6 groups
Into diode bridge rectifier circuit and connected voltage regulation filtering output circuit.Here rectification circuit is using unconventional
Diode bridge rectifier circuit, is solved under low input current, and diode has up to 0.7V pressure drops, because diode is non-thread
Property device, equally causes non-linear effects to loop current.
When there is electric current to flow through in loop, PMOS Q2, NMOS tube Q7 and NMOS tube Q1, PMOS Q8 alternate conductions turn
Direct current is changed to, accumulator farad capacitor C1 is charged by 3.3v limit volt voltage-stabiliser tube D1 limit volt voltage stabilizings, voltage-stabiliser tube U2 work outputs
One 2.0V reference voltage, comparator U1 reverse input end-IN, accumulator farad capacitor are given by resistance R5, R6 partial pressure 1.0V
When C1 terminal voltages are charged to 3.3V, it is more than by resistance R1, R4 partial pressure input comparator U1 positive input+IN voltages anti-
To input reference voltage, comparator U1 input high levels, metal-oxide-semiconductor Q9, Q10 conducting, partial pressure reduction after resistance R7 and R6 are in parallel
Input comparator U1 reverse input voltage, before keeping comparator U1 when accumulator farad capacitor C1 terminal voltages are reduced to 1.6V
Output high level can be stablized, the nmos switch pipe constant conduction of NMOS tube Q9, Q10 composition is kept；After NMOS tube Q10 conductings
End isolation D/C power work, electric capacity C3, resistance R8 and transformer T1 (p7-p8) combination concussions, are transformed into output port, pass through
NMOS tube Q3, PMOS Q6 and NMOS tube Q4, PMOS Q5 alternations are transformed to Rectified alternating current, by diode D3, D4
Voltage stabilizing exports a stable DC voltage.
Energy collecting device solves that current existing Switching Power Supply is all in the form of voltage and quiescent dissipation is all at least
Several more than mA, it is impossible to be applied to the problem of loop current is only in tens uA low current ac current source loop circuits.
Claims (8)
1. a kind of system of utilization circuit energy based on the positive inverse transformation current in resistance property measurements of Fourier FFT, it is characterised in that：Including
Energy collecting device and the device based on the positive inverse transformation current in resistance property measurements of Fourier FFT, described energy collecting device include
Limit volt rectification unit, energy collection unit, low-power consumption DC isolating converters unit, the rectifying and voltage-stabilizing filtering output list being sequentially connected
Member and the low power consumption comparator being connected with limit volt rectification unit, energy collection unit, low-power consumption DC isolating converter units
Control unit, described limit volt rectification unit is directly connected in tested loop, when having the electric current to flow through in tested loop, by limit
Volt rectification unit is converted to DC voltage form and energy collection unit is charged, and energy collection unit stores energy using capacitive way
Amount；The described device based on the positive inverse transformation current in resistance property measurements of Fourier FFT has the energy collected using energy collecting device
Measure the function of operation, including accurate AGC amplifiers, low pass filter, accurate zero-crossing comparator, time-delay trigger, ADC triggering samplings
Unit, sampling initial phase angle control unit, MCU controllers, described accurate AGC amplifiers, low pass filter, ADC triggering samplings are single
Member and MCU controllers are sequentially connected, and accurate AGC amplifiers are also connected with MCU controllers, and described accurate zero-crossing comparator connection is low
Bandpass filter, ADC triggerings sampling unit, time-delay trigger and MCU controllers, described time-delay trigger are also associated with ADC and touched
Sampling unit and MCU controllers are sent out, described sampling initial phase angle control unit is connected with MCU controllers.
2. a kind of utilization circuit energy according to claim 1 is based on the positive inverse transformation current in resistance property measurements of Fourier FFT
System, it is characterised in that：Described accurate AGC amplifiers are used to amplify input signal, and described low pass filter is used for realization pair
Filter action is played in more than the 1KHz input signal Jing Guo precision AGC amplifiers, after filtered processing, accurate zero passage is sent all the way
Comparator, sending ADC to trigger all the way, sampling unit etc. is to be collected, and described accurate zero-crossing comparator is used for when it detects positive letter
During number zero crossing, that is, when exporting a rising edge signal, all the way to time-delay trigger, realized all the way to MCU controllers to defeated
The frequency for entering signal is monitored in real time, and described time-delay trigger is used to be prolonged according to the rising edge signal that accurate zero-crossing comparator is exported
When one setting value after triggering ADC triggering sampling units, described ADC triggerings sampling unit do not work under normal circumstances, when prolonging
When trigger when triggering one signal of sampling unit to ADC, ADC triggering sampling units bring into operation ADC collecting works, described
ADC triggering sampling unit circuits coordinate MCU controllers to the discrete acquisitions of input signal, complete after sampled point number, pass through base
The analyzing and processing to sampled signal is realized in the positive inverse transformation current in resistance property measuring methods of Fourier FFT, total current is obtained and resistive
Electric current.
3. a kind of utilization circuit energy according to claim 1 is based on the positive inverse transformation current in resistance property measurements of Fourier FFT
System, it is characterised in that：Described sampling initial phase angle control unit is used in the case where the current in resistance property of measurement is inaccurate, leads to
Cross tune of the delay value realization to the discrete sampling fundamental wave first phase angle in algorithm of MUC controllers adjustment time-delay trigger setting
It is whole.
4. a kind of utilization circuit energy according to claim 1 is based on the positive inverse transformation current in resistance property measurements of Fourier FFT
System, it is characterised in that：Described limit volt rectification unit is in the series circuit of arrester Leakage Current, including low-loss electricity
Hold C6, TVS pipe V1, NMOS tube Q1, PMOS Q2, NMOS tube Q7 and PMOS Q8, described low loss capacitance C6 and TVS pipe V1
Between in parallel and first input end (J1) and the second input (J2) located at arrester Leakage Current, described NMOS tube Q1's
Drain electrode is connected with first input end (J1), NMOS tube Q7 and PMOS Q8 grid, NMOS tube Q1 grid and NMOS tube Q7
Drain electrode and PMOS Q2 grid be connected, NMOS tube Q1 source electrode be connected in energy collection unit and with NMOS tube Q7 source electrode
It is connected；Described NMOS tube Q7 drain electrode is connected to the second input (J2), and grid of its grid also with PMOS Q8 is connected；Institute
The source electrode for stating PMOS Q2 is connected with PMOS Q8 source electrode, and is connected to energy collection unit, PMOS Q2 grid with
NMOS tube Q7 and PMOS Q8 drain electrode are connected.
5. a kind of utilization circuit energy according to claim 4 is based on the positive inverse transformation current in resistance property measurements of Fourier FFT
System, it is characterised in that：Described energy collection unit includes 3.3v limits volt voltage-stabiliser tube D1 and energy storage farad capacitor C1, described
3.3v limit volts voltage-stabiliser tube D1 and energy storage farad capacitor C1 be connected in PMOS Q2, PMOS Q8 source electrode and NMOS tube Q1,
Between NMOS tube Q7 source electrode, wherein, 3.3v limit volt voltage-stabiliser tubes D1 positive pole is connected with NMOS tube Q1, NMOS tube Q7 source electrode,
3.3v limit volt voltage-stabiliser tubes D1 negative pole is connected with PMOS Q2, PMOS Q8 source electrode.
6. a kind of utilization circuit energy according to claim 5 is based on the positive inverse transformation current in resistance property measurements of Fourier FFT
System, it is characterised in that：Described low power consumption comparator control unit include comparator U1, voltage-stablizer U2, nmos switch pipe with
And resistance R1, R2, R3, R4, R5, R6, R7, described voltage-stablizer U2 first input end limit volt voltage-stabiliser tube D1 positive pole with 3.3v
It is connected, the second input connects through resistance R5, resistance R6 and the 3.3v positive pole for limiting volt voltage-stabiliser tube D1, voltage-stablizer U2 output end
Negative pole through resistance R2 and 3.3v limit volts voltage-stabiliser tube D1 is connected, described comparator U1 positive input+IN through resistance R1 with
3.3v limit volt voltage-stabiliser tubes D1 negative pole connection, is connected, comparator U1 is reverse through resistance R4 and the 3.3v positive pole for limiting volt voltage-stabiliser tube D1
Input-IN is connected through resistance R6 and the 3.3v positive pole for limiting volt voltage-stabiliser tube D1, comparator U1 power input V+ and 3.3v limit
Volt voltage-stabiliser tube D1 negative pole is connected, and comparator U1 output end vo ut limits volt voltage-stabiliser tube D1 negative pole phase through resistance R3 and 3.3v
Connection, comparator U1 Voltage Reference basic point GND and 3.3v limit volt voltage-stabiliser tube D1 positive pole is connected, described nmos switch pipe bag
Include NMOS tube Q9, NMOS tube Q10, the NMOS tube Q9 drain electrode to be connected with comparator U1 reverse input ends-IN through resistance R7, pass through
The positive pole that resistance R7, resistance R6 and 3.3v limit volt voltage-stabiliser tube D1 is connected, NMOS tube Q9, NMOS tube Q10 source electrode and 3.3v
Limit volt voltage-stabiliser tube D1 positive pole is connected, NMOS tube Q9 grid be connected with NMOS tube Q10 grid and through resistance R3 and
3.3v limit volt voltage-stabiliser tubes D1 negative pole is connected.
7. a kind of utilization circuit energy according to claim 6 is based on the positive inverse transformation current in resistance property measurements of Fourier FFT
System, it is characterised in that：Described low-power consumption DC isolating converters unit includes transformer T1, electric capacity C3, C2, C4, diode
In D2, D5, PMOS Q11, the transformer T1 primary coils electric capacity C2 and diode D2, institute are serially connected between inductance L1 two ends
The one end for stating inductance L2 in transformer T1 primary coils connects NMOS tube Q10 drain electrode through diode D5, and the transformer T1 is primary
Grid of the inductance L2 other end through electric capacity C3 connection PMOSs Q11 in coil, PMOS Q11 source electrode connects NMOS tube Q10's
Drain electrode, the inductance L2 other end meets inductance L3 in NMOS tube Q10 drain electrode, transformer T1 secondary coils through electric capacity C3, resistance R8
Electric capacity C4 is serially connected between two ends.
8. a kind of utilization circuit energy according to claim 7 is based on the positive inverse transformation current in resistance property measurements of Fourier FFT
System, it is characterised in that：Rectifying and voltage-stabilizing filtering output unit include by NMOS tube Q3, NMOS tube Q4, PMOS Q5 and
The diode bridge rectifier circuit and connected voltage regulation filtering output circuit of PMOS Q6 compositions.
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| CN114137274B (en) * | 2020-09-03 | 2024-08-20 | 施耐德电器工业公司 | Current recording method, current recording device and current recording system |
| CN112285472A (en) * | 2020-10-28 | 2021-01-29 | 国网宁夏电力有限公司培训中心 | Improved zinc oxide lightning arrester with electrified self-checking capability |
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| CN101706527A (en) * | 2009-10-30 | 2010-05-12 | 西安交通大学 | Method for detecting arc faults based on time-frequency characteristics of high-frequency current component |
| CN202189087U (en) * | 2011-09-14 | 2012-04-11 | 北京国基科技股份有限公司 | Device for detecting direct current components in alternating current |
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| US8674544B2 (en) * | 2009-01-26 | 2014-03-18 | Geneva Cleantech, Inc. | Methods and apparatus for power factor correction and reduction of distortion in and noise in a power supply delivery network |
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| CN101706527A (en) * | 2009-10-30 | 2010-05-12 | 西安交通大学 | Method for detecting arc faults based on time-frequency characteristics of high-frequency current component |
| CN202189087U (en) * | 2011-09-14 | 2012-04-11 | 北京国基科技股份有限公司 | Device for detecting direct current components in alternating current |
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