CN109639279A - A kind of rail-to-rail peak holding circuit of pulse signal based on high-speed comparator peak-seeking - Google Patents
A kind of rail-to-rail peak holding circuit of pulse signal based on high-speed comparator peak-seeking Download PDFInfo
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- CN109639279A CN109639279A CN201811619703.7A CN201811619703A CN109639279A CN 109639279 A CN109639279 A CN 109639279A CN 201811619703 A CN201811619703 A CN 201811619703A CN 109639279 A CN109639279 A CN 109639279A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
- G01T1/00—Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
- G01T1/16—Measuring radiation intensity
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
- G01T7/00—Details of radiation-measuring instruments
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- Life Sciences & Earth Sciences (AREA)
- General Physics & Mathematics (AREA)
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Abstract
The present invention proposes a kind of rail-to-rail peak holding circuit of the pulse signal based on high-speed comparator peak-seeking, including sequentially connected high-speed comparator peak-seeking circuit, peak reset circuit and peak holding circuit；The high-speed comparator peak-seeking circuit, the rising edge or failing edge of the pulse signal for detecting input export corresponding control signal to control peak holding circuit；The peak holding circuit, for carrying out rail-to-rail signal tracing according to the control signal received or carrying out signal peak holding；The peak reset circuit, resets peak holding circuit for output reset signal.The present invention using single supply power, output and input it is rail-to-rail, quiescent dissipation be less than 30mW；Peak hold signal precision is high, and error is less than 1%；Lower Slew Rate is low during holding circuit peak holding, is less than 1mV/us；With runback bit function, external reset signal is not needed.
Description
Technical field
The invention belongs to nuclear radiation detections etc. to be related to the field of pulse amplitude measurement, a kind of in particular to arriving
The rail-to-rail peak holding circuit of pulse signal based on high-speed comparator peak-seeking.
Background technique
Peak holding circuit is the important electronics component part of nuclear radiation monitoring instrument.Nuclear radiation signal is by front end electricity
After sub- processing, the impulse amplitude Vo output of pulse signal proportional to sedimentary energy E, common impulse amplitude sampling side are formed
There are mainly two types of methods: high-speed ADC quick sampling algorithm peak-seeking and peak protect circuit and keep the then ADC sampling of pulse signal amplitude.By
It is relatively high in high-speed ADC quick sampling algorithm peak-seeking power consumption, it is generally adopted for Low Power Consumption Portable nuclear radiation monitoring instrument
Circuit, which is protected, with peak keeps pulse signal amplitude then ADC sampling plan.The performance of peak holding circuit will affect nuclear radiation monitoring
The sampling precision of spectrometer, dynamic range and pulsimeter digit rate, and circuit structure volume also will affect the realization of spectrometer miniaturization.Mesh
Leading peak protects circuit and mainly applies triode or diode unilateral conduction characteristic, realizes in conjunction with capacitor holding and amplifier feedback circuit
Pulse signal peak value, which captures, and peak holding is since triode or diode are poor in small signal input characteristics causes peak to be protected
Circuit minimum response voltage is higher, simultaneously because triode or diode cut-in voltage cause peak protect circuit can not achieve it is rail-to-rail
Output.
Summary of the invention
It is an object of the invention to solve peak in the prior art to protect circuit triode or diode in small signal input characteristics
It is poor, cause peak to protect the higher defect that can not achieve rail-to-rail output of circuit minimum response voltage, to achieve the above object, this
Invention provides a kind of rail-to-rail peak holding circuit of the pulse signal based on high-speed comparator peak-seeking, including sequentially connected high speed
Comparator peak-seeking circuit, peak reset circuit and peak holding circuit；
The high-speed comparator peak-seeking circuit, the rising edge or failing edge of the pulse signal for detecting input, to control
Peak holding circuit exports corresponding control signal；
The peak holding circuit, for carrying out rail-to-rail signal tracing or progress according to the control signal received
Signal peak is kept；
The peak reset circuit, resets peak holding circuit for output reset signal.
As a kind of improvement of described device, the high-speed comparator peak-seeking circuit includes: differential circuit, high-speed comparator
(A1) and analog switch (K1)；
Described differential circuit output termination high-speed comparator (A1) non-inverting input terminal；
High-speed comparator (A1) anti-phase input terminates bias level (VTH)；
The output of the high-speed comparator (A1) terminates analog switch (K1)；
The differential circuit exports corresponding differential signal for detecting the rising edge and failing edge of input pulse signal
When to high-speed comparator (A1)；
The high-speed comparator (A1) answers level signal for differential signal output phase based on the received, and control simulation is opened
Close (K1) open or close.
As a kind of improvement of described device, the differential circuit includes concatenated first capacitor (C1) and first resistor
(R1)；
When pulse signal is in propradation, the differential circuit detects the rising edge of pulse signal, exports just micro-
Sub-signal is to the high-speed comparator (A1)；
When pulse is in signal decline state, the differential circuit detects the failing edge of pulse signal, and output is born micro-
Sub-signal is to the high-speed comparator (A1).
As a kind of improvement of described device, the high-speed comparator (A1) is greater than when the positive differential signal received
When threshold value, high-level control signal, control analog switch (K1) conducting are exported；
The high-speed comparator (A1) is when the negative differential signal received is less than threshold value, output low level control letter
Number, it cuts off analog switch (K1).
As a kind of improvement of described device, the peak reset circuit includes concatenated monostable timing impulse circuit
(A2) and reset switch (K2)；
The monostable timing impulse circuit (A2), the failing edge of the control signal for being exported at high-speed comparator (A1)
Clocked flip reset signal；
The reset switch (K2) realizes peak holding circuit reset function for being connected under the control of reset signal.
As a kind of improvement of described device, the monostable timing impulse circuit (A2) is controlled by the time constant being arranged
The resetting time of the peak holding circuit.
As a kind of improvement of described device, the peak holding circuit includes that electricity is protected at operation amplifier follower (A3) and peak
Hold (C2)；
When the analog switch (K1) work is on state, and reset switch (K2) disconnects, the peak keep capacitance
(C2) it charges, the operation amplifier follower (A3) tracks rail-to-rail signal；
When the analog switch (K1) work is in open-circuit condition, and reset switch (K2) disconnects, the peak keep capacitance
(C2) it is in peak holding state, charge remains unchanged, and the operation amplifier follower (A3) keeps signal peak；
When the reset switch (K2) work is on state, the peak keep capacitance (C2) carries out charge discharging resisting, described
Peak holding circuit resets.
As a kind of improvement of described device, the peak keep capacitance (C2) leakage current in peak holding state is less than
1nA。
As a kind of improvement of described device, the operation amplifier follower (A3) is that the operation of low input bias current is put
Big device, for the peak keep capacitance (C2) in peak holding state, the slew rate of the operation amplifier follower (A3) is less than 1mV/
us.Present invention has an advantage that
1, rail-to-rail peak holding circuit of the invention is powered using single supply, outputs and inputs rail-to-rail, quiescent dissipation
Less than 30mW；
2, the rail-to-rail peak holding circuit peak hold signal of the pulse signal of the invention based on high-speed comparator peak-seeking
Precision is high, and error is less than 1%；
3, the rail-to-rail peak holding circuit rising edge slew rate of the pulse signal of the invention based on high-speed comparator peak-seeking
Height reaches 25V/us；
4, the bottom during the rail-to-rail peak holding circuit of the pulse signal of the invention based on high-speed comparator peak-seeking is kept
Rate is low, is less than 1mV/us；
5, the rail-to-rail peak holding circuit of the pulse signal of the invention based on high-speed comparator peak-seeking has Self-resetting function
Can, do not need external reset signal；
6, the rail-to-rail peak holding circuit structure of the pulse signal of the invention based on high-speed comparator peak-seeking is simple, uses
Peak-seeking circuit, holding circuit and the rail-to-rail follower building of input and output；
7, the rail-to-rail peak holding circuit functions of modules of the pulse signal of the invention based on high-speed comparator peak-seeking is independent,
It not will cause crosstalk when integrated with other circuit modules.
Detailed description of the invention
Fig. 1 is the schematic diagram of rail-to-rail peak holding circuit peak holding circuit of the invention；
Fig. 2 is the encapsulation schematic diagram of rail-to-rail peak holding circuit peak holding circuit of the invention；
Fig. 3 is the test result of rail-to-rail peak holding circuit peak holding circuit of the invention.
Attached drawing mark
C1, first capacitor C2, peak keep capacitance K1, analog switch
K2, reset switch R1, first resistor A1, high-speed comparator
A2, monostable timing impulse circuit A3, operation amplifier follower VTH, bias level
Specific embodiment
The present invention will be described in detail in the following with reference to the drawings and specific embodiments.
The present invention proposes a kind of rail-to-rail peak holding circuit of the pulse signal based on high-speed comparator peak-seeking, including high speed
Comparator peak-seeking circuit, peak reset circuit and peak holding circuit.As shown in Figure 1, input pulse amplitude range of the present invention is only
It is influenced by analog switch K1 and operation amplifier follower A3 input range；Output area is only exported model by operation amplifier follower A3
Influence is enclosed, therefore input of the invention can be realized by selection input and output rail-to-rail operational amplifier and analog switch K1
Export rail-to-rail requirement.
Wherein the high-speed comparator peak-seeking circuit is realized using differential circuit and high-speed comparator A1, and the high speed compares
Device A1 anti-phase input terminates bias level VTH, and homophase input terminates the differential output end of input signal, and differential circuit is by the first electricity
Hold C1 and first resistor R1 composition.
External pulse signal reaches high-speed comparator A1, the differential circuit detection signal rising edge and failing edge, and
High-speed comparator A1 exports corresponding control signal, and control analog switch K1 carries out signal tracing or signal is kept.
The rising edge slew rate is up to 25V/us.
The high-speed comparator A1 includes LM111, LM139, LM339, the comparators chip such as AD8561.
In pulse signal rising edge, the high-speed comparator A1 rising edge differential signal is greater than threshold value output signal, defeated
Signal control analog switch K1 conducting out, peak keep capacitance C2 charging tracking input signal to peak value of pulse；
It is less than threshold value output in pulse signal failing edge differential signal and keeps control signal cut analog switch K1, electricity is protected at peak
Hold C2 and keeps signal peak.
In embodiments of the present invention, when input pulse signal rising edge, differential circuit signal is positive, high-speed comparator A1
High level is exported, control analog switch K1 work is charged on state, input pulse signal to peak keep capacitance C2, peak holding
Circuit works in signal capture state；
When input pulse signal failing edge, differential circuit signal is negative, and high-speed comparator A1 exports low level, and control is sought
Peak breadboardin switch K1 work charge on open-circuit condition, peak keep capacitance C2 remains unchanged, and peak holding circuit works at peak
It is worth hold mode.
If analog switch K1 receives low level holding control signal, input pulse signal is subjected to peak holding,
The amplitude then exported does not change with input, and during peak holding, peak keep capacitance C2 leakage current is less than 1nA.
The analog switch K1 includes CD4051/52/53, the analog switch chips such as HI506/8, ADG732/721,
As shown in Figure 1, the peak holding circuit, including operation amplifier follower A3 and peak keep capacitance C2, the peak are protected
Charge only passes through analog switch K1 drain electrode on capacitor C2 and operation amplifier follower A3 input pin is released, due to protecting process at peak
In, analog switch K1 is in off state, and leakage current is pA magnitude, therefore the operational amplifier of low input bias current is selected to make
For the operation amplifier follower A3 of the information-preserving number output in peak；
Peak holding circuit output driving ability can be improved in the operation amplifier follower A3, reduces and presses pendulum during keeping
Rate, so that slew rate is less than 1mV/us during keeping.
Operation amplifier follower of the operational amplifier that the present invention selects input and output rail-to-rail as the information-preserving number output in peak
A3 realizes rail-to-rail high precision peak and keeps function, can satisfy the demand of rail-to-rail input-output peak holding, peak value
Keep signal accuracy high, error is less than 1%, and the bottom is less than 1mV/us during holding.
The peak reset circuit be include monostable timing impulse circuit A2, it is multiple that reset pulse control is protected at timing output peak
Bit switch K2 carries out charge discharging resisting reset to peak keep capacitance C2, which can be arranged adjustment peak by the time parameter of setting protects again
The position time.
The embodiment of the present invention, as peak reset circuit control unit, is realized certainly using monostable timing impulse circuit A2
Reset function.The monostable timing impulse circuit A2 is declined by high-speed comparator A1 output signal to be triggered, monostable timing arteries and veins
The reset signal of circuit A2 2.5us output 0.5us pulsewidth after failing edge triggering is rushed, reset signal control reset switch K2 is led
It is logical, charge discharging resisting function is kept, realizes and keeps resetting charge function.Reset circuit is protected due to peak and has runback bit function, it can
Reduce crosstalk of the digital circuit reset to front end signal.
Present invention relates solely to high-speed comparator all the way, rail-to-rail operational amplifier, all the way monostable circuit all the way, two-way mould
Quasi- switch and related resistance-capacitance network, by selecting low power consumption comparator and operational amplifier that can realize, module dissipation is less than 20mW.
The present invention is based on the rail-to-rail peak holding circuit of the pulse signal of high-speed comparator peak-seeking is low in energy consumption, it is suitable for small-sized
Change the instruments such as LET spectrometer, miniaturization particle components analyzer, X-ray, gamma-rays, proton, electronics and heavy ion detector.
As shown in Fig. 2, the encapsulation schematic diagram of peak holding circuit, module includes six pins: input, power supply, it is defeated
Out, information-preserving number and 2, peak NC pin.
As shown in figure 3, the test result of peak holding circuit.Wherein (1) is input pulse signal, and (2) are circuit output
Peak hold signal, in pulse signal rising edge, circuit work is protected in trapped state in peak, exports identical as input；Believe in pulse
Circuit work is protected in signal hold mode in number failing edge, peak, and output keeps signal pulse peak value；After peak holding 6us, circuit is real
Runback bit function is protected at existing peak, and it is adjustable that the time is protected at peak.
It can be realized peak-value-holding function with high accuracy by emulation and experimental verification, the present invention, be suitable for a variety of detections
Instrument.
It should be noted last that the above examples are only used to illustrate the technical scheme of the present invention and are not limiting.Although ginseng
It is described the invention in detail according to embodiment, those skilled in the art should understand that, to technical side of the invention
Case is modified or replaced equivalently, and without departure from the spirit and scope of technical solution of the present invention, should all be covered in the present invention
Scope of the claims in.
Claims (9)
1. a kind of rail-to-rail peak holding circuit of pulse signal based on high-speed comparator peak-seeking, which is characterized in that including successively
High-speed comparator peak-seeking circuit, peak reset circuit and the peak holding circuit of connection；
The high-speed comparator peak-seeking circuit, the rising edge or failing edge of the pulse signal for detecting input, to control peak value
Holding circuit exports corresponding control signal；
The peak holding circuit, for carrying out rail-to-rail signal tracing according to the control signal received or carrying out signal
Peak holding；
The peak reset circuit, resets peak holding circuit for output reset signal.
2. the rail-to-rail peak holding circuit of the pulse signal according to claim 1 based on high-speed comparator peak-seeking, special
Sign is that the high-speed comparator peak-seeking circuit includes: differential circuit, high-speed comparator (A1) and analog switch (K1)；
Described differential circuit output termination high-speed comparator (A1) non-inverting input terminal；
High-speed comparator (A1) anti-phase input terminates bias level (VTH)；
The output of the high-speed comparator (A1) terminates analog switch (K1)；
It is supreme to export corresponding differential signal for detecting the rising edge and failing edge of input pulse signal for the differential circuit
Fast comparator (A1)；
The high-speed comparator (A1) answers level signal for differential signal output phase based on the received, controls analog switch
(K1) open or close.
3. the rail-to-rail peak holding circuit of the pulse signal according to claim 2 based on high-speed comparator peak-seeking, special
Sign is that the differential circuit includes concatenated first capacitor (C1) and first resistor (R1)；
When pulse signal is in propradation, the differential circuit detects the rising edge of pulse signal, exports positive differential letter
Number to the high-speed comparator (A1)；
When pulse is in signal decline state, the differential circuit detects the failing edge of pulse signal, output negative differential letter
Number to the high-speed comparator (A1).
4. the rail-to-rail peak holding circuit of the pulse signal according to claim 3 based on high-speed comparator peak-seeking, special
Sign is that the high-speed comparator (A1) is when the positive differential signal received is greater than threshold value, output high level control letter
Number, control analog switch (K1) conducting；
The high-speed comparator (A1) exports low level control signal when the negative differential signal received is less than threshold value,
It cuts off analog switch (K1).
5. the rail-to-rail peak holding circuit of the pulse signal according to claim 4 based on high-speed comparator peak-seeking, special
Sign is that the peak reset circuit includes concatenated monostable timing impulse circuit (A2) and reset switch (K2)；
The monostable timing impulse circuit (A2), the failing edge timing of the control signal for being exported at high-speed comparator (A1)
Trigger reset signal；
The reset switch (K2) realizes peak holding circuit reset function for being connected under the control of reset signal.
6. the rail-to-rail peak holding circuit of the pulse signal according to claim 5 based on high-speed comparator peak-seeking, special
Sign is that the monostable timing impulse circuit (A2) controls the reset of the peak holding circuit according to the time constant of setting
Time.
7. the rail-to-rail peak holding circuit of the pulse signal according to claim 5 based on high-speed comparator peak-seeking, special
Sign is that the peak holding circuit includes operation amplifier follower (A3) and peak keep capacitance (C2)；
When the analog switch (K1) work is on state, and reset switch (K2) disconnects, the peak keep capacitance (C2) is filled
Electricity, the operation amplifier follower (A3) track rail-to-rail signal；
When the analog switch (K1) work is in open-circuit condition, and reset switch (K2) disconnects, at the peak keep capacitance (C2)
In peak holding state, charge is remained unchanged, and the operation amplifier follower (A3) keeps signal peak；
When the reset switch (K2) work is on state, the peak keep capacitance (C2) carries out charge discharging resisting, the peak value
Holding circuit resets.
8. the rail-to-rail peak holding circuit of the pulse signal according to claim 7 based on high-speed comparator peak-seeking, special
Sign is that the peak keep capacitance (C2) leakage current in peak holding state is less than 1nA.
9. the rail-to-rail peak holding circuit of the pulse signal according to claim 7 based on high-speed comparator peak-seeking, special
Sign is that the operation amplifier follower (A3) is the operational amplifier of low input bias current, and the peak keep capacitance (C2) exists
When peak holding state, the slew rate of the operation amplifier follower (A3) is less than 1mV/us.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811619703.7A CN109639279A (en) | 2018-12-28 | 2018-12-28 | A kind of rail-to-rail peak holding circuit of pulse signal based on high-speed comparator peak-seeking |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811619703.7A CN109639279A (en) | 2018-12-28 | 2018-12-28 | A kind of rail-to-rail peak holding circuit of pulse signal based on high-speed comparator peak-seeking |
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| CN109639279A true CN109639279A (en) | 2019-04-16 |
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| CN201811619703.7A Pending CN109639279A (en) | 2018-12-28 | 2018-12-28 | A kind of rail-to-rail peak holding circuit of pulse signal based on high-speed comparator peak-seeking |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110361590A (en) * | 2019-07-19 | 2019-10-22 | 广东浪潮大数据研究有限公司 | A kind of clock pulses wave arrangement for detecting |
| CN110673190A (en) * | 2019-09-06 | 2020-01-10 | 宁波大学 | Simple SiPM PET imaging system interface circuit |
| CN112379179A (en) * | 2020-09-25 | 2021-02-19 | 华东光电集成器件研究所 | Built-in pulse width adjustable pulse sampling hold circuit |
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| CN108809278A (en) * | 2018-08-27 | 2018-11-13 | 北方电子研究院安徽有限公司 | A kind of narrow pulse peak sampling hold circuit |
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| CN110361590A (en) * | 2019-07-19 | 2019-10-22 | 广东浪潮大数据研究有限公司 | A kind of clock pulses wave arrangement for detecting |
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