CN203910865U - 一种中小功率的led散热结构 - Google Patents
一种中小功率的led散热结构 Download PDFInfo
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- CN203910865U CN203910865U CN201420323376.1U CN201420323376U CN203910865U CN 203910865 U CN203910865 U CN 203910865U CN 201420323376 U CN201420323376 U CN 201420323376U CN 203910865 U CN203910865 U CN 203910865U
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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Abstract
本实用新型公开一种中小功率的LED散热结构,一种中小功率的LED散热结构,包括支架,支架上在位于金属的固晶位置和焊线的位置处设有热沉,热沉之上设有用于固定LED芯片位置的金属反射层,热沉被EMC隔层分隔为放置芯片的大焊盘和非放置芯片的小焊盘,LED芯片设于金属反射层上;EMC隔层贯穿支架而设置,金属反射层和热沉的结构相配合。EMC隔层为配合支架中间的塑胶料,用以将大焊盘和小焊盘隔开,具有与所述LED芯片底部相结合的固定部分。热沉位于金属的固晶位置和焊线的位置,具有与所述LED芯片底部对应的所述金属反射层相配合的下底面。
Description
技术领域
本实用新型涉及LED照明领域,具体涉及一种中小功率LED灯具的的散热结构。
背景技术
贴片LED光源在照明领域具有广泛的应用,考虑到生产工艺、成本、光学性能等技术要求,越来越多的设计采用贴片封装方式的LED光源,EMC封装结构是近年来为了降低成本和提高光通量,而采取的一种封装方式。
EMC封装同其他所有封装方式的LED光源同样,都需要解决光效、可靠性和成本三者的问题:光效是光通量与其消耗特定电能功率的比值;可靠性往往由光源散热性能决定;而成本主要体现在原材料选择方面,此三者发生相互制衡。在不同的需求下可能需要突出某方面的优化效果。增加镀银层的厚度(传统的镀银层厚度为60-100mil),可以有效的提高LED芯片的取光效率。比如,在成本和可靠性保持的情况下,实现高光通量,这样的议题在大量LED光源生产中显得尤其重要。作为商品,实现其成本下的性能控制,是一种必然的诉求。所以,如何在维持较好的成本和可靠性的同时,采用LED光源实现高光通量,是这类贴片LED封装结构设计的一个必然需求。
目前市场上EMC的封装方式都在大功率方面的散热有所欠缺,要么成本过高,要么散热性能不够好,本实用新型正是针对该问题进行探讨,提出一种较低的成本即可实现较好的散热性能的散热模块。
实用新型内容
因此,针对上述的问题,本实用新型提出一种中小功率的LED散热结构,采用减薄热沉厚度,提高支架散热能力,并通过增加U型金属反射层,提高出光效率,从而提高贴片LED的可靠性,进而达到降低成本的目的,并有效的提高芯片的使用电流,提高光通量。
为了解决上述技术问题,本实用新型所采用的技术方案是,一种中小功率的LED散热结构,包括支架,支架上在位于金属的固晶位置和焊线的位置处设有热沉,热沉之上设有用于固定LED芯片位置的金属反射层,热沉被EMC隔层分隔为放置芯片的大焊盘和非放置芯片的小焊盘,LED芯片设于金属反射层上;EMC隔层贯穿支架而设置,金属反射层和热沉的结构相配合。EMC隔层为配合支架中间的塑胶料,用以将大焊盘和小焊盘隔开,具有与所述LED芯片底部相结合的固定部分。热沉位于金属的固晶位置和焊线的位置,具有与所述LED芯片底部对应的所述金属反射层相配合的下底面。
进一步的,所述热沉设计为U型结构,金属反射层设于热沉之上,该金属反射层也设计为U型金属反射层。这样,热沉设计为U型结构以及金属反射层也设计为U型结构,使得支架上的两个侧面均设有金属反射层,充分将LED芯片的光反射出去,提高了整个封装的出光效率,比传统的PPA、PCT耐温更高。
进一步的,所述金属反射层的厚度范围为120㏕-150㏕,用于固定LED芯片位置的确定,具有与LED芯片底部相结合的固定部分。
进一步的,所述金属反射层选用镜面亮银制成的金属反射层,使LED芯片光线充分反射,提高了整个封装的光效。
进一步的,所述EMC隔层的高度为0.08-0.10MM。
进一步的,所述热沉为金属热沉,该金属热沉厚度为0.04-0.06MM。
另外,热沉的减薄,以及增加的U型金属反射层,有效的提高LED芯片的散热能力,进而提升了LED封装的可靠性。本实用新型的上述封装结构可以将LED的直通电流提高到90ma,从而达到了低成本,小尺寸,高光通量,高稳定性的LED封装效果。
本实用新型采用上述结构,具有如下优点:1、通过镜面金属反射层,将源自LED芯片光线充分反射,增大镀层厚度,提高了整个封装的取光效,增加了镀层的稳定性;2、U型的金属反射层能够更好的增加芯片侧面的取光效率。实现了高光通量、高可靠性LED封装的技术优化;3、U型的热沉结构将有效的增加了支架的稳定性。进一步提升可靠性;4、EMC塑料隔层将LED芯片出光效率;5、热沉的减薄可以提高LED芯片散热性,提高取光效率,进而达到降低成本的目的。
附图说明
图1为本实用新型的LED散热结构的俯视图;
图2为本实用新型的LED散热结构的剖视图;
图3为本实用新型的LED散热结构的支架示意图。
具体实施方式
现结合附图和具体实施方式对本实用新型进一步说明。
作为一个具体的实例,参加图1-图3,一种中小功率的LED散热结构,支架1,支架1上在位于金属的固晶位置和焊线的位置处设有热沉2,热沉2之上设有用于固定LED芯片4位置的金属反射层3,热沉2被EMC隔层5分隔为放置芯片的大焊盘22和非放置芯片的小焊盘21,LED芯片4设于金属反射层3上;EMC隔层5贯穿支架1而设置;金属反射层3与热沉2的结构相配合。EMC隔层5为配合支架1中间的塑胶料,用以将大焊盘22和小焊盘21隔开,具有与所述的大小焊盘结合的固定部分。
配合支架1中间的塑胶料为EMC隔层5,且EMC隔层5贯穿支架1内部,除了支架内部的热沉2和金属反射层3材料外,支架1内部所有材料均用EMC高耐温塑料。EMC隔层5的高度为0.08-0.10MM。
热沉2位于金属的固晶位置和焊线的位置,具有与所述LED芯片4底部对应的所述金属反射层3相配合的下底面。本实施例中,热沉2为金属热沉,该金属热沉厚度为0.04-0.06MM,位于金属的固晶位置和焊线的位置,具有与所述LED芯片4底部对应的所述金属反射层3相配合的下底面。所述热沉2设计为U型结构,金属反射层设于热沉之上,该金属反射层3也设计为U型金属反射层。这样,热沉设计为U型结构以及金属反射层也设计为U型结构,使得支架上的两个侧面均设有金属反射层,充分将LED芯片的光反射出去,提高了整个封装的出光效率,比传统的PPA、PCT耐温更高。同时,该热沉2的结构被分为用于放置LED芯片4的大焊盘22(固晶位置)和非放置芯片的小焊盘21(焊线位置),大焊盘22的面积大于小焊盘21面积的3倍。
其中,所述金属反射层3为镜面亮银,金属反射层3厚度为120-150㏕,用于固定LED芯片4位置的确定。
其中,LED芯片4的最大宽度为0.55mm。采用本实用新型的结构,可将LED的直通电流提高到90ma。
尽管结合优选实施方案具体展示和介绍了本实用新型,但所属领域的技术人员应该明白,在不脱离所附权利要求书所限定的本实用新型的精神和范围内,在形式上和细节上可以对本实用新型做出各种变化,均为本实用新型的保护范围。
Claims (6)
1.一种中小功率的LED散热结构,其特征在于:包括支架,支架上在位于金属的固晶位置和焊线的位置处设有热沉,热沉之上设有用于固定LED芯片位置的金属反射层,热沉被EMC隔层分隔为放置芯片的大焊盘和非放置芯片的小焊盘,LED芯片设于金属反射层上;
EMC隔层贯穿支架而设置,金属反射层和热沉的结构相配合。
2.根据权利要求1所述的LED散热结构,其特征在于:所述热沉设计为U型结构,金属反射层设于热沉之上,该金属反射层也设计为U型结构。
3.根据权利要求1所述的LED散热结构,其特征在于:所述金属反射层的厚度范围为120㏕-150㏕。
4.根据权利要求1或2或3所述的LED散热结构,其特征在于:所述金属反射层选用镜面亮银制成的金属反射层。
5.根据权利要求1所述的LED散热结构,其特征在于:所述EMC隔层的高度为0.08-0.10MM。
6.根据权利要求1所述的LED散热结构,其特征在于:所述热沉为金属热沉,该金属热沉厚度为0.04-0.06MM。
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