CN203787451U - 一种化合物半导体元件 - Google Patents

一种化合物半导体元件 Download PDF

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CN203787451U
CN203787451U CN201320511313.4U CN201320511313U CN203787451U CN 203787451 U CN203787451 U CN 203787451U CN 201320511313 U CN201320511313 U CN 201320511313U CN 203787451 U CN203787451 U CN 203787451U
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doped region
compound semiconductor
layer
semiconductor element
semiconductor layer
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敦俊儒
林诣超
江振福
郭政煌
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Epistar Corp
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Formosa Epitaxy Inc
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Abstract

本实用新型公开了一种化合物半导体元件，其包括具有第一掺杂区与第二掺杂区的基板，以及对应设置于基板上的半导体层，其中第一掺杂区与第二掺杂区分别有不同的掺杂情形。

Description

一种化合物半导体元件
技术领域
本实用新型涉及一种化合物半导体元件，尤其是指一种包括具有不同掺杂区域的基板，以及具有高低差结构半导体层的化合物半导体元件。 
背景技术
在成长氮化镓是发光二极管(LED)时，目前产业上主要使用的基板材料为蓝宝石(Al2O3)或碳化硅(SiC)，由于与用于成长的半导体材料如氮化镓(GaN)的晶体结构或晶格常数不同，因此在基板上成长氮化镓半导体层时，半导体层内会产生晶格缺陷(lattice defect)或断层(dislocation)。这种缺陷可能由半导体层底部延伸至发光二极管结构表面，而劣化发光二极管的发光层结构，减损发光二极管的发光效率。 
由于缺陷或断层的多寡直接影响发光二极管发光效率，因此减少缺陷或断层的密度即能提升发光二极管发光效率。现有技术减少缺陷或断层的密度的其中一种方法，为先在基板上形成氮化镓柱状结构，再于柱状结构上继续成长氮化镓半导体层，此时由于氮化镓半导体层是在氮化镓柱状结构上形成，所以大幅减少氮化镓半导体层内缺陷或断层的产生。在基板上形成氮化镓柱状结构的现有技术，美国专利号7521274揭示了一种成长奈米柱体的方法，如图1 A~图1C所示，其在一基板7上设置一图案化遮罩13，此遮罩13具有若干个孔洞而使基板7的部分表面暴露出，接着以非脉冲式成长半导体材料81至孔洞中，与遮罩13形成一平面，最后再以脉冲式接续成长半导体奈米柱82在半导体材料81上，以形成柱状结构。然而，在此案所揭示的方式中，在奈米等级的孔洞中成长半导体材料的难度很高，且通过脉冲式成长奈米柱不易逐片(wafer to wafer)控制均匀性，因此成品之间的差异相当大；另外，脉冲式成长奈米柱的机台维护周期较短，造成成本增加，而二次成长的制程本身也因有较多道工序，因此良率也较低。 
另外，在美国专利号7981714一案中，揭示了在硅基板上成长氮化镓奈米柱的步骤，其是先成长若干个奈米柱于基板上，并且垂直于硅基板；接着以非晶材料填满奈米柱之间的空隙，并且露出奈米柱的上部，该阶段的制程难度相当高，而最后则是以部分奈米柱的上部为晶种，成长氮化镓于非晶材料上。所以此案的方式也是一种二次成长，对良率也有不好的影响。 
因此，基于半导体元件中的柱状结构在制备时的技术门坎过高以及良率无法达到水平的问题，本实用新型提出一种半导体元件的制备方法及其结构，以克服上述技术问题。 
实用新型内容
为了达到上述目的，本实用新型提出一种化合物半导体元件，所述化合物半导体元件包括：基板，其具有第一掺杂区以及第二掺杂区；以及半导体层，设置于所述基板上；其中，所述第一掺杂区与所述第二掺杂区分别有不同掺杂情形。 
作为本实用新型的进一步改进，所述第一掺杂区或所述第二掺杂区为包含铝(Al)掺杂区、氮(N)掺杂区、镓(Ga)掺杂区、镁(Mg)掺杂区、锌(Zn)掺杂区、铟(In)掺杂区、铬(Cr)掺杂区、钛(Ti)掺杂区、硅(Si)掺杂区或氩(Ar)掺杂区。 
作为本实用新型的进一步改进，所述不同掺杂情形是指所述第一掺杂区与所述第二掺杂区的掺杂深度不同。 
作为本实用新型的进一步改进，所述半导体层材料为III-V族化合物。 
作为本实用新型的进一步改进，所述半导体层材料包括Alx1Gay1In(1-x1-y1)N, 1≧x1≧0, 1≧y1≧0。 
作为本实用新型的进一步改进，所述第一掺杂区与所述第二掺杂区可为周期性排列或不规则排列。 
作为本实用新型的进一步改进，所述化合物半导体元件还包括缓冲层位于所述基板与所述半导体层之间。 
作为本实用新型的进一步改进，所述半导体层分别在对应所述第一掺杂区与所述第二掺杂区的位置有不同高度的高低差结构。 
作为本实用新型的进一步改进，所述高低差结构外形可以为线状、柱状、沟槽状或阶梯状。 
作为本实用新型的进一步改进，所述第一掺杂区与所述第二掺杂区上的宽度范围为5nm至50μm。 
作为本实用新型的进一步改进，所述第一掺杂区与所述第二掺杂区上的宽度范围不同。 
作为本实用新型的进一步改进，所述第一掺杂区的宽度范围为100nm至100μm，所述第二掺杂区的宽度范围为5nm至100μm。 
作为本实用新型的进一步改进，所述化合物半导体元件还包括磊晶层，所述磊晶层包括N型氮化物层、主动层及P型氮化物层，且所述磊晶层形成于所述半导体层的柱状的所述高低差结构的周围。 
作为本实用新型的进一步改进，所述化合物半导体元件还包括延伸层，所述延伸层覆盖所述半导体层。 
作为本实用新型的进一步改进，所述延伸层填满所述半导体层。 
作为本实用新型的进一步改进，所述延伸层与所述半导体层之间形成有至少一空间。 
作为本实用新型的进一步改进，所述空间的高度不大于10um。 
作为本实用新型的进一步改进，所述延伸层于所述半导体层的高度较高的部位上成长接合形成，并具有一连续表面。 
作为本实用新型的进一步改进，所述化合物半导体元件还包括二个以上的延伸体位于所述半导体层的高度较高的部位上，所述延伸层于所述延伸体上成长接合形成，并具有一连续表面。 
作为本实用新型的进一步改进，所述空间有三个以上，且所述空间的相邻间隔可具有相同距离间隔或不同距离间隔。 
作为本实用新型的进一步改进，所述化合物半导体元件还包括N型半导体层、主动层与P型半导体层形成于所述延伸层上。 
本实用新型的另一目的在于，提出一种化合物半导体元件，所述化合物半导体元件包括：基板；缓冲层，其具有第一掺杂区与第二掺杂区；以及半导体层，设置于所述缓冲层上；其中，所述第一掺杂区与所述第二掺杂区分别有不同掺杂情形。 
本实用新型的又一目的在于，提出一种化合物半导体元件，其特征在于，所述化合物半导体元件包括：基板；以及缓冲层，设置于所述基板上，具有第一掺杂区，且所述第一掺杂区表面为粗糙面。 
本实用新型的有益效果在于，提供一种化合物半导体组件，其包括具有掺杂区的基板或缓冲层，之后只要经过一次成长即可获得具有奈米级或微米级高低差的半导体结构，以克服晶格差异造成的差排等缺陷问题，并且可以架构出柱状形式的磊晶层，同时制作方式较为简单，有助于维持良率。 
附图说明
图1 A~C为现有技术的奈米柱制备流程图； 
图2 A~D为本实用新型的一较佳实施例的掺杂制程与半导体层成长的流程与结构变化示意图；
图2 E~F为本实用新型的一较佳实施例的结构示意图；
图3为本实用新型的一较佳实施例的制作流程与结构变化示意图；
图4为本实用新型的一较佳实施例的另一制作流程与结构变化示意图；
图5为本实用新型的一较佳实施例的掺杂离子种类或数量不同的结构示意图；
图6为本实用新型的一较佳实施例的一发光二极管结构示意图；
图7 A~B为本实用新型的另一较佳实施例的结构示意图；以及
图8 A~B为本实用新型的另一较佳实施例的结构示意图。
具体实施方式
以下将结合附图所示的具体实施方式对本实用新型进行详细描述。但这些实施方式并不限制本实用新型，本领域的普通技术人员根据这些实施方式所做出的结构上的变换均包含在本实用新型的保护范围内。 
首先，请参照图2 A~D，这些图是本实用新型制备高低差半导体结构时，各个步骤的剖面结构变化，包括以下步骤： 
步骤S1：如图2A至图2B所示，掺杂一基板，使该基板具有第一掺杂区以及第二掺杂区；其中该第一掺杂区和第二掺杂区的掺杂情形不同，例如可具有不同的掺杂元素、掺杂深度或掺杂浓度；其中该基板材料可以是蓝宝石、碳化硅、硅、砷化镓、氧化镓、氮化镓、铝酸锂、镓酸锂或氮化铝；以及 
步骤S2：如图2C至图2D所示，成长一半导体层于该基板上，该半导体层在该第一掺杂区与该第二掺杂区的高度不同，而使该半导体层具有至少一高低差结构。
本实用新型可以离子注入或离子扩散的掺杂方式进行，以离子注入为例，在步骤S1中，首先如图2A所示，本实施例在蓝宝石基板1上形成遮罩13来做屏障、分隔，而后进行离子注入得到如图2B所示的第一掺杂区11以及第二掺杂区12；其中第一掺杂区11与第二掺杂区12可为周期性排列或为不规则排列；其中该第一掺杂区11因未受遮罩13覆盖，所以在离子注入制程时较该第二掺杂区12掺杂了更多的杂质；其中在本实施例该掺杂元素组成可包括选自铝(Al)、氮(N)、镓(Ga)、镁(Mg)、锌(Zn)、铟(In)、铬(Cr)、钛(Ti)、硅(Si)、氩(Ar)等元素的任一种或任意组合，且该第一掺杂区11的掺杂浓度范围为1×1014至1×1021 (1/cm3)，而该第二掺杂区12的掺杂浓度不小于零，并小于该第一掺杂区11的掺杂浓度。本实用新型的另一实施例则是该第一掺杂区11的掺杂元素组成与该第二掺杂区12的掺杂元素组成不同。另外，该步骤也可以采用相似的离子注入或离子扩散方法改于基板上的缓冲层或任意半导体层进行掺杂，并无限定。 
接着在步骤S2中，如图2C及图2D所示，先移除掺杂后的基板1上的遮罩13，然后在基板1上成长III-V族化合物如Alx1Gay1In(1-x1-y1)N, 1≧x1≧0, 1≧y1≧0的半导体层2，且半导体层2的晶体结构或晶格常数与基板1未掺杂部分的晶体结构或晶格常数有差异。由于基板1在第一掺杂区11与第二掺杂区12有不同掺杂浓度或不同掺杂元素组成的情形，使得半导体层2在第一掺杂区11上的成长速率与在第二掺杂区12上不同，所以在一定成长时间下，半导体层2在第一掺杂区11上与在第二掺杂区12上的成长高度会有差异。如图2D所示，本实施例中的半导体层2在第一掺杂区11上的成长速率快于在第二掺杂区12，所以半导体层2在第一掺杂区11上的成长高度比在第二掺杂区12高，而使半导体层2具有至少一高低差结构；其中该高低差结构可为周期性排列或为不规则排列。 
与上述实施例相较，本实用新型的另一实施例相反地是使半导体层2在基板1的第一掺杂区11上的成长高度比在第二掺杂区12低，当然也可以使半导体层2在缓冲层或其他半导体层的第一掺杂区11上的成长高度比在第二掺杂区12低，如图2E与图2F所示。该实施例借助离子注入制程、在第一掺杂区11注入不利于成长半导体材料的杂质，或破坏第一掺杂区11的晶体结构或晶格常数，以降低半导体层2在第一掺杂区11的成长速率，例如在图2E所示的成长状况即是半导体层2在第一掺杂区11的成长速率较第二掺杂区12低，而在图2F所示的成长状况即是半导体层2在第一掺杂区11的成长速率为零。此时，半导体层2在第二掺杂区12的成长高度比在第一掺杂区11高，而形成与图2D所示相反的高低差结构。另外，本实用新型的另一实施例是用相似的离子注入或离子扩散方法改于缓冲层或任意半导体层进行掺杂，在缓冲层或任意半导体层表面形成第一掺杂区11，并破坏第一掺杂区11表面晶体结构，使半导体成长制程中第一掺杂区11表面形成粗糙面，在光学效果上有增加散射效果，而使得本实施例在后续制成发光二极管时，发光二极管的出光效率可以提升。 
本实用新型的一实施例如图3所示，与上述各实施例相比较，本实施例是先对基板1以离子注入方式进行掺杂而区分出第一掺杂区11以及第二掺杂区12后，再于基板1上形成缓冲层14，缓冲层的材料可包括选自Alx2Gay2In(1-x2-y2)N, 1≧x2≧0, 1≧y2≧0，或ZnO、MgO、SiC等的其中任一种。其中，该缓冲层14覆盖第一掺杂区11以及第二掺杂区12。然后在缓冲层14上成长半导体层2时，半导体层2仍可受第一掺杂区11以及第二掺杂区12的差异影响，而在对应第一掺杂区11以及第二掺杂区12的位置产生高低差结构。 
本实用新型的另一实施例如图4所示，与上述各实施例相比较，本实施例中遮罩13的至少两个区域具有不同厚度，使得基板1在进行离子注入或扩散的掺杂制程时，在基板1上会根据遮罩13的不同厚度区域有不同的掺杂情形，而在基板1上对应形成第一掺杂区11与第二掺杂区12，其中第一掺杂区11与第二掺杂区12的掺杂深度与浓度不同。如图4所示，基板1在对应遮罩13厚度较薄的区域形成第一掺杂区11，在对应遮罩13厚度较厚的区域形成第二掺杂区12，且在第一掺杂区11的掺杂深度比在第二掺杂区12深，浓度也较第二掺杂区高，当后续在该第一掺杂区11及第二掺杂区12上直接成长或间接在缓冲层14上成长半导体层2时，因为在对应第一掺杂区11的半导体成长速率比在第二掺杂区12慢，所以半导体层2在对应第一掺杂区11位置的高度比在对应第二掺杂区12位置的高度矮，而在半导体层2形成至少一高低差结构。 
本实用新型的另一实施例如图5所示，与上述各实施例相比较，本实施例是将基板1上的部分离子掺杂区以多重注入方式进行额外的注入程序，使得第一掺杂区11的注入离子数量不同于第二掺杂区12。另外，也可在各次的离子注入中植入不同的离子，使得第一掺杂区11以及第二掺杂区12具有不同的注入离子或掺杂元素组成，让成长于其上的半导体层2因而产生高低差结构。 
另外，本实用新型中上述各实施例的半导体层2的高低差结构外形可以是线状、柱状、沟槽状、阶梯状或是任何有起伏外形的凹/凸状结构。 
而利用上述的制程方法，可形成本实用新型的一较佳应用实施例结构，如图6所示，其中半导体层2在第二掺杂区12形成一柱状结构21后，在该柱状结构21周围形成功能层或磊晶层3，该磊晶层3可为包括如N型氮化物层31、主动层或多重量子井(MQW)层32、P型氮化物层33以及透明导电层34等依序堆栈而成。 
在该实施例中，第二掺杂区12的宽度范围为5nm至100μm，而相邻的第一掺杂区11的宽度范围则为100nm至100μm，从而使半导体层2形成一柱体较细、柱体间距较宽的结构，以适合上述磊晶层3包覆柱状结构21。 
本实用新型的另一较佳应用实施例，是在形成具有高低差结构的半导体层2后，继续成长形成延伸层4，该延伸层4的材料为III-V族化合物半导体如Alx3Gay3In(1-x3-y3)N, 1≧x3≧0, 1≧y3≧0，并可与半导体层2的材料相同或相异。如图7A所示，延伸层4覆盖并填满具有高低差结构的半导体层2，其中在基板1的第一掺杂区11与第二掺杂区12的宽度范围为5nm至50μm。另外，本实用新型还有一较佳应用实施例如图7B所示，相较于上述图7A所示的实施例，本实施中的延伸层4在第一掺杂区11上并未完全填满，而形成至少一空间5，其中该空间5内的高度不大于10μm，使得该实施例在制成发光二极管时可提升发光二极管的出光效率。 
如图8A所示，本实用新型的又一较佳应用实施例是在掺杂后的基板1上一次性成长形成具有高低差结构的半导体层2后，进一步在半导体层2的高度较高的部位（如柱状结构或凸起结构）上形成二个以上的延伸体6，其中延伸体6为Alx4Gay4In(1-x4-y4)N, 1≧x4≧0, 1≧y4≧0的晶种，且可与半导体层2的材料相同或相异；然后继续进行半导体成长制程，使半导体从延伸体6至少部分横向成长并接合形成覆盖半导体层2的延伸层4，如图8B所示，其中该延伸层4为Alx4Gay4In(1-x4-y4)N, 1≧x4≧0, 1≧y4≧0并具至少一连续表面，该表面可为一平面或为具起伏的面，另外该延伸层4可为单层或多层结构；其中半导体层2在延伸层4与基板1之间具有至少一空间5，而当该空间5有三个以上时，空间5之相邻间隔可具有相同距离间隔或不同距离间隔。 
在上述本实用新型各应用实施例的延伸层4上继续成长功能层或磊晶层结构，可形成本实用新型的化合物半导体元件，如发光二极管、光侦测器、太阳能电池或功率晶体管等等。以发光二极管为例，其是在延伸层4上陆续形成一N型或P型半导体层、主动层与P型或N型半导体层等磊晶层结构而形成本实用新型的发光二极管，并具有高发光效率、制程简化、良率及元件寿命可大幅提升的优点。本实用新型所揭示的方法不但快速简易，同时也降低了二次成长时所会面临的难度和缺陷。在具有实际功效下，提供了一极具经济和实用价值的半导体元件及其制备方法。 
应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施方式中的技术方案也可以经适当组合，形成本领域技术人员可以理解的其他实施方式。 
上文所列出的一系列的详细说明仅仅是针对本实用新型的可行性实施方式的具体说明，它们并非用以限制本实用新型的保护范围，凡未脱离本实用新型技艺精神所作的等效实施方式或变更均应包含在本实用新型的保护范围之内。 

Claims (23)

1.一种化合物半导体元件，其特征在于，所述化合物半导体元件包括：
基板，其具有第一掺杂区以及第二掺杂区；以及
半导体层，设置于所述基板上；
其中，所述第一掺杂区与所述第二掺杂区分别有不同掺杂情形。
2.根据权利要求1所述的化合物半导体元件，其特征在于，所述第一掺杂区或所述第二掺杂区为包含铝(Al)掺杂区、氮(N)掺杂区、镓(Ga)掺杂区、镁(Mg)掺杂区、锌(Zn)掺杂区、铟(In)掺杂区、铬(Cr)掺杂区、钛(Ti)掺杂区、硅(Si)掺杂区或氩(Ar)掺杂区。
3.根据权利要求1所述的化合物半导体元件，其特征在于，所述不同掺杂情形是指所述第一掺杂区与所述第二掺杂区的掺杂深度不同。
4.根据权利要求1所述的化合物半导体元件，其特征在于，所述半导体层为III-V族化合物。
5.根据权利要求1所述的化合物半导体元件，其特征在于，所述半导体层包括Alx1Gay1In(1-x1-y1)N, 1≧x1≧0, 1≧y1≧0。
6.根据权利要求1所述的化合物半导体元件，其特征在于，所述第一掺杂区与所述第二掺杂区可为周期性排列或不规则排列。
7.根据权利要求1所述的化合物半导体元件，其特征在于，所述化合物半导体元件还包括缓冲层位于所述基板与所述半导体层之间。
8.根据权利要求1所述的化合物半导体元件，其特征在于，所述半导体层分别在对应所述第一掺杂区与所述第二掺杂区的位置有不同高度的高低差结构。
9.根据权利要求8所述的化合物半导体元件，其特征在于，所述高低差结构外形可以为线状、柱状、沟槽状或阶梯状。
10.根据权利要求1所述的化合物半导体元件，其特征在于，所述第一掺杂区与所述第二掺杂区上的宽度范围为5nm至50μm。
11.根据权利要求1所述的化合物半导体元件，其特征在于，所述第一掺杂区与所述第二掺杂区上的宽度范围不同。
12.根据权利要求11所述的化合物半导体元件，其特征在于，所述第一掺杂区的宽度范围为100nm至100μm，所述第二掺杂区的宽度范围为5nm至100μm。
13.根据权利要求9所述的化合物半导体元件，其特征在于，所述化合物半导体元件还包括磊晶层，所述磊晶层包括N型氮化物层、主动层及P型氮化物层，且所述磊晶层形成于所述半导体层的柱状的所述高低差结构的周围。
14.根据权利要求1所述的化合物半导体元件，其特征在于，所述化合物半导体元件还包括延伸层，所述延伸层覆盖所述半导体层。
15.根据权利要求14所述的化合物半导体元件，其特征在于，所述延伸层填满所述半导体层。
16.根据权利要求14所述的化合物半导体元件，其特征在于，所述延伸层与所述半导体层之间形成有至少一空间。
17.根据权利要求16所述的化合物半导体元件，其特征在于，所述空间的高度不大于10um。
18.根据权利要求14所述的化合物半导体元件，其特征在于，所述延伸层于所述半导体层的高度较高的部位上成长接合形成，并具有一连续表面。
19.根据权利要求14所述的化合物半导体元件，其特征在于，所述化合物半导体元件还包括二个以上的延伸体位于所述半导体层的高度较高的部位上，所述延伸层于所述延伸体上成长接合形成，并具有一连续表面。
20.根据权利要求16所述的化合物半导体元件，其特征在于，所述空间有三个以上，且所述空间的相邻间隔可具有相同距离间隔或不同距离间隔。
21.根据权利要求14所述的化合物半导体元件，其特征在于，所述化合物半导体元件还包括N型半导体层、主动层与P型半导体层形成于所述延伸层上。
22.一种化合物半导体元件，其特征在于，所述化合物半导体元件包括：
基板；
缓冲层，其具有第一掺杂区与第二掺杂区；以及
半导体层，设置于所述缓冲层上；
其中，所述第一掺杂区与所述第二掺杂区分别有不同掺杂情形。
23.一种化合物半导体元件，其特征在于，所述化合物半导体元件包括：
基板；以及
缓冲层，设置于所述基板上，具有第一掺杂区，且所述第一掺杂区表面为粗糙面。
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