CN203519782U - Electronic device - Google Patents
Electronic device Download PDFInfo
- Publication number
- CN203519782U CN203519782U CN201320639223.3U CN201320639223U CN203519782U CN 203519782 U CN203519782 U CN 203519782U CN 201320639223 U CN201320639223 U CN 201320639223U CN 203519782 U CN203519782 U CN 203519782U
- Authority
- CN
- China
- Prior art keywords
- test
- probe
- circuit board
- printed circuit
- pcb
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000012360 testing method Methods 0.000 claims abstract description 139
- 239000000523 sample Substances 0.000 claims abstract description 108
- 238000000034 method Methods 0.000 claims description 29
- 239000010410 layer Substances 0.000 description 17
- 230000000694 effects Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
Images
Landscapes
- Tests Of Electronic Circuits (AREA)
Abstract
The utility model discloses an electronic device. The electronic device includes the following components of: a test probe which comprises at least one test probing pin which is corresponding to at least one test hole on a printed circuit board to be tested, wherein the printed circuit board to be tested at least comprises three layers of circuit layers; a test probe interface which is connected with the test probe; a processing chip which is connected with the test probe through the test probe interface and is used for recording results of tests performed on the at least one test hole by the at least probing pin, and determining that the alignment degree of the printed circuit board is larger than a first alignment degree value of a first test hole in the at least test hole when a test result corresponding to a first probing pin in the at least one probing pin is switched on, and determining that the alignment degree of the printed circuit board is smaller than the first alignment degree value when a test result corresponding to the first probing pin is switched off, wherein the first probing pin is corresponding to the first test hole.
Description
Technical field
The utility model relates to art of printed circuit boards, relates in particular to a kind of electronic equipment.
Background technology
Along with scientific and technical development, electronic technology has also obtained development at full speed, the kind of electronic product is also more and more, and people are more and more higher to the requirement of electronic product, also more and more higher to the requirement of the printed circuit board (PCB) as electronic product important component part.
The Aligning degree test of printed circuit board (PCB) is a very important test, it is for the Aligning degree situation of the multilayer circuit interlayer of testing printed circuit board, if Aligning degree situation is poor, easily cause printed circuit board (PCB) short circuit, cause the printed circuit board (PCB) of producing cannot complete its corresponding electric function.
At present, to the Aligning degree test of printed circuit board (PCB), be mainly by by the test probe with a pilot pin and a plurality of probes, insert in resolution chart corresponding on printed circuit board (PCB) to be measured, in the resolution chart of printed circuit board (PCB) to be measured, there are a plurality of instrument connections corresponding with a plurality of probes of test probe, each probe is connected with a light-emitting component simultaneously, if this light-emitting component is luminous, show this instrument connection short circuit, the Aligning degree of this printed circuit board (PCB) to be measured is greater than the numerical value that this instrument connection is corresponding.Tester, by the bright light situation of light-emitting component on test probe, judges the Aligning degree of printed circuit board (PCB) to be measured, the line item of going forward side by side.
Along with people are more and more higher to the requirement of printed circuit board (PCB), the number of plies of printed circuit board (PCB) is also more and more higher, take common multilayer board as example, as designed 4 groups of Aligning degree test modules at edges of boards, 4 groups of data of this printed circuit board (PCB) to be measured need tester to carry out hand-kept, each data needs tester to determine according to the bright light situation of a plurality of light-emitting components on test probe simultaneously, very easily causing tester to judge makes mistakes, in addition, because Aligning degree data need to be carried out manual record by tester, the record efficiency of Aligning degree data is lower.
Therefore, Aligning degree test mode of the prior art exists and easily causes tester to judge to make mistakes, and the lower technical matters of the record efficiency of Aligning degree data.
Utility model content
The utility model embodiment is by providing a kind of electronic equipment, solved Aligning degree test mode of the prior art and existed and easily cause tester to judge to make mistakes, and Aligning degree data is not easy to collect, the technical matters that efficiency is lower.
The utility model embodiment provides a kind of electronic equipment, described electronic equipment comprises: test probe, comprise at least one test probe, described at least one test probe is corresponding with at least one instrument connection on printed circuit board (PCB) to be measured, described printed circuit board (PCB) to be measured at least comprises three layers of circuit layer, and in described at least one instrument connection, each instrument connection is corresponding to an Aligning degree value, test probe interface, is connected with described test probe, process chip, by described test probe interface, be connected with described test probe, for recording the test result of described at least one probe to described at least one instrument connection, and the test result that the first probe is corresponding in described at least one probe is while being conducting, the Aligning degree of determining described printed circuit board (PCB) is greater than the first Aligning degree value corresponding to the first instrument connection in described at least one instrument connection, when test result corresponding to described the first probe is disconnection, the Aligning degree of determining described printed circuit board (PCB) is less than described the first Aligning degree value, wherein, described the first probe is corresponding with described the first instrument connection.
Alternatively, described test probe also comprises a grounded probe, and described grounded probe is corresponding with the ground hole on described printed circuit board (PCB).
Alternatively, described test probe also comprises a pilot pin, and described pilot pin is corresponding with the pilot hole on described printed circuit board (PCB) to be measured.
Alternatively, described electronic equipment also comprises a display chip, and described display chip is connected with described process chip, and described display chip is for being presented at by described test result the display device being connected with described electronic equipment.
Alternatively, described electronic equipment also comprises a memory bank, and described memory bank is connected with described process chip, and described memory bank is used for storing described test result.
The one or more technical schemes that provide in the utility model embodiment, at least have following technique effect or advantage:
Owing to having adopted the process chip being connected with test probe by test probe interface to record at least one probe on test probe test result at least one instrument connection on printed circuit board (PCB) to be measured, and according to test result, determine the technical scheme of the Aligning degree of printed circuit board (PCB) to be measured, do not need tester to determine Aligning degree data according to the bright light situation of light-emitting component on test probe, Aligning degree data need to not carried out manual record by tester yet simultaneously, so having solved Aligning degree test mode of the prior art exists and easily causes tester to judge to make mistakes, and the lower technical matters of the record efficiency of Aligning degree data, realized the accuracy of the Aligning degree test that improves printed circuit board (PCB) to be measured, and the technique effect that has improved the record efficiency of Aligning degree, and then realized the time of saving testing printed circuit board accuracy, improve the technique effect of the production efficiency of printed circuit board (PCB).
Accompanying drawing explanation
The functional block diagram of the electronic equipment that Fig. 1 provides for the utility model embodiment;
The tangent plane schematic diagram of the test probe that Fig. 2 provides for the utility model embodiment;
The schematic diagram of the resolution chart on the printed circuit board (PCB) to be measured that Fig. 3 provides for the utility model embodiment.
Embodiment
The utility model embodiment is by providing a kind of electronic equipment, and solved Aligning degree test mode of the prior art and existed and easily cause tester to judge to make mistakes, and the lower technical matters of the record efficiency of Aligning degree data.
Technical scheme in the utility model embodiment is for solving the problems of the technologies described above, and general thought is as follows:
The utility model embodiment provides a kind of electronic equipment, this electronic equipment comprises: test probe, comprise at least one test probe, at least one test probe is corresponding with at least one instrument connection on printed circuit board (PCB) to be measured, and printed circuit board (PCB) to be measured at least comprises three layers of circuit layer, test probe interface, is connected with test probe, process chip, by test probe interface, be connected with test probe, for recording the test result of described at least one probe to described at least one instrument connection, and the test result that the first probe is corresponding in described at least one probe is while being conducting, the Aligning degree of determining described printed circuit board (PCB) is greater than the first Aligning degree value corresponding to the first instrument connection in described at least one instrument connection, when test result corresponding to described the first probe is disconnection, the Aligning degree of determining described printed circuit board (PCB) is less than described the first Aligning degree value, wherein, described the first probe is corresponding with described the first instrument connection.
By above-mentioned part, can find out, owing to having adopted the process chip being connected with test probe by test probe interface to record at least one probe on test probe test result at least one instrument connection on printed circuit board (PCB) to be measured, and according to test result, determine the technical scheme of the Aligning degree of printed circuit board (PCB) to be measured, do not need tester to determine Aligning degree data according to the bright light situation of light-emitting component on test probe, Aligning degree data need to not carried out manual record by tester yet simultaneously, so having solved Aligning degree test mode of the prior art exists and easily causes tester to judge to make mistakes, and the lower technical matters of the record efficiency of Aligning degree data, realized the accuracy of the Aligning degree test that improves printed circuit board (PCB) to be measured, and the technique effect that has improved the record efficiency of Aligning degree, and then realized the time of saving testing printed circuit board accuracy, improve the technique effect of the production efficiency of printed circuit board (PCB).
In order better to understand technique scheme, below in conjunction with Figure of description and concrete embodiment, technique scheme is described in detail.
Please refer to Fig. 1, Fig. 1 is the functional block diagram of the electronic equipment that provides of the utility model embodiment, as shown in Figure 1, this electronic equipment comprises: test probe 101, comprise at least one test probe, at least one test probe is corresponding with at least one instrument connection on printed circuit board (PCB) to be measured, and printed circuit board (PCB) to be measured at least comprises three layers of circuit layer;
According to test result, determine the Aligning degree of printed circuit board (PCB) to be measured, specifically, when the test result that the first probe is corresponding at least one probe is conducting, the Aligning degree of determining printed circuit board (PCB) is greater than the first Aligning degree value corresponding to the first instrument connection at least one instrument connection, when test result corresponding to the first probe is disconnection, the Aligning degree of determining printed circuit board (PCB) is less than the first Aligning degree value, and wherein, the first probe is corresponding with the first instrument connection.
Certainly, in actual applications, this electronic equipment also can comprise casing, circuit board etc., at this, has just repeated no more.
Please refer to Fig. 2, Fig. 2 is the tangent plane schematic diagram of the test probe that provides of the utility model embodiment, and as shown in Figure 2, this test probe 101 comprises: at least one test probe 201, and in the present embodiment, the quantity of this test probe of take is described as example as 3; A grounded probe 202, is connected with each probe at least one test probe 201; At least one pilot pin 203, in the present embodiment, the quantity of this pilot pin of take is described as example as two.
Certainly, in actual applications, please continue to refer to Fig. 2, this test probe 101 also comprises a data bus connection, this data bus connection comprises the data line being connected with test probe 201, for 102 transmission of the test results probe interface of test probe 201 have been provided to chip 103.
Please refer to Fig. 3, Fig. 3 is the schematic diagram of the resolution chart on the printed circuit board (PCB) to be measured that provides of the utility model embodiment, as shown in Figure 3, resolution chart comprises the instrument connection corresponding with at least one test probe 201 301, in the present embodiment, take instrument connection as 3 be example, and ground hole 302, and the pilot hole 303 corresponding with pilot pin, it should be noted that, pilot hole 303 is herein not identical with pilot hole with the boring pilot hole of printed circuit board (PCB) and profile, and pilot hole is herein Aligning degree test pilot hole.
In specific implementation process, the position of resolution chart can be arranged on the edges of boards of printed circuit board (PCB) to be measured, and the quantity of resolution chart can be set to 1, also can arrange a plurality ofly, at this, does not limit.
In the present embodiment, setting printed circuit board (PCB) to be measured is three layer printed circuit boards, resolution chart shown in Fig. 3 is the resolution chart of this inner layer of printed-circuit board circuit to be measured, the size of simultaneously setting these three instrument connections 301 is 0.4mm, the anti-pad size that these three instrument connections are corresponding is followed successively by 0.5mm, 0.6mm and 0.7mm.
After in three test probes on test probe 101 201 are inserted to three instrument connections 301, if the test result of three test probes is not conducting, show that the Aligning degree of internal layer in this three layer printed circuit board is less than 0.05mm; If the test result of three test probes is conducting, show that the Aligning degree of internal layer in this three layer printed circuit board is greater than 0.15mm; If the test result of the test probe that the instrument connection of 0.5mm is corresponding is conducting, the test result of the test probe that the instrument connection of 0.6mm is corresponding is not conducting, show that the Aligning degree of internal layer in this three layer printed circuit board is for being greater than 0.05mm and being less than 0.1mm, the test result of the test probe that certainly, now the instrument connection of 0.7mm is corresponding must be also not conducting; If the test result of the test probe that the instrument connection of 0.6mm is corresponding is conducting, the test result of the test probe that the instrument connection of 0.7mm is corresponding is not conducting, show that the Aligning degree of internal layer in this three layer printed circuit board is for being greater than 0.1mm and being less than 0.15mm, the test result of the test probe that certainly, now the instrument connection of 0.5mm is corresponding must be also conducting.
In actual applications, even if the number of plies of printed circuit board (PCB) to be measured is more than 3 layers, its principle is consistent with said process, at this, has just repeated no more.
The process chip 103 of electronic equipment, by after the test result record of test probe 301, can be analyzed the test result of test probe 301 according to above-mentioned principle, thereby determines the Aligning degree of printed circuit board (PCB) to be measured, at this, has just repeated no more.
In specific implementation process, electronic equipment also comprises a display chip, and display chip is connected with process chip, and display chip is for being presented at by test result the display device being connected with electronic equipment.In specific implementation process, display chip can be integrated in process chip, also can be integrated on the circuit board of electronic equipment, at this, does not limit.
In specific implementation process, electronic equipment also comprises a memory bank, and as hard disk, disk etc., memory bank is connected with process chip, and memory bank is for store test results.
By above-mentioned part, can find out, owing to having adopted the process chip being connected with test probe by test probe interface to record at least one probe on test probe test result at least one instrument connection on printed circuit board (PCB) to be measured, and according to test result, determine the technical scheme of the Aligning degree of printed circuit board (PCB) to be measured, do not need tester to determine Aligning degree data according to the bright light situation of light-emitting component on test probe, Aligning degree data need to not carried out manual record by tester yet simultaneously, so having solved Aligning degree test mode of the prior art exists and easily causes tester to judge to make mistakes, and the lower technical matters of the record efficiency of Aligning degree data, realized the accuracy of the Aligning degree test that improves printed circuit board (PCB) to be measured, and the technique effect that has improved the record efficiency of Aligning degree, and then realized the time of saving testing printed circuit board accuracy, improve the technique effect of the production efficiency of printed circuit board (PCB).
Obviously, those skilled in the art can carry out various changes and modification and not depart from spirit and scope of the present utility model the utility model.Like this, if within of the present utility model these are revised and modification belongs to the scope of the utility model claim and equivalent technologies thereof, the utility model is also intended to comprise these changes and modification interior.
Claims (5)
1. an electronic equipment, is characterized in that, described electronic equipment comprises:
Test probe, comprise at least one test probe, described at least one test probe is corresponding with at least one instrument connection on printed circuit board (PCB) to be measured, and described printed circuit board (PCB) to be measured at least comprises three layers of circuit layer, and in described at least one instrument connection, each instrument connection is corresponding to an Aligning degree value;
Test probe interface, is connected with described test probe;
Process chip, by described test probe interface, be connected with described test probe, for recording the test result of described at least one probe to described at least one instrument connection, and the test result that the first probe is corresponding in described at least one probe is while being conducting, the Aligning degree of determining described printed circuit board (PCB) is greater than the first Aligning degree value corresponding to the first instrument connection in described at least one instrument connection, when test result corresponding to described the first probe is disconnection, the Aligning degree of determining described printed circuit board (PCB) is less than described the first Aligning degree value, wherein, described the first probe is corresponding with described the first instrument connection.
2. electronic equipment as claimed in claim 1, is characterized in that, described test probe also comprises a grounded probe, and described grounded probe is corresponding with the ground hole on described printed circuit board (PCB).
3. electronic equipment as claimed in claim 1, is characterized in that, described test probe also comprises at least one pilot pin, and described pilot pin is corresponding with the pilot hole on described printed circuit board (PCB) to be measured.
4. the electronic equipment as described in arbitrary claim in claim 1-3, it is characterized in that, described electronic equipment also comprises a display chip, and described display chip is connected with described process chip, and described display chip is for being presented at by described test result the display device being connected with described electronic equipment.
5. as required the electronic equipment as described in arbitrary claim in 1-3 in power, it is characterized in that, described electronic equipment also comprises a memory bank, and described memory bank is connected with described process chip, and described memory bank is used for storing described test result.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320639223.3U CN203519782U (en) | 2013-10-16 | 2013-10-16 | Electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320639223.3U CN203519782U (en) | 2013-10-16 | 2013-10-16 | Electronic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203519782U true CN203519782U (en) | 2014-04-02 |
Family
ID=50378696
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320639223.3U Expired - Lifetime CN203519782U (en) | 2013-10-16 | 2013-10-16 | Electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203519782U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105716512A (en) * | 2014-12-03 | 2016-06-29 | 北大方正集团有限公司 | Interlayer alignment prompt module and method |
| CN109298313A (en) * | 2018-09-12 | 2019-02-01 | 闻泰通讯股份有限公司 | Oscillograph subtest circuit board and oscillograph detection device |
-
2013
- 2013-10-16 CN CN201320639223.3U patent/CN203519782U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105716512A (en) * | 2014-12-03 | 2016-06-29 | 北大方正集团有限公司 | Interlayer alignment prompt module and method |
| CN109298313A (en) * | 2018-09-12 | 2019-02-01 | 闻泰通讯股份有限公司 | Oscillograph subtest circuit board and oscillograph detection device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105430945B (en) | HDI blind holes of circuit board deviation fool proof test method | |
| CN101709948A (en) | Alignment detecting method of multilayer printed wiring board | |
| CN108255652B (en) | Signal testing device | |
| US8659314B2 (en) | Test apparatus for peripheral component interconnect expansion slot | |
| CN206274329U (en) | Test accessory part and test accessory plate | |
| CN102999096B (en) | Computing machine | |
| CN203519782U (en) | Electronic device | |
| CN200986566Y (en) | Universal device for testing combined circuit board | |
| CN203102256U (en) | Signal test fixture of server DDR3 memory slot | |
| CN103323734A (en) | Circuit short/open testing method of flexible circuit boards | |
| US20100246633A1 (en) | Testing apparatus for computer motherboard design | |
| CN106918776A (en) | A kind of instrument and equipment of Intelligent Measurement NanoSIM card Dynamic Signals | |
| US7868625B2 (en) | Slot interposer probe | |
| CN104182555A (en) | Circuit board wire distribution detection device and circuit board wire distribution detection method | |
| CN104569594A (en) | Automatic missile resistance testing system | |
| CN103048611A (en) | Universal COB module testing mode | |
| CN205142654U (en) | PCB board convenient to inspection drilling breaking | |
| CN103137210A (en) | DDR signal testing auxiliary tool | |
| CN205786943U (en) | A kind of high density LED blind buried via hole circuit board leads to out of circuit test tool | |
| CN105572568A (en) | ICT online testing system | |
| CN103455400A (en) | Method for testing SMI2 (intel scalable memory interface 2) signals of internal memory | |
| CN204989227U (en) | Emitting diode prevents slow -witted probe test fixture | |
| CN109656770B (en) | VPX bus passive serial channel test circuit board | |
| US20120268104A1 (en) | Signal detection apparatus for sas devices | |
| CN102692526A (en) | An assistant testing device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 100871, Beijing, Haidian District Cheng Fu Road 298, founder building, 9 floor Patentee after: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee after: CHONGQING FOUNDER HI-TECH ELECTRONIC Inc. Patentee after: PKU FOUNDER INFORMATION INDUSTRY GROUP CO.,LTD. Address before: 100871, Beijing, Haidian District Cheng Fu Road 298, founder building, 5 floor Patentee before: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee before: CHONGQING FOUNDER HI-TECH ELECTRONIC Inc. Patentee before: FOUNDER INFORMATION INDUSTRY HOLDINGS Co.,Ltd. |
|
| CP03 | Change of name, title or address | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20220916 Address after: 3007, Hengqin international financial center building, No. 58, Huajin street, Hengqin new area, Zhuhai, Guangdong 519031 Patentee after: New founder holdings development Co.,Ltd. Patentee after: CHONGQING FOUNDER HI-TECH ELECTRONIC Inc. Address before: 100871, Beijing, Haidian District Cheng Fu Road 298, founder building, 9 floor Patentee before: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee before: CHONGQING FOUNDER HI-TECH ELECTRONIC Inc. Patentee before: PKU FOUNDER INFORMATION INDUSTRY GROUP CO.,LTD. |
|
| TR01 | Transfer of patent right | ||
| CX01 | Expiry of patent term |
Granted publication date: 20140402 |
|
| CX01 | Expiry of patent term |