CN203085642U - Novel integrated circuit package structure - Google Patents
Novel integrated circuit package structure Download PDFInfo
- Publication number
- CN203085642U CN203085642U CN 201320044829 CN201320044829U CN203085642U CN 203085642 U CN203085642 U CN 203085642U CN 201320044829 CN201320044829 CN 201320044829 CN 201320044829 U CN201320044829 U CN 201320044829U CN 203085642 U CN203085642 U CN 203085642U
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- CN
- China
- Prior art keywords
- integrated circuit
- package structure
- circuit package
- heat dissipation
- novel integrated
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Abstract
The utility model discloses a novel integrated circuit package structure, relates to the technical field of circuit packaging, and specifically relates to the improved technology of integrated circuit package structure. The novel integrated circuit package structure comprises a substrate (1), wherein grooves are arranged in the substrate (1), electronic chips (2) are arranged in the grooves, fluorescent powder packaging layers (3) are arranged on the electronic chips (2); the bottom part of the grooves are further provided with a bottom plate (4), the bottom plate (4) is provided with heat dissipation holes (5), and the heat dissipation holes (5) penetrate to the bottom surface of the substrate (1); and the diameter of the heat dissipation holes (5) ranges from 1.5 mm to 2.6 mm. The novel integrated circuit package structure solves the problems that the existing integrated circuit package structure is poor in heat dissipation, and cannot guarantee the stable and reliable operation of the integrated circuit.
Description
Technical field
The utility model relates to the circuit package technical field, is specifically related to the improvement technology of integrated circuit package structure.
Background technology
Integrated antenna package not only plays bonding point and the outside effect be electrically connected in integrated circuit (IC) chip; also for integrated circuit (IC) chip, provide a reliable and stable operational environment; integrated circuit (IC) chip is played to the effect of machinery or environmental protection; thereby the function that integrated circuit (IC) chip can be brought into normal play, and guarantee that it has high stability and reliability.In a word, the quality of integrated antenna package quality, the performance good and bad relation overall to integrated circuit is very large.Therefore, encapsulation should have stronger mechanical performance, good electric property, heat dispersion and chemical stability.
There is the bad shortcoming of thermal diffusivity in existing integrated circuit package structure, can't guarantee the work that integrated circuit is reliable and stable.
The utility model content
The utility model provides the new type integrated circuit encapsulating structure, and the utility model has solved existing integrated circuit package structure and existed thermal diffusivity bad, can't guarantee the problem of the work that integrated circuit is reliable and stable.
For addressing the above problem, the utility model adopts following technical scheme: the new type integrated circuit encapsulating structure, comprise matrix 1, and fluted above matrix 1, electronic chip 2 is arranged in groove, and fluorescent powder packaging layer 3 is arranged on electronic chip 2; Also be provided with base plate 4 at bottom portion of groove, louvre 5 is arranged on base plate 4, louvre 5 connects to matrix 1 bottom surface.The diameter of described louvre 5 is the 1.5-2.6 millimeter.
The utility model is provided with louvre in the bottom surface of the groove at electronic chip place, therefore, improves the heat dispersion of encapsulated circuit, can guarantee the work that integrated circuit is reliable and stable.
The accompanying drawing explanation
Fig. 1 is the utility model structural representation;
Fig. 2 is the vertical view of Fig. 1.
Symbol description in figure: matrix 1, electronic chip 2, fluorescent powder packaging layer 3, base plate 4, louvre 5.
Embodiment
below with best embodiment, the utility model is described in detail
.
As shown in Figure 1-2, the new type integrated circuit encapsulating structure, comprise matrix 1, and fluted above matrix 1, electronic chip 2 is arranged in groove, and fluorescent powder packaging layer 3 is arranged on electronic chip 2; Also be provided with base plate 4 at bottom portion of groove, louvre 5 is arranged on base plate 4, louvre 5 connects to matrix 1 bottom surface.In matrix, the electrode of integrated circuit electronic chip can draw and can interconnect from matrix.
The diameter of described louvre 5 is 1.9 millimeters.
Above-mentioned fluorescent powder packaging layer is comprised of glue and fluorescent material, and glue is polysulfide rubber, silicon rubber, polyurethane rubber, neoprene or butyl rubber, and the mass ratio of glue and fluorescent material is 0.5-0.6:1.
The utility model recessing on aluminium or copper matrix, on matrix, design circuit connects groove, and electronic chip is placed in groove of substrate, after coating fluorescent material, can prepare high-power product.Require to select groove quantity and circuit different substrate according to wattage, can meet the designing requirement of different circuit.
Finally it should be noted that: obviously, above-described embodiment is only for the utility model example clearly is described, and is not the restriction to execution mode.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without also giving all execution modes.And the apparent variation of being amplified out thus or change are still among protection range of the present utility model.
Claims (2)
1. the new type integrated circuit encapsulating structure, is characterized in that, comprises matrix (1), and fluted above matrix (1), electronic chip (2) is arranged in groove, and fluorescent powder packaging layer (3) is arranged on electronic chip (2); Also be provided with base plate (4) at bottom portion of groove, louvre (5) is arranged on base plate (4), louvre (5) connects to matrix (1) bottom surface.
2. new type integrated circuit encapsulating structure as claimed in claim 1, is characterized in that, the diameter of described louvre (5) is the 1.5-2.6 millimeter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320044829 CN203085642U (en) | 2013-01-28 | 2013-01-28 | Novel integrated circuit package structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320044829 CN203085642U (en) | 2013-01-28 | 2013-01-28 | Novel integrated circuit package structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203085642U true CN203085642U (en) | 2013-07-24 |
Family
ID=48831452
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201320044829 Expired - Fee Related CN203085642U (en) | 2013-01-28 | 2013-01-28 | Novel integrated circuit package structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203085642U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105405952A (en) * | 2015-12-28 | 2016-03-16 | 广东科技学院 | Self-cooling high-power integral LED package |
| CN117038648A (en) * | 2023-10-08 | 2023-11-10 | 季华实验室 | Semiconductor chip set structure and manufacturing method |
-
2013
- 2013-01-28 CN CN 201320044829 patent/CN203085642U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105405952A (en) * | 2015-12-28 | 2016-03-16 | 广东科技学院 | Self-cooling high-power integral LED package |
| CN105405952B (en) * | 2015-12-28 | 2017-09-29 | 广东科技学院 | It is a kind of to be encapsulated from heat dissipation high-power integral LED |
| CN117038648A (en) * | 2023-10-08 | 2023-11-10 | 季华实验室 | Semiconductor chip set structure and manufacturing method |
| CN117038648B (en) * | 2023-10-08 | 2023-12-15 | 季华实验室 | Semiconductor chip set structure and manufacturing method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130724 Termination date: 20150128 |
|
| EXPY | Termination of patent right or utility model |