CN203398100U - A semiconductor chip with a novel heat dissipating structure - Google Patents
A semiconductor chip with a novel heat dissipating structure Download PDFInfo
- Publication number
- CN203398100U CN203398100U CN201320523880.1U CN201320523880U CN203398100U CN 203398100 U CN203398100 U CN 203398100U CN 201320523880 U CN201320523880 U CN 201320523880U CN 203398100 U CN203398100 U CN 203398100U
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- China
- Prior art keywords
- chip
- heat dissipating
- substrate
- heating panel
- holes
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- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model discloses a semiconductor chip with a packaging structure and especially relates to a semiconductor chip with a novel heat dissipating structure. In the semiconductor chip with a novel heat dissipating structure, short interconnected distance is arranged between a chip and an external system; a good heat dissipating performance is achieved, and low production cost is provided. The packaging structure comprises a substrate and a heat dissipating board. Multiple bonding pads are disposed on the bottom of the chip. The substrate is abutted against the bottom of the chip. Bonding pad through holes are disposed on the substrate. Conductive solder is filled in the bonding pad through holes. The bonding pad through holes comprise inner through holes and outer through holes. The diameters of the inner through holes are less than those of the outer through holes. The heat dissipating board is pasted on the top of the chip through insulating heat conducting glue. A first buckle and a first clamping groove in mutual cooperation are disposed on the outer edge of the heat dissipating board and the outer edge of the substrate, respectively. Heat dissipating sheets are disposed on the heat dissipating board. Vent holes are disposed on the heat dissipating sheets. The heat dissipating board is a copper heat dissipating board while the heat dissipating sheets are copper heat dissipating sheets.
Description
Technical field
The utility model relates to the technology of semiconductor chips field with encapsulating structure, particularly relates to a kind of semiconductor chip of radiating structure.
Background technology
As everyone knows, semiconductor chip is a kind of semiconductor device that can realize certain function that carries out etch on semiconductor sheet material, connect up, make, and is widely used in telecommunications, mechanical automation industry; Existing semiconductor chip, for effectively protection chip is impaired to prevent, generally include chip and encapsulation, encapsulation comprises substrate, chip is bonded on substrate by glue or film, chip is realized interconnection and is realized distributing again of substrate surface soldered ball position by the heavy cabling of substrate inside by gold thread and substrate, and chip is by the electric interconnection of soldered ball and external system components; Yet this semiconductor chip, owing to having used gold thread, production cost is higher, and the interconnection distance of chip and external system is longer, easily causes signal delay, and the heat radiation of chip mainly completes by the spontaneous heat radiation of end face in addition, and heat dispersion is poor.
Utility model content
For solving the problems of the technologies described above, the utility model provide a kind of chip and external system interconnection distance shorter, good heat dispersion performance, the also semiconductor chip of lower radiating structure of production cost simultaneously.
The semiconductor chip of radiating structure of the present utility model, comprise chip and encapsulation, described encapsulation comprises substrate and heating panel, the bottom of described chip is provided with a plurality of bond pads, described baseplate-laminating is in the bottom of described chip, and the position corresponding with described bond pad is provided with welding plate hole on described substrate, in described welding plate hole, be filled with conductive solder, described welding plate hole comprises the inner via hole that is opened on substrate top surface, and communicate with inner via hole and be opened on the accessibke porosity of substrate bottom surface, the aperture of described inner via hole is less than the aperture of accessibke porosity, described heating panel sticks in the top of described chip by thermal plastic insulation, the outer ledge of described heating panel and substrate is also respectively arranged with the first buckle and the first draw-in groove cooperatively interacting, on described heating panel, be provided with a plurality of the second draw-in grooves, in described the second draw-in groove, be vertically fixed with fin, on described fin, be provided with air vent hole, described heating panel and fin are respectively copper heating panel and copper radiating rib.
Further, the inwall of described accessibke porosity is also provided with conductive metal ring, and the bottom of described substrate is also provided with soldered ball, and described soldered ball is electrically connected to described conductive metal ring.
Compared with prior art the beneficial effects of the utility model are: comprise chip and encapsulation, encapsulation comprises substrate and heating panel, the bottom of chip is provided with a plurality of bond pads, baseplate-laminating is in the bottom of chip, and the position corresponding with bond pad is provided with welding plate hole on substrate, in welding plate hole, be filled with conductive solder, welding plate hole comprises the inner via hole that is opened on substrate top surface, and communicate with inner via hole and be opened on the accessibke porosity of substrate bottom surface, the aperture of inner via hole is less than the aperture of accessibke porosity, heating panel sticks in the top of chip by thermal plastic insulation, the outer ledge of heating panel and substrate is also respectively arranged with the first buckle and the first draw-in groove cooperatively interacting, on heating panel, be provided with a plurality of the second draw-in grooves, in the second draw-in groove, be vertically fixed with fin, on fin, be provided with air vent hole, heating panel and fin are respectively copper heating panel and copper radiating rib, like this, conductive solder in welding plate hole can be drawn the joint on chip, and realize interconnection with external system, this mode has not only been cancelled the mode that adopts gold thread Bonding in conventional art, reduced production cost, realize chip simultaneously and be connected with the direct of external system, effectively shortened line distance, reduced the impedance in interconnection process, in addition, because the aperture of accessibke porosity is greater than the aperture of inner via hole, the conductive solder that is filled in accessibke porosity also has the effect of buckle, by top, press substrate, effectively guaranteed the laminating of substrate and chip, and by buckle and the draw-in groove effect of substrate and heating panel, further top presses chip and heating panel to make its laminating again, effectively improved radiating effect, simultaneously also effective packaged chip, in addition, fin on heating panel has effectively increased area of dissipation, heat radiation through hole can improve the Air Flow between fin again, improved radiating efficiency, meanwhile, according to different radiating requirements and semiconductor, be arranged on circuit board after the direction of radiating airflow, can change the fin of varying number, size, and be arranged in the second draw-in groove of relevant position on heating panel, improve radiating effect.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model.
Embodiment
Below in conjunction with drawings and Examples, embodiment of the present utility model is described in further detail.Following examples are used for illustrating the utility model, but are not used for limiting scope of the present utility model.
As shown in Figure 1, the semiconductor chip of radiating structure of the present utility model, the semiconductor chip of radiating structure of the present utility model, comprise chip 1 and encapsulation, encapsulation comprises substrate 2 and heating panel 3, the bottom of chip 1 is provided with a plurality of bond pads 11, substrate 2 is fitted in the bottom of chip 1, and the position corresponding with bond pad is provided with welding plate hole 21 on substrate 2, in welding plate hole 21, be filled with conductive solder, welding plate hole 21 comprises the inner via hole 22 that is opened on substrate top surface, and communicate with inner via hole and be opened on the accessibke porosity 23 of substrate bottom surface, inner via hole 22 aperture is less than accessibke porosity 23 aperture, heating panel 3 sticks in the top of chip 1 by thermal plastic insulation, heating panel 3 is also respectively arranged with the outer ledge of substrate 2 the first buckle 31 and the first draw-in groove 26 cooperatively interacting, on heating panel, be provided with a plurality of the second draw-in grooves 32, in the second draw-in groove, be vertically fixed with fin 33, on fin, be provided with air vent hole 34, heating panel 3 and fin 33 are respectively copper heating panel and copper radiating rib, like this, conductive solder in welding plate hole can be drawn the joint on chip, and realize interconnection with external system, this mode has not only been cancelled the mode that adopts gold thread Bonding in conventional art, reduced production cost, realize chip simultaneously and be connected with the direct of external system, effectively shortened line distance, reduced the impedance in interconnection process, in addition, because the aperture of accessibke porosity is greater than the aperture of inner via hole, the conductive solder that is filled in accessibke porosity also has the effect of buckle, by top, press substrate, effectively guaranteed the laminating of substrate and chip, and by buckle and the draw-in groove effect of substrate and heating panel, further top presses chip and heating panel to make its laminating again, effectively improved radiating effect, simultaneously also effective packaged chip, in addition, fin on heating panel has effectively increased area of dissipation, heat radiation through hole can improve the Air Flow between fin again, improved radiating efficiency, meanwhile, according to different radiating requirements and semiconductor, be arranged on circuit board after the direction of radiating airflow, can change the fin of varying number, size, and be arranged in the second draw-in groove of relevant position on heating panel, improve radiating effect, it should be pointed out that the second draw-in groove can be parallel to each other or be arranged in radially the end face of heating panel, to arrange the position that inserts of fin according to different radiating requirements.
The semiconductor chip of radiating structure of the present utility model, the inwall of accessibke porosity is also provided with conductive metal ring 24, and the bottom of substrate is also provided with soldered ball 25, and soldered ball 25 is connected with conductive metal ring electricity 24; Like this, by the circuit on substrate again layout, and in the mode of soldered ball, chip wiring is drawn, can realize same chip and change different substrate to adapt to the installation of different circuit, use more for convenience.
The above is only preferred implementation of the present utility model; should be understood that; for those skilled in the art; do not departing under the prerequisite of the utility model know-why; can also make some improvement and modification, these improve and modification also should be considered as protection range of the present utility model.
Claims (2)
1. the semiconductor chip of a radiating structure, it is characterized in that, comprise chip and encapsulation, described encapsulation comprises substrate and heating panel, the bottom of described chip is provided with a plurality of bond pads, described baseplate-laminating is in the bottom of described chip, and the position corresponding with described bond pad is provided with welding plate hole on described substrate, in described welding plate hole, be filled with conductive solder, described welding plate hole comprises the inner via hole that is opened on substrate top surface, and communicate with inner via hole and be opened on the accessibke porosity of substrate bottom surface, the aperture of described inner via hole is less than the aperture of accessibke porosity, described heating panel sticks in the top of described chip by thermal plastic insulation, the outer ledge of described heating panel and substrate is also respectively arranged with the first buckle and the first draw-in groove cooperatively interacting, on described heating panel, be provided with a plurality of the second draw-in grooves, in described the second draw-in groove, be vertically fixed with fin, on described fin, be provided with air vent hole, described heating panel and fin are respectively copper heating panel and copper radiating rib.
2. the semiconductor chip of radiating structure as claimed in claim 1, is characterized in that, the inwall of described accessibke porosity is also provided with conductive metal ring, and the bottom of described substrate is also provided with soldered ball, and described soldered ball is electrically connected to described conductive metal ring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320523880.1U CN203398100U (en) | 2013-08-27 | 2013-08-27 | A semiconductor chip with a novel heat dissipating structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320523880.1U CN203398100U (en) | 2013-08-27 | 2013-08-27 | A semiconductor chip with a novel heat dissipating structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203398100U true CN203398100U (en) | 2014-01-15 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320523880.1U Expired - Fee Related CN203398100U (en) | 2013-08-27 | 2013-08-27 | A semiconductor chip with a novel heat dissipating structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203398100U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108091620A (en) * | 2017-12-20 | 2018-05-29 | 联想(北京)有限公司 | A kind of chip structure and electronic equipment |
| CN116741648A (en) * | 2023-08-11 | 2023-09-12 | 四川遂宁市利普芯微电子有限公司 | Flip chip packaging method and flip chip packaging structure |
-
2013
- 2013-08-27 CN CN201320523880.1U patent/CN203398100U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108091620A (en) * | 2017-12-20 | 2018-05-29 | 联想(北京)有限公司 | A kind of chip structure and electronic equipment |
| CN116741648A (en) * | 2023-08-11 | 2023-09-12 | 四川遂宁市利普芯微电子有限公司 | Flip chip packaging method and flip chip packaging structure |
| CN116741648B (en) * | 2023-08-11 | 2023-11-17 | 四川遂宁市利普芯微电子有限公司 | Flip chip packaging method and flip chip packaging structure |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140115 Termination date: 20140827 |
|
| EXPY | Termination of patent right or utility model |