CN203013791U - 一种基于dfn、qfn的新型led封装件 - Google Patents
一种基于dfn、qfn的新型led封装件 Download PDFInfo
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- CN203013791U CN203013791U CN201220261488XU CN201220261488U CN203013791U CN 203013791 U CN203013791 U CN 203013791U CN 201220261488X U CN201220261488X U CN 201220261488XU CN 201220261488 U CN201220261488 U CN 201220261488U CN 203013791 U CN203013791 U CN 203013791U
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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Abstract
本实用新型涉及一种基于DFN、QFN的新型LED封装件,属于电子信息自动化元器件制造技术领域。封装件包括引线框架载体,粘片胶,IC芯片,键合线,塑封体,引线框架载体上固定粘片胶,粘片胶上固定IC芯片,IC芯片的PAD键合线与引线框架载体相连,构成了电路的电流和信号通道,塑封料包围了引线框架载体、粘片胶、IC芯片、IC芯片上的PAD与引线框架载体连接的键合线构成电路整体;本实用新型可有效缩小产品尺寸,且属于载体外露的高密度封装,不但降低了成本,而且扩大了产品的应用范围,提高封装可靠性。
Description
技术领域
本实用新型涉及一种基于DFN、QFN的新型LED封装件,属于电子信息自动化元器件制造技术领域。
背景技术
DFN是一种最新的的电子封装工艺.采用先进的双边扁平无铅封装(DFN)。DFN平台是最新的表面贴装封装技术。印刷电路板(PCB)的安装垫、阻焊层和模版样式设计以及组装过程,都需要遵循相应的原则。DFN平台具有多功能性,可以让一个或多个半导体器件在无铅封装内连接。
QFN(Quad Flat No-lead Package,方形扁平无引脚封装)是一种焊盘尺寸小、体积小、以塑料作为密封材料的新兴的表面贴装芯片封装技术。由于底部中央大暴露的焊盘被焊接到PCB的散热焊盘上,使得QFN具有极佳的电和热性能。QFN是一种无引脚封装,呈正方形或矩形,封装底部中央位置一个大面积裸露的焊盘,具有导热的作用,在大焊盘的封装外围有实现电气连接的导电焊盘。由于QFN封装不像传统的SOIC与TSOP封装那样具有鸥翼状引线,内部引脚与焊盘之间的导电路径短,自感系数以及封装体内布线电阻很低,所以,它能提供卓越的电性能。此外,它还通过外露的引线框架焊盘提供了出色的散热性能,该焊盘具有直接散热的通道,用于释放封装内的热量。通常,将散热焊盘直接焊接在电路板上,并且PCB中的散热过孔有助于将多余的功耗扩散到铜接地板中,从而吸收多余的热量。由于体积小、重量轻,加上杰出的电性能和热性能,这种封装特别适合任何一个对尺寸、重量和性能都有要求的应用。
LED(Light-Emitting-Diode,为发光二极管)是一种能够将电能转化为光能的半导体,它改变了白炽灯钨丝发光与节能灯三基色粉发光的原理,而采用电场发光。据分析,LED的特点非常明显,寿命长、光效高、无辐射与低功耗。LED的光谱几乎全部集中于可见光频段,其发光效率可超过150lm/W(2010年)。将LED与普通白炽灯、螺旋节能灯及T5三基色荧光灯进行对比,结果显示:普通白炽灯的光效为12lm/W,寿命小于2000小时,螺旋节能灯的光效为60lm/W,寿命小于8000小时,T5荧光灯则为96lm/W,寿命大约为10000小时,而直径为5毫米的白光LED光效理论上可以超过150lm/W,寿命可大于100000小时。有人还预测,未来的LED寿命上限将无穷大。然而,LED灯的工作原理使得在大功率LED照明行业里散热问题变得非常突出,许多LED照明方案不够重视散热,或者是技术水平有限,所以目前量产的大功率LED灯普遍存在实际使用寿命远远不如理论值,性价比低于传统灯具的尴尬情况,目前还没有真正做到适合商业化的量产。
传统的LED工艺有着污染物焊接。焊点损伤变形等常见缺陷,封装过程次品率较高,而且产品尺寸较大,应用有局限。
实用新型内容
针对上述基于DFN、QFN封装的新型LED封装件的缺点,提供一种基于DFN、QFN的新型LED封装件,可有效缩小产品尺寸,且属于载体外露的高密度封装,不但降低了成本,而且扩大了产品的应用范围,提高封装可靠性。
本实用新型采用的技术方案:封装件包括引线框架载体1,粘片胶2,IC芯片3,键合线4,塑封体5,引线框架载体1上固定粘片胶2,粘片胶2上固定IC芯片3,IC芯片3的PAD键合线4与引线框架载体1相连,构成了电路的电流和信号通道,塑封料5包围了引线框架载体1、粘片胶2、IC芯片3、IC芯片3上的PAD与引线框架载体1连接的键合线4构成电路整体。
所述的粘片胶2为导电胶或绝缘。
本实用新型的有益效果:可有效缩小产品尺寸,且属于载体外露的高密度封装,不但降低了成本,而且扩大了产品的应用范围,提高封装可靠性。
附图说明
图1为本实用新型的结构剖面图。
图中:1-引线框架载体、2-粘片胶、3-IC芯片、4-键合线、5-塑封体。
具体实施方式
下面结合附图对本实用新型进行详细说明。
如图1所示:本实用新型包括引线框架载体1,粘片胶2,IC芯片3,键合线4,塑封体5,引线框架载体1上是粘片胶2,粘片胶2为导电胶或绝缘胶,粘片胶2上是IC芯片3,IC芯片3上的PAD键合线4与引线框架载体1相连,构成了电路的电流和信号通道。塑封料5围了引线框架载体1、粘片胶2、IC芯片3、IC芯片3上的PAD与引线框架载体1连接的键合线4构成电路整体,对IC芯片3和键合线4到支撑和保护作用。
Claims (2)
1.一种基于DFN、QFN的新型LED封装件,其特征在于:封装件包括引线框架载体,粘片胶,IC芯片,键合线,塑封体,引线框架载体上固定粘片胶,粘片胶上固定IC芯片,IC芯片的PAD键合线与引线框架载体相连,构成了电路的电流和信号通道,塑封料包围了引线框架载体、粘片胶、IC芯片、IC芯片上的PAD与引线框架载体连接的键合线构成电路整体。
2.根据权利要求1所述的一种基于DFN、QFN的新型LED封装件,其特征在于:所述的粘片胶为导电胶或绝缘。
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102738365A (zh) * | 2012-06-05 | 2012-10-17 | 华天科技(西安)有限公司 | 一种基于dfn、qfn的新型led封装件及其制作方法 |
CN104681517A (zh) * | 2013-12-03 | 2015-06-03 | 上海北京大学微电子研究院 | 一种适合于led照明应用的多芯片qfn封装 |
WO2020125262A1 (zh) * | 2018-12-17 | 2020-06-25 | 深圳市瑞丰光电子股份有限公司 | 一种led封装结构及led灯组件 |
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2012
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102738365A (zh) * | 2012-06-05 | 2012-10-17 | 华天科技(西安)有限公司 | 一种基于dfn、qfn的新型led封装件及其制作方法 |
CN104681517A (zh) * | 2013-12-03 | 2015-06-03 | 上海北京大学微电子研究院 | 一种适合于led照明应用的多芯片qfn封装 |
WO2020125262A1 (zh) * | 2018-12-17 | 2020-06-25 | 深圳市瑞丰光电子股份有限公司 | 一种led封装结构及led灯组件 |
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