CN202998660U - Printed circuit board with crossed blind and buried structures - Google Patents
Printed circuit board with crossed blind and buried structures Download PDFInfo
- Publication number
- CN202998660U CN202998660U CN 201220687438 CN201220687438U CN202998660U CN 202998660 U CN202998660 U CN 202998660U CN 201220687438 CN201220687438 CN 201220687438 CN 201220687438 U CN201220687438 U CN 201220687438U CN 202998660 U CN202998660 U CN 202998660U
- Authority
- CN
- China
- Prior art keywords
- copper foil
- blind hole
- foil layer
- hole
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The utility model discloses a printed circuit board with crossed blind and buried structures. The printed circuit board comprises four copper foil layers and core plates. A core plate is arranged between each two copper foil layers. A through hole used for conducting the four copper foil layers is arranged between a first copper foil layer and a fourth copper foil layer. A blind hole I is arranged between the first copper foil layer and a second copper foil layer. A blind hole II is arranged between a third copper foil layer and the fourth copper foil layer. The blind hole II is between the blind hole I and the through hole. The printed circuit board also comprises a blind hole III which is arranged between the second copper foil layer and the fourth copper foil layer. The blind hole is positioned between the blind hole II and the through hole. According to the structure of the printed circuit board, a large number of through hole structures are eliminated, the wiring density and packaging density are raised; a multilayer plate interconnection structure has the characteristics of diversified design and simplified operation; and the reliability of the multilayer plate and the electrical performance of an electronic product are obviously raised.
Description
Technical field
The utility model relates to printed-board technology, particularly relates to a kind of with intersecting the blind printed circuit board (PCB) that buries structure.
Background technology
Printed circuit board (Printed Circuit Board, be called for short PCB) be physical entity and the supporter that in the electronic products such as modern communications equipment, computer, consumer electronics, electronic devices and components connect, undertaking signal transmission, Power supply key effect, is the requisite basic element of character in electronic equipment.Fast development along with electronic technology, electronic product is to light, thin, short and smallization direction fast development, promoted printed circuit board to high accuracy, high density, the progress of graph thinning direction, high density interconnect (High Density Interconnect, HDI) technology is flourish under this background.Printed circuit board (PCB) is again pcb board, is the fundamental parts of all electronic products, is the carrier of all electronic devices and components, is the main support body of electronic components when installing with interconnection.
For example application number is CN201120065087.2, publication number is the Chinese utility model patent " a kind of multilayer circuit board " of CN201947529U, a kind of multilayer circuit board is disclosed, comprise the Floor 12 structure, this Floor 12 wiring board is formed by four central layers and four layers of copper foil layer compacting, and ground floor, the second layer, eleventh floor and Floor 12 are copper foil layer, and four central layers are positioned at the centre of the second layer and eleventh floor, each central layer is similar to a double sided board, and all there is circuit on its two sides; This patent shortcoming is that all electrical connections are all to lean on the insert hole of through hole and components and parts to form electric interconnection, and the volume of product is large, and the number of plies is many, is not suitable for the development of Modern Electronic Packaging Technology.When having high most advanced and sophisticated pcb board to need further compression pcb board space and wiring distance, can not meet the demands.Core material is superimposed too much, and during making, the rear multilayer build-up off normal that easily occurs is closed at the fourth of the twelve Earthly Branches, for follow-up boring has increased scrapping that the hole is inclined to one side, the hole is broken.When holing, the single face copper conducting of needs central layer can not accomplish.The manufacture craft more complicated, equipment investment is large, and raw material are expensive, and medium-sized and small enterprises can only be hung back.
Yet the conducting between each layer and disconnection are all to depend on pad to realize, the voltage layer integrality of multi-layer sheet inherence can be destroyed in the all-pass hole, electric capacity is sustained a loss, increase noise, the pad of all size and resistance are from the existence of ring, to conflict with part and the wiring generation of assembling, the area of PCB is increased, be not suitable for the needs of the fast development of Electronic Encapsulating Technology.
Employing can address this problem in printed board design buried blind via technology.Blind/buried via hole, multiple-plate structure of standard is to contain internal layer circuit and outer-layer circuit, recycling is holed, and metallized processing procedure in the hole, reaches the interior bonds function of each sandwich circuit.But because the increase of line density, the packaged type of part constantly upgrades.In order to allow limited PCB area, can place more more high performance parts, except line width was thinner, the aperture also was reduced into 0.6 mm of SMD from DIP jack aperture 1 mm, further be reduced into below 0.3mm.But still can take surface area, thereby the appearance of buried via hole and blind hole is arranged again.
The utility model content
The purpose of this utility model is to overcome the problems referred to above that prior art exists, and proposes a kind of with intersecting the blind printed circuit board (PCB) that buries structure.Structure of the present utility model is eliminated a large amount of via design, improves wiring density and packaging density; Make multi-layer sheet inner interconnection structure design variation and simple to operateization; Obviously improved the electric property of multiple-plate reliability and electronic product.
The utility model is realized by the following technical solutions:
A kind of with intersecting the blind printed circuit board (PCB) that buries structure, comprise four layers of copper foil layer and central layer, be provided with a central layer between described every two-layer copper foil layer, be provided with the through hole for four layers of copper foil layer of conducting between described the first copper foil layer to the four copper foil layers, it is characterized in that: be provided with the blind hole I between described the first copper foil layer to the second copper foil layer, be provided with the blind hole II between described the 3rd copper foil layer to the four copper foil layers, described blind hole II is between blind hole I and through hole; Also comprise the blind hole III, described blind hole III is arranged between the second copper foil layer to the four copper foil layers, and described blind hole III is between blind hole II and through hole.
Described central layer comprises insulating barrier and conductive layer.
Described insulating barrier is epoxy resin.
Described conductive layer is electrolytic copper foil.
The utility model compared with prior art, its advantage is:
1, structure operation of the present utility model is simple, implements secondary and just can complete the making of product when pressing, and during processing boring, parameter control and boring method are simple, and operating procedure is simply clear and definite.
2, structure decrease of the present utility model operation time of making, reduce cost of labor, the qualification rate of improving product.
3, the lamination number of plies of structure decrease product of the present utility model is saved material, reduces costs.
4, structure of the present utility model is eliminated a large amount of via design, improves wiring density and packaging density; Make multi-layer sheet inner interconnection structure design variation and simple to operateization; Obviously improved the electric property of multiple-plate reliability and electronic product.
Description of drawings
Fig. 1 is the utility model structural representation
Be labeled as in figure: 1, copper foil layer, 2, central layer, 3, through hole, 4, the blind hole I, 5, the blind hole II, 6, the blind hole III.
Embodiment
As shown in Figure 1:
A kind of with intersecting the blind printed circuit board (PCB) that buries structure, comprise four layers of copper foil layer 1 and central layer 2, be provided with a central layer 2 between described every two-layer copper foil layer, be provided with the through hole 3 for four layers of copper foil layer of conducting between described the first copper foil layer to the four copper foil layers, be provided with blind hole I 4 between described the first copper foil layer to the second copper foil layer, be provided with blind hole II 5 between described the 3rd copper foil layer to the four copper foil layers, described blind hole II 5 is between blind hole I 4 and through hole 3; Also comprise blind hole III 6, described blind hole III 6 is arranged between the second copper foil layer to the four copper foil layers, and described blind hole III 6 is between blind hole II 5 and through hole 3.
In the utility model, described central layer 2 comprises insulating barrier and conductive layer.
In the utility model, described insulating barrier is epoxy resin.
In the utility model, described conductive layer is electrolytic copper foil.
The utility model comprises following technique during fabrication:
Sawing sheet, boring, deburring, heavy copper, panel plating, dry film, plating hole, move back film, polishing, processings of plate face, internal layer dry film, internal layer etching, internal layer AOI, brown, lamination, de-smear, boring, outer making.
Claims (4)
1. one kind with intersecting the blind printed circuit board (PCB) that buries structure, comprise four layers of copper foil layer (1) and central layer (2), be provided with a central layer (2) between described every two-layer copper foil layer, be provided with the through hole (3) for four layers of copper foil layer of conducting between described the first copper foil layer to the four copper foil layers, it is characterized in that: be provided with blind hole I (4) between described the first copper foil layer to the second copper foil layer, be provided with blind hole II (5) between described the 3rd copper foil layer to the four copper foil layers, described blind hole II (5) is positioned between blind hole I (4) and through hole (3); Also comprise blind hole III (6), described blind hole III (6) is arranged between the second copper foil layer to the four copper foil layers, and described blind hole III (6) is positioned between blind hole II (5) and through hole (3).
2. according to claim 1 a kind of with intersecting the blind printed circuit board (PCB) that buries structure, it is characterized in that: described central layer (2) comprises insulating barrier and conductive layer.
3. according to claim 2 a kind of with intersecting the blind printed circuit board (PCB) that buries structure, it is characterized in that: described insulating barrier is epoxy resin.
4. according to claim 2 a kind of with intersecting the blind printed circuit board (PCB) that buries structure, it is characterized in that: described conductive layer is electrolytic copper foil.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220687438 CN202998660U (en) | 2012-12-13 | 2012-12-13 | Printed circuit board with crossed blind and buried structures |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220687438 CN202998660U (en) | 2012-12-13 | 2012-12-13 | Printed circuit board with crossed blind and buried structures |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202998660U true CN202998660U (en) | 2013-06-12 |
Family
ID=48569781
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220687438 Expired - Fee Related CN202998660U (en) | 2012-12-13 | 2012-12-13 | Printed circuit board with crossed blind and buried structures |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202998660U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103533746A (en) * | 2013-10-08 | 2014-01-22 | 上海斐讯数据通信技术有限公司 | High-density interconnection integrated printed circuit board of improved laminated structure and manufacturing method thereof |
-
2012
- 2012-12-13 CN CN 201220687438 patent/CN202998660U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103533746A (en) * | 2013-10-08 | 2014-01-22 | 上海斐讯数据通信技术有限公司 | High-density interconnection integrated printed circuit board of improved laminated structure and manufacturing method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103025051B (en) | HDI plate of a kind of mechanical back drill pore structure and preparation method thereof | |
| CN103517557B (en) | Process the method for groove and printed circuit board (PCB) and electronic equipment on a printed circuit | |
| CN102548225B (en) | Manufacturing method for printed circuit board (PCB) | |
| CN103906372A (en) | Circuit board having embedded components and manufacturing method thereof | |
| CN103906371B (en) | Circuit board with embedded element and preparation method thereof | |
| CN105261606A (en) | Coreless layer package substrate and manufacturing method thereof | |
| CN104168711B (en) | The compression method of cavity circuit plate and its preparation method of pressing structure | |
| EP2658354A1 (en) | Golden finger and plate edge interconnection device | |
| WO2014162478A1 (en) | Component-embedded substrate and manufacturing method for same | |
| CN103533746A (en) | High-density interconnection integrated printed circuit board of improved laminated structure and manufacturing method thereof | |
| CN110719690A (en) | High speed multi-layer PCB stack and routing method | |
| CN103717013A (en) | Manufacturing method for printed circuit board | |
| CN101472403B (en) | Printed circuit board and method for producing the same | |
| CN202998663U (en) | Printed circuit board with two blind holes | |
| KR101555403B1 (en) | Wiring board | |
| CN103889165A (en) | Circuit board with embedded element and manufacturing method thereof | |
| CN202998660U (en) | Printed circuit board with crossed blind and buried structures | |
| CN202998662U (en) | Printed circuit board with blind holes and buried hole | |
| CN211063845U (en) | Mechanical blind hole HDI circuit board | |
| CN202998643U (en) | Printed circuit board with a plurality of blind holes and two buried holes | |
| CN203574934U (en) | PCB board | |
| CN202998661U (en) | Novel printed circuit board with two blind holes | |
| CN109429420B (en) | Circuit board with electromagnetic shielding function and manufacturing method thereof | |
| CN202998658U (en) | Printed circuit board with two blind holes arranged at the same side | |
| CN112770495A (en) | Omnidirectional embedded module and manufacturing method thereof, packaging structure and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130612 Termination date: 20151213 |
|
| EXPY | Termination of patent right or utility model |