CN202679346U - Multiplex coherent signal frequency synthesizer - Google Patents
Multiplex coherent signal frequency synthesizer Download PDFInfo
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- CN202679346U CN202679346U CN 201220383269 CN201220383269U CN202679346U CN 202679346 U CN202679346 U CN 202679346U CN 201220383269 CN201220383269 CN 201220383269 CN 201220383269 U CN201220383269 U CN 201220383269U CN 202679346 U CN202679346 U CN 202679346U
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Abstract
The utility model discloses a multiplex coherent signal frequency synthesizer comprising a PC (personal computer), a mother board, a control circuit, a DDS (Digital Display Scope) circuit, a crystal oscillator, a PLL (Phase Locking Loop), a 16-path mixer and a delay circuit, wherein the control circuit comprises a main controller and three salve controllers, the DDS circuit comprises a main DDS and three salve DDSes, the main DDS is connected with the main controller, the three salve DDSes are connected with the three salve controllers to obtain a control signal output by the control circuit, the PLL generates two signals to respectively serve as a local oscillator signal and a medium frequency signal of the 16-path mixer, the main DDS and the main controller simultaneously control a clock of the salve DDSes to drive the four DDSes to generate signals with high resolution, low phase noise and uniform amplitude phase, and the control circuit can obtain the control signal of the PC through the mother board to compensate the phase and amplitude differences of channels in the DDS circuit.
Description
Technical field
The utility model relates to a kind of frequency synthesizer, relates in particular to a kind of multichannel coherent signal frequency synthesizer.
Background technology
Along with the development of microwave electron technology, especially Radar Technology makes rapid progress.Index request to frequency synthesizer is more and more higher, frequency agility, high-resolution, lowly make an uproar mutually, trend that amplitude-phase consistency has become development.Yet adopt traditional mode because circuit is complicated, volume and power consumption is large, frequency, phase resolution can't meet the demands.Direct Digital Frequency Synthesizers (DDS) technology comes across 20 century 70s, it is advantageous that and have high frequency resolution, the frequency conversion speed that is exceedingly fast (ns level), the frequency conversion phase place is continuous, make an uproar mutually low, be easy to Function Extension and total digitalization be convenient to integrated, for realize frequency agility, high-resolution, lowly make an uproar mutually, the frequency synthesizer of amplitude-phase consistency, small size provides advantage.
Summary of the invention
The purpose of this utility model just is that providing a kind of addresses the above problem, all more flexible on circuit design and the version, be easy to expansion, can realize simultaneously frequency agility, the index such as covert, high-resolution, the phase place of each passage, frequency and amplitude are adjusted flexibly multichannel coherent signal frequency synthesizer.
To achieve these goals, the technical solution adopted in the utility model is such: a kind of multichannel coherent signal frequency synthesizer comprises PC, motherboard, control circuit, DDS circuit, crystal oscillator, PLL, No. 16 frequency mixers and delay circuit;
Described control circuit comprises four controllers, is respectively a master controller and three from controller, and four controllers obtain the control signal of PC by motherboard;
Described DDS circuit comprises four 4 road DDS, and wherein main DDS links to each other with master controller from DDS to be respectively a main DDS and three, and three link to each other from controller is corresponding with three respectively from DDS, obtain the control signal of control circuit output;
The input of described PLL links to each other with crystal oscillator, exports three road signals;
Wherein two-way is 2800MHz, send into No. 16 frequency mixers by eight power splitters respectively, local oscillation signal as No. 16 frequency mixers, other one road signal is 500MHz, be divided into four the tunnel by four power splitters, decide respectively DDS and three reference clock signals from DDS produce intermediate-freuqncy signal and send into No. 16 frequency mixers, as the intermediate-freuqncy signal of No. 16 frequency mixers;
The synchronous output clock end of described main DDS is divided into two-way;
One tunnel delayed circuit produces three tunnel outputs, connects respectively three from the synchronous input clock end of DDS;
The system clock input of master controller is sent on another road after through a four-divider, and the refresh clock control output end of master controller connects respectively the refresh clock input port of four 4 road DDS.
As preferably: be provided with low pass filter between described No. 16 frequency mixers and DDS circuit, the output of No. 16 frequency mixers is provided with band pass filter.
As preferably: described motherboard links to each other by USB port or RS-422 port with PC.
Compared with prior art, the utility model has the advantage of: produce two kinds of signals by a PLL who connects crystal oscillator, a kind ofly become one 16 tunnel local oscillation signal through two eight centimeters devices, another signal is after the DDS processing of circuit, form one 16 tunnel intermediate-freuqncy signal, 16 tunnel local oscillation signal and 16 tunnel intermediate-freuqncy signal are carried out mixing in No. 16 frequency mixers, and 16 tunnel intermediate-freuqncy signal is by the DDS circuit, namely four 4 road DDS finish, in order to make four 4 road DDS produce high-resolution, hang down and make an uproar mutually, amplitude-phase consistency signal, require main DDS and minimum from the phase difference between the reference clock of DDS, the synchronous output clock end of main DDS is divided into two-way, one tunnel delayed the regulation of electrical circuit, deliver to three from the synchronous input clock end of DDS, respectively the phase place from DDS is consistent to make arrival, make the phase difference of each 4 road DDS output minimum, another road is through behind the four-divider, produce into the signal of 125MHz, be sent to the system clock input of master controller, behind the master controller refresh clock, send and four 4 road DDS through isometric line, make the more new data while, make the phase difference of DDS output minimum, control circuit obtains the control signal of PC by motherboard, the phase place of each passage in the compensation DDS circuit, the amplitude difference produces amplitude-phase radiofrequency signal always.
Description of drawings
Fig. 1 is circuit theory diagrams of the present utility model.
Embodiment
The utility model is described in further detail below in conjunction with accompanying drawing.
Embodiment 1: referring to Fig. 1, a kind of multichannel coherent signal frequency synthesizer, comprise PC, motherboard, control circuit, the DDS circuit, crystal oscillator, PLL, No. 16 frequency mixers and delay circuit, described control circuit comprises four controllers, be respectively a master controller and three from controller, four controllers obtain the control signal of PC by motherboard, described DDS circuit comprises four 4 road DDS, be respectively a main DDS and three from DDS, wherein main DDS links to each other with master controller, three corresponding continuous from controller with three respectively from DDS, obtain the control signal of control circuit output, the input of described PLL links to each other with crystal oscillator, export three road signals, wherein two-way is 2800MHz, send into No. 16 frequency mixers by eight power splitters respectively, local oscillation signal as No. 16 frequency mixers, other one road signal is 500MHz, be divided into four the tunnel by four power splitters, decide respectively DDS and three reference clock signals from DDS, produce intermediate-freuqncy signal and send into No. 16 frequency mixers, intermediate-freuqncy signal as No. 16 frequency mixers, the synchronous output clock end of described main DDS is divided into two-way, one tunnel delayed circuit produces three tunnel outputs, connect respectively three from the synchronous input clock end of DDS, the system clock input of master controller is sent on another road after through a four-divider, and the refresh clock control output end of master controller connects respectively the refresh clock input port of four 4 road DDS, be provided with low pass filter between described No. 16 frequency mixers and DDS circuit, the output of No. 16 frequency mixers is provided with band pass filter, and described motherboard links to each other by USB port or RS-422 port with PC.
The utility model produces two kinds of signals by a PLL who connects crystal oscillator, a kind ofly become one 16 tunnel local oscillation signal through two eight power splitters, another signal is sent in the DDS circuit, as main DDS with from the reference signal of DDS, after the DDS processing of circuit, form one 16 tunnel intermediate-freuqncy signal, 16 tunnel local oscillation signal and 16 tunnel intermediate-freuqncy signal are carried out mixing in No. 16 frequency mixers, and 16 tunnel intermediate-freuqncy signal is finished by four 4 road DDS, and the time difference at reference clock edge can make each 4 road DDS output signal produce the phase difference of corresponding proportion, in order to make four 4 road DDS produce high-resolution, hang down and make an uproar mutually, amplitude-phase consistency signal requires main DDS and minimum from the phase difference between the reference clock of DDS.The synchronous output clock end of main DDS is divided into two-way, and one tunnel delayed the regulation of electrical circuit is delivered to three from the synchronous input clock end of DDS, and respectively the phase place from DDS is consistent to make arrival, makes the phase difference of each 4 road DDS output minimum.
Another road is through behind the four-divider, produce into the signal of 125MHz, system clock as master controller, be sent to the main controller system input end of clock, behind the master controller refresh clock, by the output of refresh clock control output end, send and four 4 road DDS through long line, making more, new data makes the phase difference of DDS output minimum simultaneously.
Four controllers in the control circuit obtain the control signal of PC by motherboard, can pass through PC, and phase place, the amplitude difference of each passage produce amplitude-phase radiofrequency signal always in the compensation DDS circuit.
The utility model adopts the DDS circuit to design, all more flexible on circuit design and version, be easy to expansion, not only can realize simultaneously the indexs such as frequency agility, covert, high-resolution, and circuit structure and volume have been simplified, cost also reduces, and the phase place of each passage, frequency and amplitude adjustment are flexible.
Claims (3)
1. a multichannel coherent signal frequency synthesizer is characterized in that: comprise PC, motherboard, control circuit, DDS circuit, crystal oscillator, PLL, No. 16 frequency mixers and delay circuit;
Described control circuit comprises four controllers, is respectively a master controller and three from controller, and four controllers obtain the control signal of PC by motherboard;
Described DDS circuit comprises four 4 road DDS, and wherein main DDS links to each other with master controller from DDS to be respectively a main DDS and three, and three link to each other from controller is corresponding with three respectively from DDS, obtain the control signal of control circuit output;
The input of described PLL links to each other with crystal oscillator, exports three road signals;
Wherein two-way is 2800MHz, send into No. 16 frequency mixers by eight power splitters respectively, local oscillation signal as No. 16 frequency mixers, other one road signal is 500MHz, be divided into four the tunnel by four power splitters, decide respectively DDS and three reference clock signals from DDS produce intermediate-freuqncy signal and send into No. 16 frequency mixers, as the intermediate-freuqncy signal of No. 16 frequency mixers;
The synchronous output clock end of described main DDS is divided into two-way;
One tunnel delayed circuit produces three tunnel outputs, connects respectively three from the synchronous input clock end of DDS;
The system clock input of master controller is sent on another road after through a four-divider, and the refresh clock control output end of master controller connects respectively the refresh clock input port of four 4 road DDS.
2. multichannel coherent signal frequency synthesizer according to claim 1, it is characterized in that: be provided with low pass filter between described No. 16 frequency mixers and DDS circuit, the output of No. 16 frequency mixers is provided with band pass filter.
3. multichannel coherent signal frequency synthesizer according to claim 1, it is characterized in that: described motherboard links to each other by USB port or RS-422 port with PC.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220383269 CN202679346U (en) | 2012-08-04 | 2012-08-04 | Multiplex coherent signal frequency synthesizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220383269 CN202679346U (en) | 2012-08-04 | 2012-08-04 | Multiplex coherent signal frequency synthesizer |
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| Publication Number | Publication Date |
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| CN202679346U true CN202679346U (en) | 2013-01-16 |
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| CN 201220383269 Expired - Fee Related CN202679346U (en) | 2012-08-04 | 2012-08-04 | Multiplex coherent signal frequency synthesizer |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106067810A (en) * | 2016-07-21 | 2016-11-02 | 中兵通信科技股份有限公司 | A kind of control system of restructural frequency synthesizer platform |
| CN107733431A (en) * | 2017-11-15 | 2018-02-23 | 电子科技大学 | A kind of multichannel coherent frequency synthesizer |
| WO2022029125A1 (en) * | 2020-08-07 | 2022-02-10 | Comet Ag | Control unit, radio frequency power generator, and method for generating synchronized radio frequency output signals |
-
2012
- 2012-08-04 CN CN 201220383269 patent/CN202679346U/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106067810A (en) * | 2016-07-21 | 2016-11-02 | 中兵通信科技股份有限公司 | A kind of control system of restructural frequency synthesizer platform |
| CN107733431A (en) * | 2017-11-15 | 2018-02-23 | 电子科技大学 | A kind of multichannel coherent frequency synthesizer |
| CN107733431B (en) * | 2017-11-15 | 2021-03-30 | 电子科技大学 | Multi-path coherent frequency synthesizer |
| WO2022029125A1 (en) * | 2020-08-07 | 2022-02-10 | Comet Ag | Control unit, radio frequency power generator, and method for generating synchronized radio frequency output signals |
| US12126347B2 (en) | 2020-08-07 | 2024-10-22 | Comet Ag | Control unit, radio frequency power generator, and method for generating synchronized radio frequency output signals |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130116 Termination date: 20150804 |
|
| EXPY | Termination of patent right or utility model |