CN203352563U - Low-phase noise frequency synthesizer - Google Patents
Low-phase noise frequency synthesizer Download PDFInfo
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- CN203352563U CN203352563U CN 201320399079 CN201320399079U CN203352563U CN 203352563 U CN203352563 U CN 203352563U CN 201320399079 CN201320399079 CN 201320399079 CN 201320399079 U CN201320399079 U CN 201320399079U CN 203352563 U CN203352563 U CN 203352563U
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Abstract
The utility model provides a low-phase noise frequency synthesizer. A voltage-controlled oscillator (1) outputs a signal, and the signal is divided into a plurality of paths of signals through a one-to-multiple power divider. For one path, after amplification and filtering, signals whose power and spurious suppression satisfy index requirements are output, and other paths of signals go through more than two frequency dividers whose frequency dividing ratios are close. After frequency mixing is performed on the frequency dividing output of the signals, the frequency converts down to frequency which is consistent with that of a crystal oscillator, and then the signals are fed back to a radio frequency input port of a phase-locked loop (6) chip, so as to achieve a complete phase-lock loop and frequency output with stable voltage-controlled oscillator. Compared with a low-phase noise frequency synthesizer combined with DDS and a phase-locked loop, the low-phase noise frequency synthesizer improves phase noise, and is smaller in size, lower in power consumption, and lower in cost.
Description
Technical field
The utility model relates to a kind of frequency synthesizer, particularly relates to a kind of Frequency Synthesizer with Low Phase Noise be applicable in Modern Communication System and radar communications system.
Background technology
In Modern Communication System and radar system, frequency synthesizer is as the nucleus module of system, the sensitivity of the quality of its performance to receiver, and the resolution of radar, the antijamming capability of system etc. has conclusive effect.The key technical index of frequency source generally is divided into: phase noise, spuious inhibition, frequency switching time, frequency hopping stepping etc.Wherein, the phase noise index is particularly important for radar system.This index is better, and the resolution of radar is just higher, and the target unit that can simultaneously catch is also more, and the ability of resisting various noise jamming is also stronger.Therefore, how to promote the phase noise index of radar system medium frequency source module, be all the problem of an awfully hot door all the time.
In order to realize the frequency synthesizer of low phase noise, traditional implementation has following two kinds: the one, and adopt the mode of phase-locked loop to realize.Because the phase noise of frequency source output frequency is to worsen the negative feedback frequency dividing ratio that 20logN(N is phase-locked loop circuit than the phase noise theory of reference signal), therefore the low phase noise frequency source of realizing by this way need to improve the phase demodulation frequency of phase-locked loop as far as possible, reduce the output frequency of frequency source, and will select to have the reference crystal oscillator of low phase noise as far as possible.Yet such brought cost is also clearly.The phase demodulation frequency that improves phase-locked loop will enlarge the frequency hopping stepping of frequency synthesizer, be difficult to realize the frequency hopping synthesizer of little stepping; The output frequency that reduces frequency source will make frequency synthesizer can not realize X-band and above frequency output; Selection has the more crystal oscillator of low phase noise than common crystal oscillator can increase the cost of frequency source module as a reference greatly.Another one realizes that the method for Frequency Synthesizer with Low Phase Noise is to adopt the DDS(Direct Digital synthetic) with the mode of PHASE-LOCKED LOOP PLL TECHNIQUE combination, directly produce the intermediate-freuqncy signal (being generally tens MHz to hundreds of MHz) of little stepping, low phase noise by DDS, by local oscillation signal (being generally several GHz to tens GHz) mixing with the phase-locked loop generation, last exportable L-band is to the frequency of K wave band frequency range again.Yet the shortcoming of this mode is also a lot, such as the DDS circuit with and the introducing of control circuit will inevitably increase volume, power consumption and the cost of module; In addition, when the frequency that requires output when very high, the image frequency that intermediate-freuqncy signal and local oscillation signal mixing produce from useful radiofrequency signal very close to, so just the radio frequency performance of filter has been proposed to very high requirement.For a source frequently, the also relative comparatively easily design of such radio-frequency filter, but for frequency hopping synthesizer, such radio-frequency filter just has design difficulty very much.
The utility model content
The technical problems to be solved in the utility model is to provide a kind of Frequency Synthesizer with Low Phase Noise, this device is after voltage controlled oscillator 1 output signal, be divided into multiple signals through power splitter 2 more than a minute, a road is after amplification filtering, and power output and spuious inhibition meet the signal of index request.Several signals are respectively through the approaching frequency divider of frequency dividing ratio at least in addition, its frequency division output is after mixing, be down-converted on the frequency consistent with reference crystal oscillator 7, then feed back to the rf inputs mouth of phase-locked loop 6 chips, with the frequency output that realizes that a complete phase-locked loop and voltage controlled oscillator are stable.Compare the Frequency Synthesizer with Low Phase Noise that the mode that combines with DDS and phase-locked loop realizes, improved phase noise, and volume is less, power consumption is less, cost is lower.
The technical solution adopted in the utility model is as follows: a kind of Frequency Synthesizer with Low Phase Noise is characterized in that: comprise connected successively crystal oscillator 7, phase-locked loop 6, loop filter 9, voltage controlled oscillator 1, power splitter 2 and filtering and amplifying circuit 10 more than one minute; Also comprise the single chip machine controlling circuit 8 be connected with phase-locked loop 6; The other several roads output signal that also comprises feedback branch power splitter 2 more than 11, minutes arrives phase-locked loop 6 after feedback branch 11.
As preferably, described feedback branch 11 comprises frequency mixer 5 and at least two frequency dividers.
As preferably, described power splitter more than a minute 2 is one minute three power splitter.
As preferably, described feedback branch 11 comprises the first frequency divider 3, the second frequency divider 4 and frequency mixer 5, the input of the first frequency divider 3 and the second frequency divider 4 is respectively with after two other output of one minute three power splitter 2 is connected, output is connected with two inputs of frequency mixer 5 respectively, and the output of frequency mixer 5 is connected with phase-locked loop 6 again.
As preferably, described two frequency dividers are two frequency dividers that frequency dividing ratio is different.
As preferably, the difference that described two frequency dividers are frequency dividing ratio is less than or equal to two frequency dividers of 50%.
Compared with prior art, the beneficial effects of the utility model are: the frequency synthesizer the utility model proposes is based on phase-locked loop circuit and realizes, compare the Frequency Synthesizer with Low Phase Noise that the mode that combines with DDS and phase-locked loop realizes, improved phase noise, and volume is less, power consumption is less, cost is lower.
The accompanying drawing explanation
Fig. 1 is the utility model principle schematic.
Fig. 2 is the wherein schematic diagram of an embodiment of the utility model.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
Disclosed all features in this specification, except the feature of mutual eliminating, all can combine by any way.
Disclosed arbitrary feature in this specification (comprising any accessory claim, summary and accompanying drawing), unless special narration all can be replaced by other equivalences or the alternative features with similar purpose.That is,, unless special narration, each feature is an example in a series of equivalences or similar characteristics.
Below take phase demodulation frequency 100MHz, output frequency 10GHz(continuous wave) be specifically described as example.
The Frequency Synthesizer with Low Phase Noise of realizing based on phase-locked loop self-mixing technology the utility model proposes.As shown in Figure 1, a kind of Frequency Synthesizer with Low Phase Noise, comprise connected successively crystal oscillator 7, phase-locked loop 6, loop filter 9, voltage controlled oscillator 1, power splitter 2 and filtering and amplifying circuit 10 more than one minute; Also comprise the single chip machine controlling circuit 8 be connected with phase-locked loop 6; The other several roads output signal that also comprises feedback branch power splitter 2 more than 11, minutes arrives phase-locked loop 6 after feedback branch 11.
In this specific embodiment, crystal oscillator 7 is the 100MHz crystal oscillator, and power splitter more than a minute 2 is X-band power splitter more than a minute.
In the phase-locked loop frequency synthesizer of prior art, power splitter more than a minute 2 is one minute three power splitter, and feedback branch 11 is a frequency divider, in this specific embodiment, is the frequency divider of 100 frequency divisions.The operation principle of this frequency synthesizer is: the output signal of voltage controlled oscillator 1, through X-band three power splitter Hou， mono-tunnels, after amplification filtering, power output and spuious inhibition meet the signal of index request.An other road signal is respectively through the frequency divider of 100 frequency divisions, be down-converted on the frequency consistent with reference crystal oscillator 7, then feed back to the rf inputs mouth of phase-locked loop 6 chips, with the frequency output that realizes that a complete phase-locked loop and voltage controlled oscillator are stable.
In the utility model, described feedback branch 11 comprises that frequency mixer 5 reaches the frequency divider of at least two.Several signals are respectively through at least two frequency dividers that frequency dividing ratio is approaching in addition, its frequency division output is after mixing, be down-converted on the frequency consistent with reference crystal oscillator 7, then feed back to the rf inputs mouth of phase-locked loop 6 chips, with the frequency output that realizes that a complete phase-locked loop and voltage controlled oscillator are stable.
In this specific embodiment, described power splitter more than a minute 2 is one minute three power splitter, described feedback branch 11 comprises the first frequency divider 3, the second frequency divider 4 and frequency mixer 5, the input of the first frequency divider 3 and the second frequency divider 4 is respectively with after two other output of one minute three power splitter 2 is connected, output is connected with two inputs of frequency mixer 5 respectively, and the output of frequency mixer 5 is connected with phase-locked loop 6 again.
Described two frequency dividers are two frequency dividers that frequency dividing ratio is different.
The difference that described two frequency dividers are frequency dividing ratio is less than or equal to the ratio of difference and the maximum frequency dividing ratio of 50%(frequency dividing ratio) two frequency dividers.
Take 100MHz crystal oscillator, phase-locked loop chip ADF4002 is reference, during output 10GHz signal, and the implementation method of conventional phase-lock loop circuit.We can draw, in its feedback branch, we need to use the frequency divider of 100 frequency divisions, according to the computing formula (F(all) of phase-locked loop phase noise=F(1)+10logf(ref)+20 logfN) and the end of the phase-locked loop chip ADF4002 parameter (222dBc/Hz@100kHz) of making an uproar, the phase noise of final output signal can be expressed as :-222+10log108+20log100=-102dBc/Hz@100kHz.And if adopt the phase-locked loop self-mixing technology of this specific embodiment as shown in Figure 2 to realize, the frequency dividing ratio of a frequency divider is 20, another frequency divider frequency dividing ratio is 25, the phase noise of output phase is :-222+10log108+20log20+3=-113dBc/Hz@100kHz(is wherein 3 for empirical value, if adopt 25 frequency dividing ratio, this empirical value is smaller).Therefore adopt the frequency synthesizer of phase-locked loop self-mixing technology, compare traditional scheme, its phase noise has improved 11dB.
The difference of the frequency dividing ratio of frequency divider is larger, although institute's its phase noise of result of calculation can improve than a frequency divider, the improvement situation can be fewer, thus frequency divider frequency dividing ratio more approaching better (controlling difference take interior as good 50%), but generally can not equate.
If the output frequency that we need is 10GHz, finally want mixing to obtain 100MHz, just need the output of two frequency dividers to be 50MHz, so just need two frequency dividers that frequency dividing ratio is 200.So seldom, price is also somewhat expensive on market for the frequency divider of high frequency division ratio.If the output frequency that we need certainly is 1GHz, so just can all use the frequency divider that frequency dividing ratio is 20 by two frequency dividers, can realize like this.Thus, be not fully can not be the same by frequency dividing ratio frequency divider, but as it may chance, be not whenever can use, " generally can not equate " thus.
Claims (6)
1. a Frequency Synthesizer with Low Phase Noise, is characterized in that: comprise connected successively crystal oscillator (7), phase-locked loop (6), loop filter (9), voltage controlled oscillator (1), power splitter more than a minute (2) and filtering and amplifying circuit (10); Also comprise the single chip machine controlling circuit (8) be connected with phase-locked loop (6); Also comprise feedback branch (11), other several roads output signal of power splitter more than a minute (2) arrives phase-locked loop (6) after feedback branch (11).
2. a kind of Frequency Synthesizer with Low Phase Noise according to claim 1 is characterized in that: described feedback branch (11) comprises frequency mixer (5) and at least two frequency dividers.
3. a kind of Frequency Synthesizer with Low Phase Noise according to claim 2, it is characterized in that: described power splitter more than a minute (2) is one minute three power splitter.
4. a kind of Frequency Synthesizer with Low Phase Noise according to claim 3, it is characterized in that: described feedback branch (11) comprises the first frequency divider (3), the second frequency divider (4) and frequency mixer (5), the input of the first frequency divider (3) and the second frequency divider (4) respectively with one minute three power splitters (2) two other output be connected after, output is connected with two inputs of frequency mixer (5) respectively, and the output of frequency mixer (5) is connected with phase-locked loop (6) again.
5. a kind of Frequency Synthesizer with Low Phase Noise according to claim 4, it is characterized in that: described two frequency dividers are two frequency dividers that frequency dividing ratio is different.
6. a kind of Frequency Synthesizer with Low Phase Noise according to claim 4, it is characterized in that: the difference that described two frequency dividers are frequency dividing ratio is less than or equal to two frequency dividers of 50%.
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| CN 201320399079 CN203352563U (en) | 2013-07-05 | 2013-07-05 | Low-phase noise frequency synthesizer |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108988857A (en) * | 2018-10-19 | 2018-12-11 | 贵州航天计量测试技术研究所 | A kind of broadband low phase noise frequency synthesizer and method based on optical-electronic oscillator |
| CN109120259A (en) * | 2018-08-06 | 2019-01-01 | 西安众思创融电子科技有限公司 | A kind of ultra-fine stepping low phase noise superelevation spurious reduction frequency source of small size |
| CN110545076A (en) * | 2019-09-10 | 2019-12-06 | 河北晶硕电子科技有限公司 | method for improving frequency stability of quartz crystal oscillator |
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2013
- 2013-07-05 CN CN 201320399079 patent/CN203352563U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109120259A (en) * | 2018-08-06 | 2019-01-01 | 西安众思创融电子科技有限公司 | A kind of ultra-fine stepping low phase noise superelevation spurious reduction frequency source of small size |
| CN108988857A (en) * | 2018-10-19 | 2018-12-11 | 贵州航天计量测试技术研究所 | A kind of broadband low phase noise frequency synthesizer and method based on optical-electronic oscillator |
| CN108988857B (en) * | 2018-10-19 | 2023-07-07 | 贵州航天计量测试技术研究所 | Broadband low-phase-noise frequency synthesizer and method based on photoelectric oscillator |
| CN110545076A (en) * | 2019-09-10 | 2019-12-06 | 河北晶硕电子科技有限公司 | method for improving frequency stability of quartz crystal oscillator |
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