CN202978896U

CN202978896U - Combined broadband rapid frequency hopping source

Info

Publication number: CN202978896U
Application number: CN 201220590949
Authority: CN
Inventors: 王瑞耀; 陈明和
Original assignee: ZHONGKE FEIHONG SCIENCE AND TECHNOLOGY Co Ltd BEIJING
Current assignee: ZHONGKE FEIHONG SCIENCE AND TECHNOLOGY Co Ltd BEIJING
Priority date: 2012-11-09
Filing date: 2012-11-09
Publication date: 2013-06-05
Anticipated expiration: 2022-11-09

Abstract

The present utility model discloses a combined broadband rapid frequency hopping source. The source comprises a constant temperature crystal oscillator, a fifth phase-locked loop, a frequency synthesizer, a seventh filter and a sixth phase-locked loop which are successively connected, an output end of the sixth phase-locked loop is connected with a band pass filter, the frequency hopping time of the frequency hopping source is enhanced, the circuit design is simplified, the device volume is reduced, and product miniaturization can be realized.

Description

Combination broadband Fast Frequency Hopping Synthesizers

Technical field

The utility model relates to a kind of microwave technology, relates in particular to a kind of Hopping time less than the combination broadband Fast Frequency Hopping Synthesizers of 2us.

Background technology

In microwave technical field, frequency source always is an important core component.Frequency hopping synthesizer is a kind of frequency frequency source of saltus step within the specific limits, can be used for secure communication, in the technology such as radar.For the ease of the saltus step of control frequency, usually adopt the DDS(Direct Digital Frequency Synthesizers in frequency hopping synthesizer, be called for short frequency synthesizer) and the PLL(phase-locked loop) circuit makes up, the formation frequency hopping synthesizer.What DDS adopted is digital structure, and in very many-sided performance index legacy frequencies synthetic technology head and shoulders above, it has high frequency resolution; Frequency switching time, can reach the microsecond magnitude fast.Be suitable for very much in the frequency hopping synthesizer technology.

Prior art frequency hopping synthesizer circuit structure as shown in Figure 1, the compositional model that this circuit adopts PLL to connect with DDS.By formations such as constant-temperature crystal oscillator (OCXO), the first phase-locked loop (PLL1), frequency synthesizer (DDS), the first filter, the second filter, the 3rd filter, the 4th filter, the 5th filter, the 6th filter, the second phase-locked loop (PLL2), the 3rd phase-locked loop (PLL3), the 4th phase-locked loop (PLL4), power splitter, switch and frequency mixers.This routine article one frequency branch road of the first phase-locked loop and frequency synthesizer formation in sequential series; Constant-temperature crystal oscillator (OCXO) and the series connection of the second phase-locked loop (PLL2) order consist of this routine second frequency branch road; Constant-temperature crystal oscillator (OCXO) and the series connection of the 3rd phase-locked loop (PLL3) order consist of the 3rd the frequency branch road of this example; Constant-temperature crystal oscillator (OCXO) and the series connection of the 4th phase-locked loop (PLL4) order consist of the 4th the frequency branch road of this example.The 100MHz signal input PLL1 of OCXO output, the 1GHz signal of PLL1 output is as the DDS reference, obtain frequency signal through DDS output again, be divided into three road input mixers through power splitter again, another frequency is propped up route PLL2 and is consisted of, and the 100MHz signal of OCXO output is three road signal input mixers through PLL2, PLL3, PLL4 frequency conversion; It is required frequency that No. three frequency mixer outputs are closed the road through switch again.

The circuit structure of above-mentioned prior art is complicated, and the frequency bandwidth of DDS output is certain, so the bandwidth in fast frequency hopping rate source is wider, the way of mixing is just more, and volume is also just larger, is unfavorable for the miniaturization of system.

Summary of the invention

The purpose of this utility model be to provide a kind of simple in structure, volume is little, phase noise index and the high combination broadband Fast Frequency Hopping Synthesizers of spuious inhibition index.

Combination of the present utility model broadband Fast Frequency Hopping Synthesizers comprises the constant-temperature crystal oscillator, the 5th phase-locked loop, frequency synthesizer, the 7th filter, the 6th phase-locked loop that connect successively, and the output of described the 6th phase-locked loop is connected with band pass filter.

Can be found out by the technical scheme that above-mentioned the utility model provides, combination of the present utility model broadband Fast Frequency Hopping Synthesizers, owing to comprising constant-temperature crystal oscillator, the 5th phase-locked loop, frequency synthesizer, the 7th filter, the 6th phase-locked loop that connects successively, the output of the 6th phase-locked loop is connected with band pass filter, improved frequency hopping synthesizer Hopping time, simplified circuit design, reduction means volume, promoted the miniaturization of product.

Description of drawings

Fig. 1 is the frequency hopping synthesizer electrical block diagram of prior art;

Fig. 2 is the structural representation of the combination broadband Fast Frequency Hopping Synthesizers of the utility model embodiment.

In figure: 1, the first filter, the 2, second filter, the 3, the 3rd filter, the 4, the 4th filter, the 5, the 5th filter, the 6, the 6th filter, the 7, the 7th filter, the 8, the 8th filter, 9,10, power splitter, 11, switch.

Embodiment

The below will be described in further detail the utility model embodiment.

Combination of the present utility model broadband Fast Frequency Hopping Synthesizers, its better embodiment is:

Comprise the constant-temperature crystal oscillator, the 5th phase-locked loop, frequency synthesizer, the 7th filter, the 6th phase-locked loop that connect successively, the output of described the 6th phase-locked loop is connected with band pass filter.

Described frequency synthesizer adopts the DDS chip of ADI company.

Described DDS chip is AD9858.

Described the 6th phase-locked loop comprises phase discriminator, operational amplifier, and described phase discriminator adopts the phase demodulation chip HMC440QS16 of Hittite company, and described operational amplifier adopts high speed operation amplifier OPA820.

Combination frequency hopping synthesizer of the present utility model has changed the tactic pattern of prior art frequency hopping synthesizer, and the tactic pattern that adopts phase-locked loop directly to export has been simplified circuit structure, realized miniaturization.

Specific embodiment:

This example makes up the frequency hopping synthesizer circuit structure as shown in Figure 2, by formations such as constant-temperature crystal oscillator (OCXO), the 5th phase-locked loop (PLL1), frequency synthesizer (DDS), the 7th filter, the 6th phase-locked loop (PLL2), the 8th filters.This routine frequency branch road of the 5th phase-locked loop, frequency synthesizer and the 6th phase-locked loop formation in sequential series.

The 100MHz signal input PLL1 of OCXO output, the 1GHz signal of PLL1 output obtains 230～280MHz signal through DDS, and this signal is through PLL2 frequency multiplication to 1.4～1.6GHz frequency range input the 7th filter.Output is connected with band pass filter (the 8th filter), and can the filtering band outer interference signal further improves signal quality.

In the present embodiment, the DDS chip adopts the AD9858 of ADI company.In order further to improve the frequency hopping synthesizer performance, the phase discriminator HMC440QS16 in the 6th phase-locked loop, operational amplifier employing high speed operation amplifier OPA820.

The circuit of the circuit of prior art shown in Figure 1 and embodiment of the present utility model shown in Figure 2 compares:

Output phase noise+20logN of phase noise: in Fig. 2 circuit, can be expressed as: DDS, wherein N is the frequency multiplication number of times of PLL6.The frequency multiplication times N 2 of PLL6 is: 5.4G/100M=54, the phase noise of Fig. 2 circuit output is :-130+20logN2=-95dBc.

Compare with Fig. 1 circuit, Fig. 2 reference signal is directly linked PLL5, and Fig. 1 reference signal needs merit to divide, and makes reference then for respectively PLL1, PLL2, PLL3 and PLL4, makes circuit structure more complicated.Fig. 2 has reduced the use of power splitter in the circuit, has simplified circuit design, is conducive to the volume of reduction system;

Compare with Fig. 1 circuit, Fig. 1 circuit need to be divided into three road signals with frequency synthesis (DDS) output work, has increased many circuit; Fig. 2 signal is directly phase-locked through the 8th filter output through PLL6, has reduced circuit greatly, makes circuit simpler, more easily realizes, is conducive to the volume of reduction system;

Fig. 2 circuit signal is directly through the 6th phase-locked loop (PLL6), the 8th filter output; Fig. 1 three road signal demands obtain required frequency through the frequency conversion of No. three frequency mixers.Two figure compare, and Fig. 2 has reduced the use of frequency mixer, has reduced a lot of additional circuits and has made circuit simpler;

Fig. 2 circuit and Fig. 1 circuit compare, and Fig. 2 circuit does not use switching circuit, and the control circuit of Simultaneous Switching does not exist yet, and the control of power supply will be simpler, is conducive to the volume of reduction system;

The phase discriminator chip that uses in Fig. 2 circuit is HMC440QS16, so just can reduce the use of frequency divider in the PLL2 feedback control loop, has simplified design, is conducive to the volume of reduction system;

Simplify design, realized miniaturization;

The programming of AD4113 etc. can only realize with controller (single-chip microcomputer, FPGA etc.), due to the use of these devices, has increased greatly volume and the design difficulty of system, has reduced reliability.And HMC440QS16 can adopt Direct Programming pattern (namely programming by the high-low level that respective pins is set), has simplified greatly design, has significantly dwindled the volume of system, has increased the reliability of system.

The above; it is only the better embodiment of the utility model; but protection range of the present utility model is not limited to this; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; the variation that can expect easily or replacement are within all should being encompassed in protection range of the present utility model.Therefore, protection range of the present utility model should be as the criterion with the protection range of claims.

Claims

1. one kind is made up the broadband Fast Frequency Hopping Synthesizers, it is characterized in that, comprises the constant-temperature crystal oscillator, the 5th phase-locked loop, frequency synthesizer, the 7th filter, the 6th phase-locked loop that connect successively, and the output of described the 6th phase-locked loop is connected with band pass filter.

2. combination according to claim 1 broadband Fast Frequency Hopping Synthesizers, is characterized in that, described frequency synthesizer adopts the DDS chip of ADI company.

3. combination according to claim 2 broadband Fast Frequency Hopping Synthesizers, is characterized in that, described DDS chip is AD9858.

4. according to claim 1,2 or 3 described combination broadband Fast Frequency Hopping Synthesizers, it is characterized in that, described the 6th phase-locked loop comprises phase discriminator, operational amplifier, described phase discriminator adopts the phase demodulation chip HMC440QS16 of Hittite company, and described operational amplifier adopts high speed operation amplifier OPA820.