CN202651104U - 48 row lead wire framework - Google Patents
48 row lead wire framework Download PDFInfo
- Publication number
- CN202651104U CN202651104U CN 201220285202 CN201220285202U CN202651104U CN 202651104 U CN202651104 U CN 202651104U CN 201220285202 CN201220285202 CN 201220285202 CN 201220285202 U CN201220285202 U CN 201220285202U CN 202651104 U CN202651104 U CN 202651104U
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- CN
- China
- Prior art keywords
- row
- framework
- utility
- model
- lead wire
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
The present utility model relates to a lead wire framework, especially to a 48 row lead wire framework. The framework is provided with 48 rows of welding area from the top to the bottom for placing transistors, each row of the 48 rows of welding areas is provided with 268 units for placing transistors, and the 268 units for placing the transistors of each row are arranged on the same horizontal level of the framework. Product density is increased, production efficiency is enhanced, and costs are reduced.
Description
Technical field
The utility model relates to a kind of lead frame, particularly relates to a kind of 48 row lead frames.
Background technology
Lead frame is as the chip carrier of integrated circuit, it is a kind of electrical connection that realizes chip internal circuit exit and outer lead by means of bonding gold wire, form the key structure spare of electric loop, it has played the function served as bridge that is connected with outer lead, all needing to use lead frame in the semiconductor integrated block of the overwhelming majority, is basic material important in the electronics and information industry.Present lead frame product, place each bar of transistorized unit such as/7776 of the rows of 36 on the market, this lead frame has 36 rows, has 108 to place transistorized unit on every row, this lead frame length is 185mm, width is 53mm, and this product density is low, causes production efficiency low, production cost is high, in addition, the product of present poor efficiency, its wasting of resources that consumes is large.Growth along with the market consumption, present equipment and the design productivity of product can not need by satisfying the market, need to improve the effective rate of utilization of product, along with the raising of production cost and labour costs, be faced with price pressure, need to reduce production costs by technique improvement.
The utility model content
Goal of the invention of the present utility model is: for the problem of above-mentioned existence, provide 48 row lead frames that a kind of density is large, cost is low.
In order to achieve the above object, the utility model adopts following technical scheme:
A kind of 48 row lead frames, described framework is arranged with from top to bottom 48 dischargings and puts transistorized welding region, the every row of described 48 row's welding regions has 268 to place transistorized unit, places transistorized unit and is positioned on the same level line of framework for 268 on described every row.
Described lengths of frame is 250 ± 0.1mm, and width is 70 ± 0.05mm.
Lead frame in the utility model is placed each bar of transistorized unit by/7776 traditional of 36 rows and is brought up to each bar of/12864 transistorized unit of placement of 48 rows, like this, has increased the density of product, and then has enhanced productivity, and has reduced cost.
In sum, owing to adopted technique scheme, the beneficial effects of the utility model are:
1, increases framework density, improve device efficiency, reduce cost;
2, enhance productivity, the device efficiency .Molding of leading portion raising 30% improves 2 times efficient;
3, cost, framework cost 25%, Compound cost 15%;
4, improve resource utilization, the framework utilance improves 30%, Compound consumption and reduces by 20%.
Description of drawings
Fig. 1 is structural representation of the present utility model.
Fig. 2 is the enlarged drawing of regional A among Fig. 1.
Fig. 3 is the partial enlarged drawing of Fig. 2.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in detail.
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explaining the utility model, and be not used in restriction the utility model.
Embodiment
Fig. 1 is the structural representation of 48 row lead frames of present embodiment, and 4 zones are arranged among the figure, is respectively regional A, B, C and D, and Fig. 2 is the enlarged drawing of regional A among Fig. 1.The structure of regional B, C and D is the same with regional A among Fig. 1.48 row SOD882(SOD882 of present embodiment are the titles of the packing forms of miniature electric components and parts) lead frame is arranged with from top to bottom 48 dischargings and puts transistorized welding region, the every row of described 48 row's welding regions has 268 to place transistorized unit, places transistorized unit and is positioned on the same level line of framework for 268 on described every row.Described lengths of frame is 250 ± 0.1mm, and width is 70 ± 0.05mm.
When the utility model density improved, leading portion need to prevent the framework oxidation and guarantee soldering reliability, and remove on request unnecessary waste material in rear operation.
The above only is preferred embodiment of the present utility model; not in order to limit the utility model; all any modifications of within spirit of the present utility model and principle, doing, be equal to and replace and improvement etc., all should be included within the protection range of the present utility model.
Claims (2)
1. row lead frame, it is characterized in that, described framework is arranged with from top to bottom 48 dischargings and puts transistorized welding region, and the every row of described 48 row's welding regions has 268 to place transistorized unit, places transistorized unit and is positioned on the same level line of framework for 268 on described every row.
2. 48 row lead frames according to claim 1 is characterized in that, described lengths of frame is 250 ± 0.1mm, and width is 70 ± 0.05mm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201220285202 CN202651104U (en) | 2012-06-18 | 2012-06-18 | 48 row lead wire framework |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201220285202 CN202651104U (en) | 2012-06-18 | 2012-06-18 | 48 row lead wire framework |
Publications (1)
Publication Number | Publication Date |
---|---|
CN202651104U true CN202651104U (en) | 2013-01-02 |
Family
ID=47420166
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 201220285202 Expired - Fee Related CN202651104U (en) | 2012-06-18 | 2012-06-18 | 48 row lead wire framework |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN202651104U (en) |
-
2012
- 2012-06-18 CN CN 201220285202 patent/CN202651104U/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130102 Termination date: 20170618 |
|
CF01 | Termination of patent right due to non-payment of annual fee |