CN205140956U - DFN1610 -2L -A chip frame - Google Patents
DFN1610 -2L -A chip frame Download PDFInfo
- Publication number
- CN205140956U CN205140956U CN201520959829.4U CN201520959829U CN205140956U CN 205140956 U CN205140956 U CN 205140956U CN 201520959829 U CN201520959829 U CN 201520959829U CN 205140956 U CN205140956 U CN 205140956U
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- CN
- China
- Prior art keywords
- chip
- unit
- frame
- dfn1610
- framework
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- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model relates to a chip the take up frame, concretely relates to DFN1610 -2L -A chip frame, including the frame that is used for the take up chip, frame length is 250 0.1mm, and the width is 70 0.05mm, the frame is equallyd divide for four unit A, B, C and D by many cell compartment grooves rather than width direction parallel arrangement, has arranged 45, 32 rows individualistic install the chip units in every unit, shape and the size and the encapsulation form DFN1610 -2L -A corresponding match of install the chip unit, the length direction of install the chip unit and the width direction parallel arrangement of frame, every the install the chip unit includes the negative pole installation department that is used for installing chip anodal positive pole installation department and installation chip negative pole, and the area of positive pole installation department and negative pole installation department equals that behind the messenger install the chip, partial chip is in outside the positive pole installation department. This install the chip frame arranges rationally, can effectively utilize chip frame's area for big, the reduction comprehensive cost of density of its install the chip unit of arranging.
Description
Technical field
The utility model relates to a kind of chip and takes up frame, particularly a kind of DFN1610-2L-A chi frame.
Background technology
Chi frame is as the chip carrier of integrated circuit, it is a kind of electrical connection realizing chip internal circuits exit and outer lead by means of bonding gold wire, form the key structure part of electric loop, it serves the function served as bridge be connected with outer lead, all needing in the semiconductor integrated block of the overwhelming majority to use chi frame, is basic material important in electronics and information industry.The chip packaging unit model of chip package form to be DFN1610-2L-A(DFN be miniature electric components and parts, 2L represents that the chip that chip mount unit is installed is provided with 2 pins, 1610 represent that chip mount unit is of a size of long 1.6mm, wide 1.0mm) time, more chip to be arranged in identical chi frame size, just need to carry out appropriate design to arrangement form.
As current chi frame product, DFN251020 on market arranges/1120 chi frames, and this chi frame of every bar has 20 rows, often row has 56 transistors, this chi frame length is 252mm, width is 78mm, when chi frame size is fixing, can only arrange 1120 packaged chips, such arrangement product density is low, cause production efficiency low, production cost is high, is the product of poor efficiency.Along with the growth of market consumption, current equipment and the design productivity of product can not meet market demand, need to improve the effective rate of utilization of product, along with the raising of production cost and labour costs, it may be necessary technique improvement and reduce production cost.
Utility model content
Goal of the invention of the present utility model is: exist the irrational situation of the arrangement form of chip when frame size is fixed for existing chi frame, cause the problem that the utilance of chi frame is low, a kind of DFN1610-2L-A chi frame is provided, this chi frame connection and reasonable arrangement, effectively utilize the area of chi frame, the density of the chip mount unit that it is arranged is large, reduce integrated cost.
To achieve these goals, the technical solution adopted in the utility model is:
A kind of DFN1610-2L-A chi frame, comprise the framework for taking up chip, described lengths of frame is 250 ± 0.1mm, width is 70 ± 0.05mm, described framework is divided into four unit A by many unit separation troughs be arranged in parallel with its Width, B, C and D, 45 row are furnished with in each unit, the chip mount unit that 32 rows are single, the shape and size of described chip mount unit and packing forms DFN1610-2L-A Corresponding matching, the length direction of described chip mount unit and the Width of framework are arranged in parallel, each described chip mount unit comprises the negative electrode installation portion of anode installation portion for chip anode and chip negative electrode, and the area equation of anode installation portion and negative electrode installation portion, after chip is installed, segment chip is in outside anode installation portion.
Size due to the chip mount unit of DFN1610-2L-A model is fixing 1.6*1.0mm, therefore when frame size is fixing, reasonably contribute to improving framework utilance to frame welding regional compartmentalization, this chi frame is divided into four identical regions along lengths of frame direction, often row can arrange the chip mount unit of 180 chip placements, arranges 1440 chip mount unit in so each region, the length of this framework is 250mm, wide is 70mm, and be arranged in parallel due to the length direction of chip mount unit and the Width of framework, the frame space that so chip mount unit takies altogether is: long 180*1.0=180mm, wide 32*1.6=51.2, can be A, B, C, unit separation trough between D region and frame edge reserve enough sizes, can arrange that 5760 models are the chip mount unit of DFN1610-2L-A on the frame, greatly improve the utilance of framework, effectively utilize the area of chi frame, make the density of the chip mount unit of layout large, reduce integrated cost, and the anode installation portion of chip mount unit and the area of negative electrode installation portion are arranged to equal area, and after making chip install, segment chip is in outside anode installation portion, is convenient to take off chip.
As preferred version of the present utility model, the quantity of the every bar unit separation trough between described A, B, C and D unit is 6, and the groove width of each unit separation trough is 4mm, length is 8mm.Unit separation trough for segmentation framework is convenient to the use of chip, in use, by unit separation trough, whole piece is equipped with the framework of chip separately, is convenient to the cutting operation of one single chip; Meanwhile, the groove width of each unit separation trough is 4mm, length is 8mm, and the size of the overall dimensions and chip mount unit that meet framework arranges demand, is conducive to improving framework utilance.
As preferred version of the present utility model, interval 8mm between four unit on framework is 8mm near the A unit of frame edge and the distance of D unit and frame.Such cloth postpone, total chip mount unit adds the spacing distance between four unit, and the framework taken is long to be of a size of: 180+3*8+2*8=220mm, is less than 250mm, meets arrangement requirement.
As preferred version of the present utility model, four angles of each chip mount unit are provided with cutting location notch.Be convenient to the use after chip is arranged on framework, easily can cut out one single chip, reduce wafer damage.
As preferred version of the present utility model, the groove width of described cutting location notch is 0.1mm.The groove width of the cutting location notch arranged between every two chip mount unit takies 0.1mm, makes total chip mount unit can make full use of the space of framework, and meets layout quantity demand.
In sum, owing to have employed technique scheme, the beneficial effects of the utility model are:
1, because the size of the chip mount unit of DFN1610-2L-A model is fixing 1.6*1.0mm, therefore when frame size is fixing, reasonably contribute to improving framework utilance to frame welding regional compartmentalization, this chi frame is divided into four identical regions along lengths of frame direction, often row can arrange the chip mount unit of 180 chip placements, arranges 1440 chip mount unit in so each region, the length of this framework is 250mm, wide is 70mm, and be arranged in parallel due to the length direction of chip mount unit and the Width of framework, the frame space that so chip mount unit takies altogether is: long 180*1.0=180mm, wide 32*1.6=51.2, can be A, B, C, unit separation trough between D region and frame edge reserve enough sizes, can arrange that 5760 models are the chip mount unit of DFN1610-2L-A on the frame, greatly improve the utilance of framework, effectively utilize the area of chi frame, make the density of the chip mount unit of layout large, reduce integrated cost, and the anode installation portion of chip mount unit and the area of negative electrode installation portion are arranged to equal area, and after making chip install, segment chip is in outside anode installation portion, is convenient to take off chip,
2, on four angles of each chip mount unit, be provided with cutting location notch, be convenient to the use after chip is arranged on framework, easily can cut out one single chip, reduce wafer damage.
Accompanying drawing explanation
Fig. 1 is the structural representation of the utility model DFN1610-2L-A chi frame.
Fig. 2 is the structural representation of A unit in Fig. 1.
The partial enlarged drawing of F part in Fig. 3 Fig. 2.
Fig. 4 is the structural representation of Fig. 3 chips installation unit.
Fig. 5 is the structural representation after chip mount unit chip.
Mark in figure: 1-framework, 101-chip mount unit, 102-cuts location notch, 103-negative electrode installation portion, 104-anode installation portion, 2-unit separation trough, 3-chip.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in detail.
In order to make the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
Embodiment
This chi frame is used for the layout of transistor chip by the present embodiment, as Figure 1-Figure 5, the DFN1610-2L-A chi frame of the present embodiment, comprise the framework 1 for taking up chip, described framework 1 length is 250 ± 0.1mm, width is 70 ± 0.05mm, described framework 1 is divided into four unit A by many unit separation troughs 2 be arranged in parallel with its Width, B, C and D, 45 row are furnished with in each unit, the chip mount unit 101 that 32 rows are single, the shape and size of described chip mount unit 101 and packing forms DFN1610-2L-A Corresponding matching, the length direction of described chip mount unit 101 and the Width of framework 1 are arranged in parallel, each chip mount unit 101 comprises the negative electrode installation portion 103 of anode installation portion 104 for chip anode and chip negative electrode, and the area equation of anode installation portion 104 and negative electrode installation portion 103, after chip 3 is installed, segment chip is in outside anode installation portion 104.
In the present embodiment, the quantity of the every bar unit separation trough 2 between described A, B, C and D unit is 6, and the groove width of each unit separation trough 2 is 4mm, length is 8mm.Unit separation trough for segmentation framework is convenient to the use of chip, in use, by unit separation trough, whole piece is equipped with the framework of chip separately, is convenient to the cutting operation of one single chip; Meanwhile, the groove width of each unit separation trough is 4mm, length is 8mm, and the size of the overall dimensions and chip mount unit that meet framework arranges demand, is conducive to improving framework utilance.
In the present embodiment, interval 8mm between four unit on framework 1 is 8mm near the A unit at framework 1 edge and the distance of D unit and frame.Such cloth postpone, total chip mount unit adds the spacing distance between four unit, and the framework taken is long to be of a size of: 180+3*8+2*8=220mm, is less than 250mm, meets arrangement requirement.
In the present embodiment, four angles of each chip mount unit 101 are provided with cutting location notch 102.Be convenient to the use after chip is arranged on framework, easily can cut out one single chip, reduce wafer damage.
In the present embodiment, the groove width of described cutting location notch 102 is 0.1mm.The groove width of the cutting location notch arranged between every two chip mount unit takies 0.1mm, makes total chip mount unit can make full use of the space of framework, and meets layout quantity demand.
The present embodiment takes up transistor chip density and improves simultaneously, and front-end-of-line will ensure soldering reliability, and in rear operation, should be noted that the problem such as the molding powder string pendulum that solution high density is brought and tablet cutting.
To sum up, the chi frame of the present embodiment, size due to the chip mount unit of DFN1610-2L-A model is fixing 1.6*1.0mm, therefore when frame size is fixing, reasonably contribute to improving framework utilance to frame welding regional compartmentalization, this chi frame is divided into four identical regions along lengths of frame direction, often row can arrange the chip mount unit of 180 chip placements, arranges 1440 chip mount unit in so each region, the length of this framework is 250mm, wide is 70mm, and be arranged in parallel due to the length direction of chip mount unit and the Width of framework, the frame space that so chip mount unit takies altogether is: long 180*1.0=180mm, wide 32*1.6=51.2, can be A, B, C, unit separation trough between D region and frame edge reserve enough sizes, can arrange that 5760 models are the chip mount unit of DFN1610-2L-A on the frame, greatly improve the utilance of framework, effectively utilize the area of chi frame, make the density of the chip mount unit of layout large, reduce integrated cost, and the anode installation portion of chip mount unit and the area of negative electrode installation portion are arranged to equal area, and after making chip install, segment chip is in outside anode installation portion, is convenient to take off chip.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all do within spirit of the present utility model and principle any amendment, equivalent to replace and improvement etc., all should be included within protection range of the present utility model.
Claims (5)
1. a DFN1610-2L-A chi frame, comprise the framework for taking up chip, described lengths of frame is 250 ± 0.1mm, width is 70 ± 0.05mm, it is characterized in that, described framework is divided into four unit A by many unit separation troughs be arranged in parallel with its Width, B, C and D, 45 row are furnished with in each unit, the chip mount unit that 32 rows are single, the shape and size of described chip mount unit and packing forms DFN1610-2L-A Corresponding matching, the length direction of described chip mount unit and the Width of framework are arranged in parallel, each described chip mount unit comprises the negative electrode installation portion of anode installation portion for chip anode and chip negative electrode, and the area equation of anode installation portion and negative electrode installation portion, after chip is installed, segment chip is in outside anode installation portion.
2. DFN1610-2L-A chi frame according to claim 1, is characterized in that, the quantity of the every bar unit separation trough between described A, B, C and D unit is 6, and the groove width of each unit separation trough is 4mm, length is 8mm.
3. DFN1610-2L-A chi frame according to claim 2, is characterized in that, interval 8mm between four unit on framework, is 8mm near the A unit of frame edge and the distance of D unit and frame.
4. DFN1610-2L-A chi frame according to claim 3, is characterized in that, four angles of each chip mount unit are provided with cutting location notch.
5. DFN1610-2L-A chi frame according to claim 4, is characterized in that, the groove width of described cutting location notch is 0.1mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520959829.4U CN205140956U (en) | 2015-11-27 | 2015-11-27 | DFN1610 -2L -A chip frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520959829.4U CN205140956U (en) | 2015-11-27 | 2015-11-27 | DFN1610 -2L -A chip frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205140956U true CN205140956U (en) | 2016-04-06 |
Family
ID=55626721
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520959829.4U Expired - Fee Related CN205140956U (en) | 2015-11-27 | 2015-11-27 | DFN1610 -2L -A chip frame |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205140956U (en) |
-
2015
- 2015-11-27 CN CN201520959829.4U patent/CN205140956U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160406 Termination date: 20171127 |