CN202309754U

CN202309754U - High-speed signal data processing system

Info

Publication number: CN202309754U
Application number: CN201120442658XU
Authority: CN
Inventors: 祝广涛
Original assignee: BEIJING SEASTARS TECHNOLOGY Co Ltd
Current assignee: BEIJING SEASTARS TECHNOLOGY Co Ltd
Priority date: 2011-11-10
Filing date: 2011-11-10
Publication date: 2012-07-04
Anticipated expiration: 2021-11-10

Abstract

The utility model provides a high-speed signal data processing system, comprising computation modules and a switching module, each computation module is provided with two or four PowerPC computation nodes and is connected with a low-latency SRIO (Serial RapidIO) exchange switch, the switching module provides a data exchange function from 18 SRIOs and 18 gigabit ethernets to a load and supports SRIO high speed data transmission with the speed of 12.5Gbps, and a data input and output end of each computation module is connected with a data input and output end of the switching module. Due to the connection of the computation module with the PowerPC computation nodes and an SRIO exchange switch and the switching module which provides the data exchange function from 18 SRIOs and 18 gigabit Ethernets to the load and supports SRIO high speed data transmission with the speed of 12.5Gbps disclosed by the utility model, the flexible expandability, higher bandwidth and the high-density computing capacity are provided to an embedded system.

Description

The high speed signal data handling system

Technical field

The utility model relates to the high speed signal data handling system, belongs to the embedded system technology field.

Background technology

At present domestic still do not have meet VITA41 (VXS) and VITA65 (OPENVPX) standard and support the extensive high-performance embedded system that SRIO is interconnected; And there be upgrading performance underaction, the available bandwidth of system and the relatively poor problem of high density computing capability can expanded in existing embedded system; Along with data volume sharply increases and the fast lifting of the real-time processing speed brought, existing high-speed data treatment system is used in fields such as radar, sonars and can't be met the demands.

Summary of the invention

The utility model provides the high speed signal data handling system; To solve the upgrading expanded performance underaction, the available bandwidth of system and the relatively poor problem of high density computing capability that existing embedded system exists, the utility model adopts following technical scheme for this reason:

The high speed signal data handling system; Comprise computing module and Switching Module; Each said computing module has 2 or 4 PowerPC computing nodes and is connected with the low SRIO of a delay alteration switch; Said Switching Module provide 18 road SRIO and 18 road gigabit Ethernets to load data exchanging function and support 12.5Gbps SRIO high speed data transfer, the data input/output terminal of said computing module is connected with the data input/output terminal of said Switching Module.

The computing module of the technical scheme that the utility model provides through having PowerPC computing node and SRIO alteration switch is with the data exchanging function that provides 18 road SRIO and 18 road gigabit Ethernets to load and support the Switching Module of 12.5Gbps SRIO high speed data transfer to be connected; For embedded system provides extensibility and higher bandwidth and high density computing capability flexibly, the cover integrating and developing platform of technology such as a cover collection parallel computation, SRIO exchanges data, multiprocessor for core proposed.

Description of drawings

In order to be illustrated more clearly in the technical scheme of the utility model embodiment; The accompanying drawing of required use is done to introduce simply in will describing embodiment below; Obviously, the accompanying drawing in describing below only is some embodiment of the utility model, for those of ordinary skills; Under the prerequisite of not paying creative work property, can also obtain other accompanying drawing according to these accompanying drawings.

Fig. 1 is the structural representation of the high speed signal data handling system that provides of the embodiment of the utility model;

Fig. 2 is the structural representation of the MPC6210 computing module that provides of the embodiment of the utility model;

Fig. 3 is the structural representation of the MPC6410 computing module that provides of the embodiment of the utility model;

Fig. 4 is the structural representation of the HSW6000 Switching Module that provides of the embodiment of the utility model.

Embodiment

To combine the accompanying drawing among the utility model embodiment below, the technical scheme among the utility model embodiment is carried out clear, intactly description, obviously, described embodiment only is the utility model part embodiment, rather than whole embodiment.Based on the embodiment in the utility model, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the utility model protection.

The embodiment of the utility model provides the high speed signal data handling system; As shown in Figure 1; Comprise computing module 1 and Switching Module 2; Each said computing module 1 has 2 or 4 PowerPC computing nodes and is connected with a low SRIO alteration switch that postpones to walk abreast; Said Switching Module 1 provide 18 road SRIO and 18 road gigabit Ethernets to load data exchanging function and support 12.5Gbps SRIO high speed data transfer, the data input/output terminal of said computing module 1 is connected with the data input/output terminal of said Switching Module 2.

Concrete, the disposal ability of the high speed signal data handling system that this embodiment provides is realized by high bulk density (HCD) module (being the computing module 1 in this embodiment).Each computing module 1 has 2/4 PowerPC computing node, is connected with a low SRIO alteration switch that postpones.Each computing node comprises a 1.06GHz PowerPC8640D or 1.33GHz MPC8641D PowerPC, the DDR SDRAM of 2G, 1 road high speed serialization RapidIO interface, 1 road PCIe interface.

The structure of MPC6210 computing module is as shown in Figure 2, is that the 6U size that meets the OpenVPX standard is calculated plate, also compatible simultaneously VPX standard.This module is the computing module of a kind of pair of PowerPC 8640D/8641D processor design; Plate carries two PMC/XMC slots can realize I/O expansion flexibly satisfying various application demands, this module can be used as one independently single board computer also can many plates form as system master and calculate clusters to satisfy extensive computation requirement in real time.Concrete hardware comprises 2 1.06GHz PowerPC 8640D or 1.33GHz PowerPC 8641D dual core processor, support 4 4X SRIO to backboard connect and SRIO support the 3.125GHz clock frequency, support PCIe and gigabit Ethernet to backboard be connected, plate carries 2 PMC/XMC expansion slot, support IPMI intelligence system management interface, front panel support RS-232, gigabit Ethernet mouth.

The structure of MPC6410 computing module is as shown in Figure 3, is that the 6U size that meets the OpenVPX standard is calculated plate, also compatible simultaneously VPX standard.This module is a kind of computing module of four PowerPC 8640D/8641D processors design, and the MPC6410 module can be formed the calculating cluster to satisfy ultra-large real-time computation requirement by many plates.Concrete hardware configuration comprises 4 1.06GHzPowerPC 8640D or 1.33GHz PowerPC 8641D dual core processor and every subsidiary 1GB/2GB DDR2 internal memory of processor and 128MB Flash, support 4 4X SRIO to be connected and SRIO support 3.125GHz clock frequency, support PCIe and gigabit Ethernet are connected, support IPMI intelligence system management interface, front panel support RS-232 and gigabit Ethernet mouth to backboard to backboard.

Switching Module 2 can adopt, and the HSW6000 chip is module in return, and its structure is as shown in Figure 4, is the power board that meets the 6U size of OpenVPX standard.This Switching Module S set RIO, Ethernet data exchange reach the intelligence system Management Calculation based on IPMI, can realize powerful system data exchange, control and intelligent management.The HSW6000 Switching Module provides 18 road SRIO and 18 road gigabit Ethernets to the data exchanging function of load, can support 12.5Gbps SRIO high speed data transfer.Concrete hardware configuration comprises provides 18 3.125Gbaud 4X SRIO ports, provide 18 gigabit ethernet ports, plates to carry a MPC 8641D processor and 2GB DDR2 internal memory, 3 gigabit Ethernet mouths of front panel, front panel 3.125Gbaud 8X optical fiber port and support PCIe and SRIO.

The integrally-built I/O interface of native system comprises A/D, D/A, DIO; MIL-STD-1553B; ARINC 429; Fibre Channel; AFDX; SFPDP.The assembly that is connected with computing module 1 comprises that PPC MPC8641D assembly, SRIO communications component, PCIe switching network assembly, system management and monitor component, board mounted power assembly, plate carry clock assembly and construction package.The assembly that is connected with Switching Module 2 comprises that PPC MPC8548 assembly, SRIO switching network assembly, network exchange thermomechanical components, system management and monitor component, board mounted power assembly, plate carry clock assembly and construction package.

The technical scheme that adopts this embodiment to provide; Computing module through having PowerPC computing node and SRIO alteration switch is with the data exchanging function that provides 18 road SRIO and 18 road gigabit Ethernets to load and support the Switching Module of 12.5Gbps SRIO high speed data transfer to be connected; For embedded system provides extensibility and higher bandwidth and high density computing capability flexibly, the cover integrating and developing platform of technology such as a cover collection parallel computation, SRIO exchanges data, many DSP for core proposed.

The above; Be merely the preferable embodiment of the utility model; But the protection range of the utility model is not limited thereto; Any technical staff who is familiar with the present technique field is in the technical scope that the utility model embodiment discloses, and the variation that can expect easily or replacement all should be encompassed within the protection range of the utility model.Therefore, the protection range of the utility model should be as the criterion with the protection range of claim.

Claims

1. high speed signal data handling system; It is characterized in that; Comprise computing module and Switching Module; Each said computing module has 2 or 4 PowerPC computing nodes and is connected with the low SRIO of a delay alteration switch, said Switching Module provide 18 road SRIO and 18 road gigabit Ethernets to load data exchanging function and support 12.5Gbps SRIO high speed data transfer, the data input/output terminal of said computing module is connected with the data input/output terminal of said Switching Module.

2. high speed signal data handling system according to claim 1; It is characterized in that; Each said computing node comprises the DDR SDRAM of a 1.06GHz PowerPC 8640D or 1.33GHz MPC8641D PowerPC, 2G; Each said SRIO alteration switch have 2 with and being connected of string conversion SRIO bridge, have 2 4xSRIO of tool to be connected on each said SRIO bridge outward with plate.

3. high speed signal data handling system according to claim 1 is characterized in that, said Switching Module is the power board that meets the 6U size of OpenVPX standard, and integrated SRIO, Ethernet data exchange and based on the intelligence system Management Calculation function of IPMI.

4. high speed signal data handling system according to claim 1; It is characterized in that said computing module comprises PPCMPC8641D assembly, SRIO communications component, PCIe switching network assembly, system management and monitor component, board mounted power assembly, plate carries clock assembly and construction package.

5. high speed signal data handling system according to claim 1; It is characterized in that said Switching Module comprises PPCMPC8548 assembly, SRIO switching network assembly, network exchange thermomechanical components, system management and monitor component, board mounted power assembly, plate carries clock assembly and construction package.