CN106502957A - A kind of spaceborne radar data processing and control device based on VPX buses - Google Patents
A kind of spaceborne radar data processing and control device based on VPX buses Download PDFInfo
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- CN106502957A CN106502957A CN201611130758.2A CN201611130758A CN106502957A CN 106502957 A CN106502957 A CN 106502957A CN 201611130758 A CN201611130758 A CN 201611130758A CN 106502957 A CN106502957 A CN 106502957A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17306—Intercommunication techniques
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
- G06F15/7871—Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS
Abstract
The invention discloses a kind of spaceborne radar data processing and control device based on VPX buses, its data handling system and managing and control system adopt two pieces of duplicate process computers, processing computer per block includes 440 cores of PowerPC of two panels isomorphism.Two systems form two kinds of mode of operations by 440 cores of PowerPC of four isomorphisms.Parallel schema：440 cores of PowerPC of 4 isomorphisms are worked independently of one another, but by having interconnecting channels between interconnected communication bus.Fault-tolerant mode：440 cores of PowerPC of 4 isomorphisms are carried out fault-tolerant in the form of quadruple modular redundant.The present invention is high to solve spaceborne radar data processing point flight path processing ability, the coordinate transformation of radar intelligence (RADINT) data, point mark related, point mark thick to flight path is short with temporary transient flight path correlation, related flight path, Contact fusion and track filtering and predicted processing time, the severe requirement of space flight use environment.
Description
Technical field
The present invention relates to a kind of data processing in spaceborne radar field and control device, more particularly to a kind of based on VPX
The spaceborne radar data processing of bus and control device.
Background technology
Radar data process is mainly included with the function of managing and control system：(1) data processing, pre-process including Targets Dots,
The full-automatic starting of target, flight path correlation and tracking are processed, and flight path state is maintained etc.；(2) system management and control, including radar beam resource
Layout and scheduling controlling, radar operation mode management, the communication between radar and satellite number pipe computer or ground system, full machine
The tasks such as BIT.
According to data processing performance analysis requirement and radar management and control demand, at present domestic peak performance have space flight pass through
The BM3803FMGRH indexs that goes through are unsatisfactory for this unit demand, and foreign countries have the high-performance CPU availability pole of Flouride-resistani acid phesphatase index
Difference, therefore the hardware platform of this unit selects the army's grade Xilinx Virtex-5Q FXT family chips after Flouride-resistani acid phesphatase screening, should
2 PowerPC440 processor cores of built-in chip type, at the same using 2 totally 4 core disclosure satisfy that data processing and management and control unit
Performance and mission requirements.
Content of the invention
For current spaceborne radar data handling requirements, the present invention proposes a kind of spaceborne radar data based on VPX buses
Process and control device, high to solve spaceborne radar data processing point flight path processing ability, the coordinate transformation of radar intelligence (RADINT) data,
Point mark related, point mark thick to flight path and temporary transient flight path correlation, related flight path, Contact fusion and track filtering and predicted processing time
Short, the severe requirement of space flight use environment.
Concrete technical scheme of the present invention is as follows：A kind of spaceborne radar data processing and control device based on VPX buses, its
Including data handling system and managing and control system；The data handling system and the managing and control system are counted using two pieces of duplicate process
Calculation machine, processing computer per block includes 440 cores of PowerPC of two panels isomorphism；Two systems are by four isomorphisms
440 cores of PowerPC form two kinds of mode of operations；
Parallel schema：440 cores of PowerPC of 4 isomorphisms are worked independently of one another, but by interconnected communication bus that
There are interconnecting channels between this；440 cores of PowerPC as communication management module receive note software on ground, used as task
440 cores of PowerPC of management module realize the online upgrading to software in 440 cores of all PowerPC, at a mark
440 cores of PowerPC of reason module realize that Targets Dots are pre-processed, used as the 440 core realities of PowerPC of Track In Track module
Automatically starting, flight path correlation and tracking are processed existing target；
Fault-tolerant mode：440 cores of PowerPC of 4 isomorphisms are carried out fault-tolerant in the form of quadruple modular redundant.
Used as the further improvement of such scheme, after the process of communication management module, information bit rate is less than 2Mbps.
As the further improvement of such scheme, in fault-tolerant mode, the operation result of each 440 core of PowerPC will
Put to the vote.
Further, the operation result of each 440 core of PowerPC is put to the vote by voting machine.
Yet further, voting formula is：Based on the voting of packet, for the data that 440 cores of PowerPC are produced,
It is sent in the voting machine of software realization by serial ports, byte-by-byte is put to the vote.
Yet further, voting formula is：Based on the voting of stream, for Large Volume Data, data streaming utilizes hardware reality
Existing voting machine circuit, one by one data bit put to the vote.
Used as the further improvement of such scheme, processing computer per block also includes that two panels Virtex-5Q FXT, two panels expand
Exhibition DDR2 memories, two panels extended menory DDR2 are connected respectively on the FPGA of two panels Virtex-5Q FXT, as corresponding position
Reason computer-internal is responsible for the internal memory and shared video memory of 440 core of display processing PowerPC.
Further, two panels extended menory DDR2 adopts data width for the DDR2 memories of 16, a piece of conduct
Data/address bus low 16, a piece of as the high 16 of data/address bus, composition data bus word length is 32, size is
The memory system of 256MByte.
Used as the further improvement of such scheme, the communication management module is by 1553B buses and the Star Service of satellite platform
Management computer connection, completes the remote-control romote-sensing information exchange with ground command system；The Target dots processing module by optical fiber and
LVDS interface completes a transmission for mark data with the signal processing unit of ground command system, completes antenna element BIT information biography
Defeated, remote-control romote-sensing information exchange is completed by standard RS422 communication interface.
Further, in 1553B bus communication systems, communication node is divided into：Bus control unit, bus monitor and long-range
Terminal；The bus control unit is the terminal of bus system organizational information transmission, and the bus monitor is that bus system middle finger is set for
For the information of transmission in reception and record trunk and information terminal for future use is extracted selectively, the remote terminal is bus
Not as bus control unit or all terminals of bus monitor in system.
The spaceborne radar data processing based on VPX buses and control device that the present invention is provided, just the same using two pieces
Computer must be processed, the mode of 4 PowerPC440 processor interconnected communications is embedded, to solve spaceborne radar data processing point boat
Mark disposal ability is high, and the coordinate transformation of radar intelligence (RADINT) data, point mark related, point mark thick to flight path is related with temporary transient flight path, flight path
Related, Contact fusion and track filtering are short with predicted processing time, the severe requirement of space flight use environment, data handling system with
Managing and control system realizes reconfigurable multinuclear Embedded System Design.
Description of the drawings
Fig. 1 is the spaceborne radar data processing based on VPX buses of the present invention and the hardware block diagram of control device.
Fig. 2 is external external memory storage circuit block diagram.
Fig. 3 is high speed serialization circuit block diagram.
Fig. 4 is high speed network interfaces circuit block diagram.
Fig. 5 is 1553B bus circuit block diagrams.
Specific embodiment
In order that the objects, technical solutions and advantages of the present invention become more apparent, below in conjunction with drawings and Examples, right
The present invention is further elaborated.It should be appreciated that specific embodiment described herein is only in order to explain the present invention, and
It is not used in the restriction present invention.
The spaceborne radar data processing based on VPX buses and control device of the present invention belongs to a kind of configurable spaceborne thunder
Up to data processing and managing and control system device, spaceborne radar data processing point flight path processing ability height can be solved, space flight makes
Requirement with bad environments.Below in conjunction with accompanying drawing and embodiment, the present invention will be described in further detail.
As shown in figure 1, spaceborne radar data processing and control device adopt standard VPX cabinet rake configuration formula, including data
Processing system and managing and control system.The data handling system and the managing and control system adopt two pieces of duplicate process computers, per
Block processes computer includes 440 cores of PowerPC of two panels isomorphism.In the present embodiment, processing computer mainly has two panels
Virtex-5Q FXT and each independent 440 processors of PowerPC extension DDR2, FLASH, LAN and other interface circuit groups
Into, FPGA loadings, refreshing, data comparison control circuit, interface driver, 4 core interconnected communications and bus circuit, board mounted power electricity
Road.Two systems form two kinds of mode of operations by the 440 core PPC1 of PowerPC of four isomorphisms～PPC4.
First, parallel schema
440 cores of PowerPC of 4 isomorphisms are worked independently of one another, but by having between interconnected communication bus
Interconnecting channels.440 core PPC4 of PowerPC as communication management module receive note software on ground, used as task management mould
440 cores of PowerPC of block PPC3 realize the online upgrading to software in 440 cores of all PowerPC, used as Target dots processing
The 440 core PPC1 of PowerPC of module realize that Targets Dots are pre-processed, used as 440 cores of PowerPC of Track In Track module
PPC2 realizes that the full-automatic starting of target, flight path are related and tracking is processed.
Therefore, 440 cores of PowerPC of 4 isomorphisms are operated independently of each other.Communication management module is received
Software, task management module can realize the online upgrading to other several module softwares, believe after the process of communication management module
Breath bit rate is less than 2Mbps.
2nd, fault-tolerant mode
440 cores of PowerPC of 4 isomorphisms are carried out fault-tolerant in the form of quadruple modular redundant.Quadruple modular redundant (QMR)：Due to
Virtex-5Q FXT have good TID indexs, for SEU very sensitive.Therefore for 440 cores of PowerPC of 4 isomorphisms
Carry out quadruple modular redundant, the voting machine of the operation result of PowerPC 440 in loading refresh control circuit is put to the vote.Have as follows
Two kinds of voting formulas.
(1) voting based on packet.For the data that PowerPC is produced, it is sent in voting machine by serial ports, one by one word
Section is put to the vote.Data reliability has high demands, data volume is low.
(2) voting based on stream.For Large Volume Data, such as Ethernet or High Speed Serial.Data are streamed to
In FIFO in Virtex-5Q FXT, using hard-wired voting machine circuit, data bit is put to the vote one by one.
In the outside extended menory circuit design of the spaceborne radar data processing based on VPX buses and control device,
As shown in Fig. 2 adopt two panels data width to be connected on the FPGA of Virtex-5Q FXT for the DDR2 memories of 16, as
The internal memory and shared video memory of its interior liabilities display processing PowerPC440 processor core.A piece of as the low by 16 of data/address bus
Position, a piece of as the high 16 of data/address bus, the memory system that composition data bus word length is 32, size is 256MByte.
The clock signal and control signal of the DDR2 controllers that Virtex-5Q FXT are produced is connected with two panels DDR2 internal memory.Using 1
Data width is that the FLASH memory of 16 is connected on the FPGA of Virtex-5Q FXT.
In the high speed RocketIO circuit design of the spaceborne radar data processing based on VPX buses and control device, such as
Shown in Fig. 3, the programmable high-speed serial transceiver RocketIO that is internally integrated using the fpga chip of Virtex-5Q FXT is bearing
Blame sending and receiving for data.In data sending terminal, hardware reads the team relevant with sequence and exchange management by dma mode
Row, then according to the information in queue, determine the content of each frame head, then read the data in managing internal memory by dma mode
And assemble framing and send；After data receiver, hardware acceptance to frame, write in internal memory by dma mode, software is responsible for
Frame is reassembled as sequence, then sequence is reassembled into exchange.
Bus control unit can authorize main equipment to the access of PLB and allow by competing the control for obtaining bus.
BRAM is the Black RAM in fpga chip, can be used as the program storage of system and data storage.
In the high speed network interfaces circuit design of the spaceborne radar data processing based on VPX buses and control device, such as
Shown in Fig. 4, with PPC440 embedded type CPUs as core, can achieve and program storage, the height of data storage by PLB buses
Speed communication.PLB is 128 bit processor local bus, can support many master-slave equipments.Bus control unit can authorize main equipment pair
The access of PLB is simultaneously allowed by competing the control for obtaining bus.BRAM is the Black RAM in fpga chip, can be used as system
The program storage and data storage of system.
TEMAC is ethernet controller, for completing the correct configuration between processor and Ethernet, to realize that data are believed
The high-speed transfer of breath.
The communication management module of spaceborne radar data processing and control device based on VPX buses by 1553B buses with
The Star Service management computer connection of satellite platform, completes the remote-control romote-sensing information exchange with ground command system；By optical fiber and
LVDS interface completes a transmission for mark data with signal processing unit, completes antenna element BIT information transfers, by standard
RS422 communication interfaces complete remote-control romote-sensing information exchange；Unit provides OC telecommands control distributor antenna element secondary electricity
The remote control switch in source, while gather the OC telemetry intelligence (TELINT)s of distributor passback.
As shown in figure 5, in 1553B bus communication systems, communication node is divided into：Bus control unit (BC), bus monitor
And remote terminal (RT) (BM).BC is the terminal of bus system organizational information transmission, and BM is that bus system middle finger is set for as reception
And on record trunk transmit information and selectively extraction information terminal for future use, RT is not as total in bus system
Lane controller or all terminals of bus monitor.The transmission speed of standard 1553B bus is 1Mbit/s, adopts graceful Chester II
Type is encoded, half-duplex operation.Transmission word length be 20 bits, data effective length be 16 bits, each word bag
Synchronous head containing 16 information bits, a parity check bit and 3 bit lengths, information content maximum length be 32 words, transmission side
Formula is half-duplex mode, and host-host protocol is command/response mode；Failure tolerant has typical dual redundant mode, Article 2 bus
It is in warm standby state；Bus system can hang 31 terminals, and transmission medium is Shielded Twisted Pair.It is applied to transformer coupled side
Formula, can be more than 30 meters by the length of cable transmitting.
BU-61580 from 1553B protocol chips realizing 1553B bus functionalitys, BU-61580 comprising microprocessor and
Complete interface between 1553B buses, it is possible to achieve tri- kinds of mode of operations of BC, RT, BM, is encapsulated as the DIP of 70 pins, during transmission
Using 1.41:1 transformer.An integrated half-duplex coder/decoder, complete bus control protocol, memory management electricity
Road and interrupt logic circuit, processor interface logic, there is provided in the piece of 4K × 16, static state is shared between RAM and processor bus
Buffer interface, is to provide complete, flexible interface circuit between microprocessor and 1553B buses.
In design based on the interface circuit of the spaceborne radar data processing and control device of VPX buses, at data
Reason and management and control unit are designed using active and standby cold standby, to DBF extension sets, the active and standby 4+4 roads of optical fiber interface realize that the remote control of DBF extension sets is distant
Survey and put the transmission of mark data；The remote control of secondary power supply completes active and standby cold standby inside unit and exchanges design, OC instruction outputs.
The system device external interface can adopt RS422 interfaces and LVDS electric level interfaces.
In the power circuit design of spaceborne radar data processing and control device based on VPX buses, this device is adopted
Core voltage is 1.0V, and IO voltages are 3.3V, and boost voltage is 2.5V, and high speed serialization module transmitting-receiving voltage is 1.2V, and DDR2 is referred to
Voltage is 0.9V.The system device can carry out circuit design using LTM series of power module and LDO power modules.
Presently preferred embodiments of the present invention is the foregoing is only, not in order to limit the present invention, all in essence of the invention
Any modification, equivalent and improvement that is made within god and principle etc., should be included within the scope of the present invention.
Claims (10)
1. a kind of spaceborne radar data processing and control device based on VPX buses, which includes data handling system and management and control system
System；It is characterized in that：The data handling system and the managing and control system adopt two pieces of duplicate process computers, process per block
Computer includes 440 cores of PowerPC of two panels isomorphism；Two systems are formed by 440 cores of PowerPC of four isomorphisms
Two kinds of mode of operations；
Parallel schema：440 cores of PowerPC of 4 isomorphisms are worked independently of one another, but by interconnected communication bus each other it
Between have interconnecting channels；440 cores of PowerPC as communication management module receive note software on ground, used as task management
440 cores of PowerPC of module realize the online upgrading to software in 440 cores of all PowerPC, used as Target dots processing mould
440 cores of PowerPC of block realize that Targets Dots are pre-processed, and 440 cores of PowerPC as Track In Track module realize mesh
The full-automatic starting of mark, flight path correlation and tracking are processed；
Fault-tolerant mode：440 cores of PowerPC of 4 isomorphisms are carried out fault-tolerant in the form of quadruple modular redundant.
2. the spaceborne radar data processing and control device based on VPX buses as claimed in claim 1, it is characterised in that：Logical
After the process of letter management module, information bit rate is less than 2Mbps.
3. the spaceborne radar data processing and control device based on VPX buses as claimed in claim 1, it is characterised in that：?
During fault-tolerant mode, the operation result of each 440 core of PowerPC will be put to the vote.
4. the spaceborne radar data processing and control device based on VPX buses as claimed in claim 3, it is characterised in that：Per
The operation result of 440 cores of individual PowerPC is put to the vote by voting machine.
5. the spaceborne radar data processing and control device based on VPX buses as claimed in claim 4, it is characterised in that：Table
Certainly mode is：Based on the voting of packet, for the data that 440 cores of PowerPC are produced, software realization is sent to by serial ports
Voting machine in, byte-by-byte is put to the vote.
6. the spaceborne radar data processing and control device based on VPX buses as claimed in claim 5, it is characterised in that：Table
Certainly mode is：Based on the voting of stream, for Large Volume Data, data streaming is counted one by one using hard-wired voting machine circuit
Put to the vote according to position.
7. the spaceborne radar data processing and control device based on VPX buses as claimed in claim 1, it is characterised in that：Per
Block processes computer also includes that two panels Virtex-5Q FXT, two panels extension DDR2 memories, two panels extended menory DDR2 are distinguished
It is connected on the FPGA of two panels Virtex-5Q FXT, is responsible for display processing PowerPC 440 as respective handling computer-internal
The internal memory of core and shared video memory.
8. the spaceborne radar data processing and control device based on VPX buses as claimed in claim 7, it is characterised in that：Two
Piece extended menory DDR2 adopts data width for the DDR2 memories of 16, a piece of as the low 16 of data/address bus, and one
Piece as the high 16 of data/address bus, composition data bus word length is 32, size for 256MByte memory system.
9. the spaceborne radar data processing and control device based on VPX buses as claimed in claim 1, it is characterised in that：Should
Communication management module manages computer by 1553B buses with the Star Service of satellite platform and is connected, and completes and ground command system
Remote-control romote-sensing information exchange；The Target dots processing module is by optical fiber and the signal processing unit of LVDS interface and ground command system
A transmission for mark data is completed, antenna element BIT information transfers is completed, remote-control romote-sensing is completed by standard RS422 communication interface
Information exchange.
10. the spaceborne radar data processing and control device based on VPX buses as claimed in claim 9, it is characterised in that：
In 1553B bus communication systems, communication node is divided into：Bus control unit, bus monitor and remote terminal；The bus control unit
It is the terminal of bus system organizational information transmission, the bus monitor is that bus system middle finger is set for as in reception and record trunk
The information of transmission simultaneously selectively extracts information terminal for future use, and the remote terminal is not as total line traffic control in bus system
Device processed or all terminals of bus monitor.
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