CN202025735U - 新型引线框架结构 - Google Patents

新型引线框架结构 Download PDF

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CN202025735U
CN202025735U CN2011201280923U CN201120128092U CN202025735U CN 202025735 U CN202025735 U CN 202025735U CN 2011201280923 U CN2011201280923 U CN 2011201280923U CN 201120128092 U CN201120128092 U CN 201120128092U CN 202025735 U CN202025735 U CN 202025735U
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bearing substrate
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洪元本
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JIANGXI YIYUAN DIGITAL SCIENCE & TECHNOLOGY Co Ltd
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/32257Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating

Abstract

本实用新型公开了一种新型引线框架结构,包括集成电路芯片、承载基板、管脚、塑封体及金属连接导线,采用半包封结构,承载基板底面直接裸露在塑封体外,集成电路芯片通过导热介质粘贴在承载基板上。在承载基板上冲压一个矩形凹槽。承载基板外表面与管脚保持在同一水平面。在集成电路芯片表面点有绝缘导热材料。本实用新型大大了提高封装散热性能和塑封料与芯片的承载基板之间气密性,可提高封装制程的良品率,在封装相同尺寸的芯片,封装体积更小,同时节省了塑封料用量,缩短了生产周期,减少了设备投入并降低了制造成本。

Description

新型引线框架结构
技术领域:
    本实用新型涉及用于集成电路封装的一种新型引线框架结构。
背景技术:
    集成电路在运作时,随着电流通过内部元件便会产生大量的热能,而这些热能若不能及时的散发出去,便会影响集成电路的可靠性造成寿命降低甚至烧毁元件,集成电路的散热性能直接影响其所能承载的功率。目前90%以上集成电路采用了塑料封装材料,通常通过模具加热加压用塑封料把集成电路的发热源和承载基片全部包封起来。其散热途径是一方面通过连接的导线、管脚传导出去;另一方面通过本体塑封料向周围散热。由于从导线、管脚散热途径的热传导距离长、同时本体塑封料的导热系数又较小,所以集成电路工作产生的热能不能实现良好的传导,主要集中在封装体的内部。据统计,集成电路的失效多数是由热量不能及时有效的传导出去所造成的。随着半导体朝向微型化的发展,集成度越来越高,集成电路中集成的晶体管的数目就越来越多,这样集成电路在运作时,发热量就越来越大,过高的温度会造成集成电路的可靠性降低及性能下降,电路应用中存在不稳定因素,严重时甚至烧毁集成电路。
    其次,传统的封装形式,封装体积较大,不仅占用电路板的空间、不利于向轻、薄型化的发展,还增加的用料的成本。
    因此,随着电子产品轻薄化、多功能化的发展,高功率、小尺寸、低成本的封装技术将日受追捧,如何能够合理的减小封装体积,提高导热效率,封装是必须考虑的一个不可缺少的环节。    
发明内容:
本实用新型的目的在于:提供一种集成电路的新型引线框架结构和封装形式,使集成电路芯片工作产生的热量经由导热介质、承载基片直接传导到电路板的散热片。
本实用新型包括集成电路芯片、承载基板、管脚、塑封体及金属连接导线,采用半包封结构,承载基板底面直接裸露在塑封体外,集成电路芯片通过导热介质粘贴在承载基板上。
本实用新型在承载基板上冲压一个矩形凹槽。
本实用新型所述承载基板外表面与管脚保持在同一水平面。
本实用新型在集成电路芯片表面点有绝缘导热材料。
本实用新型所述导热介质为导热胶,本实用新型所述绝缘导热材料为绝缘导热硅胶。
本实用新型具有以下特点和优点:
1)采用半包封结构,使集成电路的承载基板底面直接裸露在封装体外,大大提高封装散热性能。
2)改进引线框架的结构,提高塑封料与芯片的承载基板之间气密性。
3)在塑封工序前在芯片表面点上绝缘导热材料,再经过烘烤工序后,在芯片表面形成一种有弹性的、密封的保护膜,能有效阻止水气的浸入到芯片表面,从而提高封装气密性。同时胶体具有很好的弹性,能较好的保护芯片,防止芯片在塑封的过程中,由于塑封料、银胶、引线框架、硅晶体等不同材质的热膨胀系数不同,在高温下产生不同的应力所引起的芯片碎裂的问题,可提高封装制程的良品率。
4)在封装相同尺寸的芯片,封装体积更小,同时节省了塑封料用量。
5)改进引线框架的结构,省略传统封装引脚弯曲成型的工序,缩短生产周期,减少设备投入,降低制造成本。
附图说明:
    图1 为传统的SOIC 8L引线框架结构剖面示意图;
图 2为本实用新型集成电路引线框架结构的剖面图。
具体实施方式:
以下结合附图对本实用新型进行详细说明。
参见图2,本实用新型包括集成电路芯片30、导热介质60、引线框架组成部分集成电路的承载基板40及管脚 20、塑封胶体10、金属连接导线50、绝缘导热材料70。采用半包封结构,集成电路的承载基板40底面直接裸露在塑封体10外,集成电路芯片30通过导热介质60粘贴在承载基板40上。集成电路的承载基板40上冲压一个矩形凹槽41,承载基板40外表面与管脚20保持在同一水平面。矩形凹槽41可以防止承载基板40与塑封胶体10之间的分层,增加与塑封胶体10的密封性,提高封装的气密性。集成电路芯片30贴装到承载基板40的矩形凹槽41内,集成电路芯片30底部与引线框架的承载基板40之间用导热介质60粘接,例如导热胶或焊锡料等,集成电路芯片30上表面的焊垫与引线框架的管脚20之间经引线键合以金属导线 50焊接,例如金线(Au Wire)或铜线(Cu Wire)等,以达到与外界的电性连接;在焊接完成后,再在芯片31表面点有绝缘导热材料70,经过烘烤工序后,在芯片30表面形成一种有弹性的、密封的保护膜,能有效阻止水气的浸入到芯片表面,从而提高封装气密性。同时胶体具有很好的弹性,能较好的保护芯片,防止芯片在塑封的过程中,由于塑封料、导热胶、引线框架、硅晶体等不同材质的热膨胀系数不同,在高温下产生不同的应力所引起的芯片碎裂的问题,可提高封装制程的良品率。然后将具有一定导热性的塑封料,例如环氧树脂塑封料(epoxy molding compound,EMC),通过塑封成型机以压模方式(molding)填充于集成电路芯片及引线框架周围,将一部分管脚20、金属连接导线50、芯片30等都包封在塑封体内,引线框架的管脚20露出一部分在塑封体外,以利于电路板的焊接。引线框架的承载基板40外表面, 即引线框架承载基板的矩形凹槽底面裸露出塑封体之外,以便集成电路芯片30能直接经过引线框架承载基板40向外界实现良好的热传导;最后按传统封装工艺进行切脚、去毛刺和分离工艺,由于不需要对引脚进行弯曲成型,因此省略引脚弯曲成型的工序。
以上所述是本实用新型的优选实施方式,应当指出,对于本技术领域的技术人员来说,在不脱离本实用新型原理的前提下,还可以做出若干改进,这些改进也视为本实用新型的保护范围。

Claims (1)

1.一种集成电路的新型引线框架结构,包括集成电路芯片、承载基板、管脚、塑封体及金属连接导线,其特征在于:采用半包封结构,承载基板底面直接裸露在塑封体外,集成电路芯片通过导热介质粘贴在承载基板上。
2、根据权利要求1所述的集成电路的新型引线框架结构,其特征在于:承载基板冲压一个矩形凹槽。
3、根据权利要求1或2所述的集成电路的新型引线框架结构,其特征在于:承载基板外表面与管脚保持在同一水平面。
4、根据权利要求1或2所述的集成电路的新型引线框架结构,其特征在于:在集成电路芯片表面点有绝缘导热材料。
CN2011201280923U 2011-04-27 2011-04-27 新型引线框架结构 Expired - Fee Related CN202025735U (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105990298A (zh) * 2015-02-06 2016-10-05 展讯通信(上海)有限公司 一种芯片封装结构及其制备方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105990298A (zh) * 2015-02-06 2016-10-05 展讯通信(上海)有限公司 一种芯片封装结构及其制备方法

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