CN201829482U - 一种无基板的倒装芯片的芯片尺寸封装结构 - Google Patents
一种无基板的倒装芯片的芯片尺寸封装结构 Download PDFInfo
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
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Abstract
一种无基板的倒装芯片的芯片尺寸封装结构,属于半导体封装领域,其特征在于,包括倒装芯片(1)、凸点(2)、模塑料(3)和底部填充料(4),还包括Cu焊盘(5)和焊球(6)。本实用新型主要采用Cu板(箔)及其蚀刻代替传统通用的BT Core(双马来酰亚胺三嗪树脂芯板)刚性基板或者其他挠性基板以及工艺等来实现再布线和内外部的互连,省去了基板层的制造,大大降低了生产成本,生产社会效益显著。
Description
技术领域
本实用新型涉及半导体封装领域,尤其是一种无基板的倒装芯片的芯片尺寸封装结构。
背景技术
芯片尺寸封装(CSP)是目前比较新颖的封装方式,其特征是封装之后的元件面积与所封装的芯片(IC)的面积非常接近,按照不同组织和公司的约定,封装后的元件面积与所封装的芯片面积的比值小于等于1.2(或1.5或2倍)。目前存在多种芯片尺寸封装结构,按照其结构以及采用的主体材料可以分为基于刚性板的CSP、基于挠性板的CSP、基于引线框架的CSP以及圆片级再布线CSP等。
这些封装方式采用基于双马来酰亚胺三嗪树脂(BT Resin)的刚性基板,或者采用载带式的挠性基板,或者采用特别的工艺基于传统的引线框架,或者引用圆片级封装的再布线技术来实现所封装芯片的焊盘再分布和再布线和内外部的连接,然而这些基板或者特别采用的工艺基板占封装成本的很大一部分。
实用新型内容
本实用新型在于提供了一种无基板的倒装芯片的芯片尺寸封装结构,采用Cu板(箔)代替其他传统基板或者工艺来实现再布线和封装所需要的内部互连。
为了达到上述目的,本实用新型的技术方案是:
本实用新型的无基板的倒装芯片的芯片尺寸封装结构,包括倒装芯片(1)、倒装芯片凸点(2)、模塑料(3)和底部填充料(4),其特征在于,还包括Cu焊盘(5),所述Cu焊盘(5)的上表面与对应的倒装芯片凸点(2)的底面相连,其余Cu焊盘(5)的上表面与所述底部填充料(4)的底面相连。
本实用新型进一步改进在于所述Cu焊盘(5)的底面植有焊球(6)。
本实用新型进一步改进在于所述Cu焊盘(5)为蚀刻的Cu箔或Cu板。
本实用新型进一步改进在于所述倒装芯片凸点为焊料凸点、Au钉头凸点、Ni凸点、Cu凸点、In凸点以及Ag凸点中的任何一种。
本实用新型更进一步改进在于所述焊球是无铅的。
这种无基板的倒装芯片的芯片尺寸封装结构的主要优势在于:本实用新型采用Cu板(箔)及其蚀刻代替其他传统基板或者工艺来实现再布线和封装所需要的内部互连,省去了基板层的制造或者其他特别工艺的引用,大大降低了生产成本,生产社会效益显著;其次通过Cu板(箔)蚀刻完成的再布线可以在面阵列进行芯片焊盘的分布,使焊盘中心距变大,为在下一步的组装中提供了便利。
附图说明
附图用来提供对本实用新型的进一步理解,并且构成说明书的一部分,与本实用新型的实施例一起用于解释本实用新型,并不构成对本实用新型的限制。在附图中:
图1是无基板的倒装芯片的芯片尺寸LGA封装结构的截面示意图。
图2是无基板的倒装芯片的芯片尺寸BGA封装结构的截面示意图。
其中:
1-倒装芯片;2-倒装芯片凸点;3-模塑料;4-底部填充料;5-Cu焊盘;6-焊球。
具体实施方式
实施例一:
S101:在Cu板(箔)上表面涂敷感光树脂或者光刻胶;
S202:然后进行光刻,在上表面获得需要和倒装芯片凸点组装的焊盘(Pad);
S103:在S102所获得的焊盘上面根据凸点类型制作相应的金属化层,去除感光树脂或者光刻胶;
S104:将带有倒装凸点的芯片组装到Cu板(箔)上;
S105:进行底部填充料填充(Underfilling)和模塑成型(Molding);
S106:在Cu板(箔)下表面涂敷感光树脂或者光刻胶,根据布线以及下表面的焊盘(Pad)分布进行Cu板(箔)的刻蚀;
S107:在S106获得的布线和Pad上制作相应的金属化层;
S108:去除感光树脂或者光刻胶。
这样就得到了无基板的倒装芯片的芯片尺寸LGA封装结构。
实施例二:
S201:在Cu板(箔)上表面涂敷感光树脂或者光刻胶;
S202:然后进行光刻,在上表面获得需要和倒装芯片凸点组装的焊盘(Pad);
S203:在S202获得的焊盘上面根据凸点类型制作相应的金属化层,去除感光树脂或者光刻胶;
S204:将带有倒装凸点的芯片组装到Cu板(箔)上;
S205:进行底部填充料填充(Underfilling)和模塑成型(Molding);
S206:在Cu板(箔)下表面涂敷感光树脂或者光刻胶,根据布线以及下表面的焊盘(Pad)分布进行Cu板(箔)的刻蚀;
S207:在S106获得的布线和Pad上制作相应的金属化层;
S208:去除感光树脂或者光刻胶;
S209:在Cu板(箔)下表面的Pad上进行植球工艺,完成焊球。
这样就得到了无基板的倒装芯片的芯片尺寸BGA封装结构。
Claims (5)
1.一种无基板的倒装芯片的芯片尺寸封装结构,包括倒装芯片(1)、倒装芯片凸点(2)、模塑料(3)和底部填充料(4),其特征在于,还包括Cu焊盘(5),所述Cu焊盘(5)的上表面与对应的倒装芯片凸点(2)的底面相连,其余Cu焊盘(5)的上表面与所述底部填充料(4)的底面相连。
2.根据权利要求1所述的无基板的倒装芯片的芯片尺寸封装结构,其特征在于,所述Cu焊盘(5)的底面植有焊球(6)。
3.根据权利要求1所述的无基板的倒装芯片的芯片尺寸封装结构,其特征在于,所述Cu焊盘(5)为蚀刻的Cu箔或Cu板。
4.根据权利要求1所述的无基板的倒装芯片的芯片尺寸封装结构,其特征在于,所述倒装芯片凸点为焊料凸点、Au钉头凸点、Ni凸点、Cu凸点、In凸点以及Ag凸点中的任何一种。
5.根据权利要求1所述的无基板的输入端扇入型倒装芯片的芯片尺寸封装结构,其特征在于,所述焊球是无铅的。
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CN101976663A (zh) * | 2010-09-27 | 2011-02-16 | 清华大学 | 一种无基板的倒装芯片的芯片尺寸封装结构 |
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