CN201681848U - Sunken-substrate-exposed packaging structure for passive components - Google Patents

Sunken-substrate-exposed packaging structure for passive components Download PDF

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Publication number
CN201681848U
CN201681848U CN2010201773659U CN201020177365U CN201681848U CN 201681848 U CN201681848 U CN 201681848U CN 2010201773659 U CN2010201773659 U CN 2010201773659U CN 201020177365 U CN201020177365 U CN 201020177365U CN 201681848 U CN201681848 U CN 201681848U
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CN
China
Prior art keywords
pin
substrate
dao
pins
plastic packaging
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Expired - Lifetime
Application number
CN2010201773659U
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Chinese (zh)
Inventor
王新潮
梁志忠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JCET Group Co Ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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Priority to CN2010201773659U priority Critical patent/CN201681848U/en
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Publication of CN201681848U publication Critical patent/CN201681848U/en
Anticipated expiration legal-status Critical
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

The utility model relates to a sunken-substrate-exposed packaging structure for passive components, which comprises a substrate (1), pins (2), conductive or non-conductive bonding substances (6), a chip (7), a metal wire (8) and plastic packaging materials (9) with packing. The central area of the front surface of the substrate (1) is sunken, the chip (7) is disposed in the central sunken area of the front surface of the substrate (1), passive components (10) are in arranged among the pins (2) or among the pins (2) and the substrate (1) in bridge mode, the front surface of the chip (7) is connected with a first metal layer (4) on front surfaces of the pins (2) via the metal wire (8), the plastic packaging materials (9) with packing are coated on the upper portions of the substrate (1) and the pins (2) and the outsides of the chip (7) and the metal wire (8), packing-free plastic packaging materials (3) are embedded on the peripheries of the pins (2) and areas among the substrate (1) and the pins (2), and sizes of the back surfaces of the substrate (1) and the pins (2) are smaller than those of the front surfaces of the substrate (1) and the pins (2), thereby forming the big end up substrate and pins. The sunken-substrate-exposed packaging structure has the advantages that plastic packaging bodies and metal pins have high binding capacity.

Description

Base island exposed type passive device encapsulating structure sinks
(1) technical field
The utility model relates to the base island exposed type passive device of a kind of sinking encapsulating structure.Belong to the semiconductor packaging field.
(2) background technology
Traditional encapsulating structure mainly contains two kinds:
First kind: after chemical etching and surface electrical coating are carried out in the front of employing metal substrate, stick the resistant to elevated temperatures glued membrane of one deck at the back side of metal substrate and form the leadframe carrier (as shown in Figure 3) that to carry out encapsulation process;
Second kind: after chemical etching and surface electrical coating are carried out in the front of employing metal substrate, promptly finish the making (as shown in Figure 4) of lead frame.Back etched is then carried out at the back side of lead frame again in encapsulation process.
And the not enough point of two kinds of above-mentioned lead frames below in encapsulation process, having existed:
First kind:
1) but the lead frame of this kind must stick the glued membrane of one deck costliness high temperature resistance because of the back side.So directly increased high cost.
2) but also because the glued membrane of one deck high temperature resistance must be sticked in the back side of the lead frame of this kind, so the load technology in encapsulation process can only be used conduction or nonconducting resin technology, and the technology that can not adopt eutectic technology and slicken solder is fully carried out load, so selectable product category just has bigger limitation.
3) but again because the glued membrane of one deck high temperature resistance must be sticked in the back side of the lead frame of this kind, and in the ball bonding bonding technology in encapsulation process, because but the glued membrane of this high temperature resistance is a soft materials, so caused the instability of ball bonding bonding parameter, seriously influenced the quality of ball bonding and the stability of production reliability.
4) but again because the glued membrane of one deck high temperature resistance must be sticked in the back side of the lead frame of this kind, and the plastic package process process in encapsulation process, because the high pressure of plastic packaging relation is easy to cause between lead frame and the glued membrane and infiltrates plastic packaging material, be that the kenel of conduction has become insulation pin (as shown in Figure 5) on the contrary because of having infiltrated plastic packaging material and will formerly should belong to metal leg.
Second kind:
The lead frame structure of this kind has carried out etching partially technology in the metal substrate front, though can solve the problem of first kind of lead frame, but because only carried out the work that etches partially in the metal substrate front, and plastic packaging material only envelopes the height of half pin in the plastic packaging process, so the constraint ability of plastic-sealed body and metal leg has just diminished, when if the plastic-sealed body paster is not fine to pcb board, does over again again and heavily paste, with regard to the problem (as shown in Figure 6) that is easy to generate pin.
Especially the kind of plastic packaging material is to adopt when filler is arranged, because material is at the environment and the follow-up surface-pasted stress changing relation of production process, can cause metal and plastic packaging material to produce the crack of vertical-type, its characteristic is the high more then hard more crisp more crack that is easy to generate more of proportion of filler.
(3) summary of the invention
The purpose of this utility model is to overcome above-mentioned deficiency, provides a kind of and reduces that packaging cost, selectable product category are wide, the big base island exposed type passive device of the sinking encapsulating structure of constraint ability of good stability, plastic-sealed body and the metal leg of the quality of ball bonding and production reliability.
The purpose of this utility model is achieved in that the base island exposed type passive device of a kind of sinking encapsulating structure, comprise Ji Dao, pin, conduction or non-conductive bonding material, chip, metal wire and the filler plastic packaging material arranged, described basic island 1 front middle section sinks, front at described pin is provided with the first metal layer, be provided with second metal level at the back side of Ji Dao and pin, positive central sunken regions is provided with chip by conduction or non-conductive bonding material on basic island, in cross-over connection between pin and the pin or between pin and the basic island passive device is arranged, be connected with metal wire between chip front side and the pin front the first metal layer, top and chip at described Ji Dao and pin, metal wire and passive device are encapsulated with the filler plastic packaging material outward, no filler plastic packaging material is set in zone between described pin periphery and Ji Dao and pin, described no filler plastic packaging material links into an integrated entity the bottom of periphery, pin bottom and Ji Dao and pin, and make described Ji Dao and pin back side size less than Ji Dao and the positive size of pin, form up big and down small Ji Dao and pin configuration.
The beneficial effects of the utility model are:
1) but the glued membrane of one deck costliness high temperature resistance need not sticked in the back side of the lead frame of this kind.So directly reduced high cost.
2) but because the glued membrane of one deck high temperature resistance need not sticked in the back side of the lead frame of this kind yet, so the load technology in encapsulation process is except using conduction or nonconducting resin technology, can also adopt the technology of eutectic technology and slicken solder to carry out load, so selectable product category is just wide.
3) but again because the glued membrane of one deck high temperature resistance need not sticked in the back side of the lead frame of this kind, guaranteed the stability of ball bonding bonding parameter, guaranteed the quality of ball bonding and the stability of production reliability.
4) but again because the lead frame of this kind need not stick the glued membrane of one deck high temperature resistance, and the plastic package process process in encapsulation process can not cause between lead frame and the glued membrane fully and infiltrate plastic packaging material.
5) because packless soft gap filler is set in the zone between described metal leg (pin) and metal leg, this packless soft gap filler has the filler plastic packaging material to envelope the height of whole metal leg with the routine in the plastic packaging process, so the constraint ability of plastic-sealed body and metal leg just becomes big, do not have the problem that produces pin again.
6) owing to adopted positive method of separating the etching operation with the back side, so in the etching operation, can form the slightly little and big slightly structure of positive basic island size of the size of back side Ji Dao, and with the size that varies in size up and down of a Ji Dao by tighter more difficult generation slip that no filler plastic packaging material coated and fall pin.
(4) description of drawings
Fig. 1 is base island exposed type passive device encapsulating structure schematic diagram for the utility model sinks.
Fig. 2 is the vertical view of Fig. 1.
Fig. 3 was for sticked the resistant to elevated temperatures glued membrane figure of one deck operation in the past at the back side of metal substrate.
Fig. 4 was for to adopt the front of metal substrate to carry out chemical etching and surface electrical coating flow diagram in the past.
Fig. 5 was for formed insulation pin schematic diagram in the past.
Fig. 6 pin figure for what formed in the past.
Reference numeral among the figure:
The base island 1, pin 2, no filler plastic packaging material 3, the first metal layer 4, second metal level 5, conduction or non-conductive bonding material 6, chip 7, metal wire 8, filler plastic packaging material 9, passive device 10 are arranged.
(5) embodiment
Referring to Fig. 1~2, Fig. 1 is base island exposed type passive device encapsulating structure schematic diagram for the utility model sinks.Fig. 2 is the vertical view of Fig. 1.By Fig. 1 and Fig. 2 as can be seen, the utility model base island exposed type passive device encapsulating structure that sinks, comprise basic island 1, pin 2, conduction or non-conductive bonding material 6, chip 7, metal wire 8 and filler plastic packaging material 9 is arranged, described basic island 1 front middle section sinks, be provided with the first metal layer 4 in the front of described pin 2, be provided with second metal level 5 at the back side of basic island 1 and pin 2, be provided with chip 7 in basic island 1 positive central sunken regions by conduction or non-conductive bonding material 6, in cross-over connection between pin 2 and the pin 2 or between pin 2 and the basic island 1 passive device 10 is arranged, chip 7 positive with pin 2 front the first metal layers 4 between be connected with metal wire 8, top and chip 7 at described basic island 1 and pin 2, metal wire 8 and the passive device 10 outer filler plastic packaging materials 9 that are encapsulated with, no filler plastic packaging material 3 is set in zone between described pin 2 peripheries and basic island 1 and pin 2, described no filler plastic packaging material 3 links into an integrated entity the bottom of peripheral and basic island 1, pin 2 bottoms with pin 2, and make described basic island 1 and pin 2 back side sizes less than basic island 1 and pin 2 positive sizes, form up big and down small Ji Dao and pin configuration.

Claims (1)

1. base island exposed type passive device encapsulating structure that sinks, comprise Ji Dao (1), pin (2), conduction or non-conductive bonding material (6), chip (7), metal wire (8) and filler plastic packaging material (9) is arranged, described Ji Dao (1) front middle section sinks, be provided with the first metal layer (4) in the front of described pin (2), the back side at Ji Dao (1) and pin (2) is provided with second metal level (5), be provided with chip (7) in the positive central sunken regions of Ji Dao (1) by conduction or non-conductive bonding material (6), in cross-over connection between pin (2) and the pin (2) or between pin (2) and the Ji Dao (1) passive device (10) is arranged, chip (7) positive with pin (2) front the first metal layer (4) between be connected with metal wire (8), top and chip (7) at described Ji Dao (1) and pin (2), the outer filler plastic packaging material (9) that is encapsulated with of metal wire (8) and passive device (10), it is characterized in that: no filler plastic packaging material (3) is set in the zone between described pin (2) periphery and Ji Dao (1) and pin (2), described no filler plastic packaging material (3) links into an integrated entity the bottom of pin (2) periphery, bottom and Ji Dao (1) and pin (2), and make described Ji Dao (1) and pin (2) back side size less than Ji Dao (1) and the positive size of pin (2), form up big and down small Ji Dao and pin configuration.
CN2010201773659U 2010-04-26 2010-04-26 Sunken-substrate-exposed packaging structure for passive components Expired - Lifetime CN201681848U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010201773659U CN201681848U (en) 2010-04-26 2010-04-26 Sunken-substrate-exposed packaging structure for passive components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2010201773659U CN201681848U (en) 2010-04-26 2010-04-26 Sunken-substrate-exposed packaging structure for passive components

Publications (1)

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CN201681848U true CN201681848U (en) 2010-12-22

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Granted publication date: 20101222