CN201654081U - Wafer test probe card - Google Patents
Wafer test probe card Download PDFInfo
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- CN201654081U CN201654081U CN 201020152738 CN201020152738U CN201654081U CN 201654081 U CN201654081 U CN 201654081U CN 201020152738 CN201020152738 CN 201020152738 CN 201020152738 U CN201020152738 U CN 201020152738U CN 201654081 U CN201654081 U CN 201654081U
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Abstract
The utility model discloses a wafer test probe card, which comprises a bottom PCB board, wherein test probes are fixed on the bottom PCB board, and each test probe consists of a hollow probe post, a probe head and a probe spring; one end of the probe post is connected with the PCB board, the probe spring is positioned in the probe post, one end of the probe spring is connected with the bottom of the probe post, and the other end of the probe spring is connected with the probe head. The structure of the wafer test probe card is simple; when the wafer test probe card is used, the wafer test flow is simple, the technical quality is reliable, the operability is high, the wafer-level burn-in reliability is high, the test cost is reduced, the feedback of failure is quicker, a good and stable test result can be obtained, a great deal of material cost can be saved, and the efficiency can be greatly increased.
Description
Technical field
The present invention relates to the wafer sort probe of device, particularly a kind of novel structure in the wafer level semiconductor burn-in test field.
Background technology
Along with development of semiconductor, to technical requirements such as aging reliability of semiconductor and wafer sorts also is more and more higher, and requiring needs new breakthrough and improve the development of satisfying semiconductor applications in reduction raw materials cost, reduction testing cost, shortening production life cycle etc.Aging reliability of present various semiconductors and screening all rest on package level mostly, need relate to a packaging cost and raw material and expend problem.Though also have the aging reliability testing of part semiconductor to begin to be applied to wafer scale, though the restriction that exists on the ageing testing method and the problem on the test probe card are arranged.
As the patent No. is that " can implement wafer and implementation method thereof aging and testing electrical property " of CN 1818694A discloses a kind of the change and have the process of just carrying out burn-in test after encapsulation now, promptly wear out simultaneously on wafer and the method for testing electrical property.Use original test probe card but on test probe card, still prolong, still be very restricted on the test duration at test probe card test crystal grain (die).
The utility model content
The utility model purpose: technical problem to be solved in the utility model is at the deficiencies in the prior art, and a kind of wafer sort probe is provided.
Technical scheme: the utility model discloses a kind of wafer sort probe, comprise the bottom pcb board, be set with test probe on the bottom pcb board, described test probe comprises probe post, probe and the probe springs of hollow;
Described probe post one end connection PCB plate, probe springs is positioned at the probe post, the bottom of probe springs one end linking probe post, the other end connects described probe.
In the utility model, preferably, described probe post is a right cylinder.
In the utility model, preferably, described test probe is more than one.
In the utility model, preferably, described probe post is pointed for circle.
Beneficial effect: wafer sort probe described in the utility model, simple in structure, the wafer sort manufacturing process is simple behind use the utility model, technical quality is reliable, workable, wafer level burn reliability height, reduce testing cost, the feedback of Problem of Failure faster, can obtain preferable and stable test result, play a large amount of conservation costs and increase substantially efficient.
Description of drawings
Below in conjunction with the drawings and specific embodiments the utility model is done further to specify, above-mentioned and/or otherwise advantage of the present utility model will become apparent.
Fig. 1 is the utility model structural representation.
Fig. 2 is a test probe part structure for amplifying synoptic diagram among Fig. 1.
The wafer of Fig. 3 for testing described in the utility model.
Embodiment:
As depicted in figs. 1 and 2, the utility model discloses a kind of wafer sort probe, comprise bottom pcb board 1, be set with test probe 2 on bottom pcb board 1, described test probe 2 comprises probe post 3, probe 4 and the probe springs 5 of hollow; Described probe post one end connection PCB plate is used for being interconnected to every test probe the pin card of test machine measuring head, forms a test access in aging reliability test system like this.Probe springs is positioned at the probe post, the bottom of probe springs one end linking probe post, and the other end connects described probe.Described probe post is a right cylinder.Described test probe is more than one.Described probe post is pointed for circle.
Fig. 3 is the wafer that wafer sort probe described in the utility model will be tested.
The present utility model changes the present situation of semicon industry device at just wear out after the encapsulation or after the letter encapsulation reliability testing or filler test, use a kind of special probe that aging and testing electrical property together are placed on the wafer and do, simultaneously to the disposable aging and disposable testing electrical property of all crystal grains (die) on the full wafer wafer.Distribute according to the probe location that the electrode protection pad (pad) of crystal grain on the wafer distributes or crystal grain (die) layout design defines test probe card (contact pin card).The probe of this test probe card can adopt novel syringe needle to be the sharp type of circle, and the pin post is that the brass of column type is made, and spring is arranged in the pin post, can play buffer action when probe touches on the electrode protection pad.This probe card substrate is the PCB multilayer board, is used for being interconnected to test machine pin card with every test probe.Can obtain preferable and stable test result, play the conservation cost and increase substantially efficient.
This wafer level burn reliability wafer sort probe is a kind ofly to implement to wear out (aging) and the new method of testing electrical property wafer (wafer) and new test probe card.Test probe can adopt the used probe of ICT automatic station on designing and producing, but higher to the requirement meeting of pin, can define according to the product requirement of reality and set such as big or small thickness length of pin etc.Test probe is stuck in when being connected with tested wafer before the test, and the electrode protection pad (pad) that the test probe head touches wafer has an individual process that cushions when going up, and plays good connection then.Can be widely used in FLASHmemories, VCSELs, Logic or DRAMs. time digestion period shorten, reduced testing cost, raw material expends, and has improved production capacity, faster the feedback of Problem of Failure, can obtain preferable and stable test result, play the conservation cost and increase substantially efficient.
Use a kind of special probe that aging and testing electrical property together are placed on the wafer and do, simultaneously to the disposable aging and disposable testing electrical property of all crystal grains (die) on the full wafer wafer.The issue of probe on the wafer-level test probe is that the probe location that the electrode protection pad (pad) according to crystal grain on client's wafer distributes or crystal grain (die) layout design defines test probe card (contact pin card) distributes.The probe of this test probe card can adopt novel syringe needle to be the sharp type of circle, and the pin post is that the brass of column type is made.Want ben be this wafer probe cards be fixed on size on the test machine measuring head and wafer extension size big or small consistent (with on the measuring head on consolidate except the draw-in groove), the probe of this kind wafer sort simultaneously is disposable whole wafer electrode protection pad (pad) contact, can guarantee to connect the balance of contact, can better obtain reliable probe like this and contact with pin.And probe station also provides test and aging needed temperature.
The utility model provides a kind of thinking and method of wafer sort probe; the method and the approach of this technical scheme of specific implementation are a lot; the above only is a preferred implementation of the present utility model; should be understood that; for those skilled in the art; under the prerequisite that does not break away from the utility model principle, can also make some improvements and modifications, these improvements and modifications also should be considered as protection domain of the present utility model.The all available prior art of each ingredient not clear and definite in the present embodiment is realized.
Claims (4)
1. a wafer sort probe is characterized in that, comprises the bottom pcb board, is set with test probe on the bottom pcb board, and described test probe comprises probe post, probe and the probe springs of hollow;
Described probe post one end connection PCB plate, probe springs is positioned at the probe post, the bottom of probe springs one end linking probe post, the other end connects described probe.
2. a kind of wafer sort probe according to claim 1 is characterized in that described probe post is a right cylinder.
3. a kind of wafer sort probe according to claim 1 is characterized in that described test probe is more than one.
4. a kind of wafer sort probe according to claim 1 is characterized in that, described probe post is pointed for circle.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201020152738 CN201654081U (en) | 2010-04-07 | 2010-04-07 | Wafer test probe card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201020152738 CN201654081U (en) | 2010-04-07 | 2010-04-07 | Wafer test probe card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201654081U true CN201654081U (en) | 2010-11-24 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201020152738 Expired - Fee Related CN201654081U (en) | 2010-04-07 | 2010-04-07 | Wafer test probe card |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201654081U (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105679374A (en) * | 2015-12-31 | 2016-06-15 | 深圳市金胜电子科技有限公司 | Flash memory particle detection device |
| CN109860069A (en) * | 2019-01-31 | 2019-06-07 | 上海华虹宏力半导体制造有限公司 | The test method of wafer |
| CN110118883A (en) * | 2018-02-07 | 2019-08-13 | 中华精测科技股份有限公司 | Probe card device and its signal Transmission Part |
| CN113484561A (en) * | 2021-07-07 | 2021-10-08 | 上海泽丰半导体科技有限公司 | Probe card and wafer test system |
| CN114487789A (en) * | 2022-04-02 | 2022-05-13 | 浙江清华柔性电子技术研究院 | Wafer detection probe and wafer detection system |
| CN114895082A (en) * | 2022-05-20 | 2022-08-12 | 丹东富田精工机械有限公司 | Wafer test probe module |
-
2010
- 2010-04-07 CN CN 201020152738 patent/CN201654081U/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105679374A (en) * | 2015-12-31 | 2016-06-15 | 深圳市金胜电子科技有限公司 | Flash memory particle detection device |
| CN105679374B (en) * | 2015-12-31 | 2019-06-14 | 深圳市金胜电子科技有限公司 | A kind of flash memory particle detection device |
| CN110118883A (en) * | 2018-02-07 | 2019-08-13 | 中华精测科技股份有限公司 | Probe card device and its signal Transmission Part |
| CN109860069A (en) * | 2019-01-31 | 2019-06-07 | 上海华虹宏力半导体制造有限公司 | The test method of wafer |
| CN109860069B (en) * | 2019-01-31 | 2022-03-08 | 上海华虹宏力半导体制造有限公司 | Wafer testing method |
| CN113484561A (en) * | 2021-07-07 | 2021-10-08 | 上海泽丰半导体科技有限公司 | Probe card and wafer test system |
| CN114487789A (en) * | 2022-04-02 | 2022-05-13 | 浙江清华柔性电子技术研究院 | Wafer detection probe and wafer detection system |
| CN114895082A (en) * | 2022-05-20 | 2022-08-12 | 丹东富田精工机械有限公司 | Wafer test probe module |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: GUODIAN PHOTOVOLTAIC (JIANGSU) CO., LTD. Free format text: FORMER OWNER: JIANGSU HUACHUANG PHOTOELECTRIC TECHNOLOGY CO., LTD. Effective date: 20110922 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20110922 Address after: 214213 Jiangsu Yixing Economic Development Zone East Avenue GUI Patentee after: Guodian Technology & Environment Co., Ltd. Address before: 214213, 8 building, creative software building, Wen Zhuang Road, Yixing Economic Development Zone, Jiangsu, Yixing, 4 Patentee before: Jiangsu Huachuang Photoelectric Technology Co., Ltd. |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20101124 Termination date: 20140407 |