CN201532581U - Performance test device of distributed control system - Google Patents
Performance test device of distributed control system Download PDFInfo
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- CN201532581U CN201532581U CN2009201218821U CN200920121882U CN201532581U CN 201532581 U CN201532581 U CN 201532581U CN 2009201218821 U CN2009201218821 U CN 2009201218821U CN 200920121882 U CN200920121882 U CN 200920121882U CN 201532581 U CN201532581 U CN 201532581U
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Abstract
The utility model designs a performance test device of a distributed control system. The performance test device is characterized by comprising a data gathering module, an analog quantity test signal generating module and an impulse signal generation module, wherein the input end of the data gathering module is connected with a distributed control system, the output end thereof is connected with a computer through a USB interface circuit, the input end of the analog quantity test signal gathering module is connected with the distributed control system, the output end thereof is connected with a computer through a USB interface circuit, the input end of the impulse signal generation module is connected with the distributed control system, and the output end is connected with the computer through a LPT interface. Compared with the prior art, the performance test device has the advantages of supplying convenient technical means for performance test of the distributed control system, and supplying technical guarantee for guaranteeing the safe and stable running of industrial production.
Description
Technical field
The utility model relates to a kind of performance testing device of Distributed Control System (DCS).
Background technology
At present, Distributed Control System (DCS) is widely used at industrial circle, and becomes the Surveillance center of industrial processes, and the reliability of its performance has constituted crucial influence to the safety of production run with stablizing.At present, the device that does not also carry out integration test at Distributed Control System (DCS) multinomial performance index.
The utility model content
Technical problem to be solved in the utility model is the performance testing device that a kind of Distributed Control System (DCS) is provided at above-mentioned prior art, can provide technical guarantee for industrial process safety, stable operation when Distributed Control System (DCS) is moved.
The utility model solves the problems of the technologies described above the technical scheme that is adopted: the performance testing device of this Distributed Control System (DCS) is characterized in that: comprise
Data acquisition module, its input end links to each other with Distributed Control System (DCS), output terminal links to each other with computing machine by usb circuit, be used to test the output accuracy of Distributed Control System (DCS) AO passage, or the processing cycle of test Distributed Control System (DCS) central processor unit, or the redundant handoff functionality and the switching time of testing power supply, or redundant handoff functionality of test controller and switching time, or the redundant handoff functionality and the switching time of test communication module;
Analog quantity test signal generation module, its input end links to each other with Distributed Control System (DCS), output terminal links to each other with computing machine by usb circuit, be used to test the AI passage precision of Distributed Control System (DCS), or the series mode rejection ratio of test Distributed Control System (DCS), or the antijamming capability of test Distributed Control System (DCS);
The pulse signal generation module, its input end links to each other with Distributed Control System (DCS), output terminal links to each other with computing machine by the LPT interface circuit, be used to test the function of the SOE of Distributed Control System (DCS), or clock synchronization between the station of test Distributed Control System (DCS), or DO, the DI passage anti-trembling function of test Distributed Control System (DCS).
Described data acquisition module is by eight tunnel analog quantity input switch integrated circuit, the high-speed a/d converter ic, the single-chip microcomputer integrated circuit, the first ternary gating circuit, the second ternary gating circuit, the fifo fifo buffer circuit, these 7 integrated circuit of usb circuit are formed, wherein 8 tunnel of Distributed Control System (DCS) analog quantity input signals link to each other with 8 tunnel analog quantity input pins of eight tunnel analog quantity input switch integrated circuit, the input channel selection instruction of eight tunnel analog quantity input switch integrated circuit is controlled by the single-chip microcomputer integrated circuit, the output pin of eight tunnel analog quantity input switch integrated circuit links to each other with the signal input pin of high-speed a/d converter ic, the chip selection signal of high-speed a/d converter ic is selected control by the single-chip microcomputer integrated circuit, the high-order output pin of high-speed a/d converter ic links to each other with the first ternary gating circuit, the low level output pin of high-speed a/d converter ic links to each other with the second ternary gating circuit, the first ternary gating circuit, the second ternary gating circuit under the control of single-chip microcomputer integrated circuit according to first least-significant byte after the order of the most-significant byte data after with the conversion of high-speed a/d converter ic output send into the input pin of fifo fifo buffer circuit successively, the state of fifo fifo buffer circuit is by the control of single-chip microcomputer integrated circuit; The data output pin of fifo fifo buffer circuit and the input pin of usb circuit link to each other, usb circuit reads data in the fifo fifo buffer circuit by dma mode, data read and confirmation signal are by the control of single-chip microcomputer integrated circuit, and usb circuit carries out exchanges data by USB interface data line and USB interface of computer.
Described analog quantity test signal generation module is made up of singlechip controller, usb circuit, data storage circuitry, D/A change-over circuit, two-wire transmitter, wherein usb circuit is connected with USB interface of computer and is used for the data file that receiving computer sends, the output terminal of usb circuit links to each other with the input end of data storage circuitry, accepts the control of singlechip controller; The output terminal of memory circuit links to each other with the input end of D/A change-over circuit, and accepts the control of singlechip controller; The output terminal of D/A change-over circuit links to each other with the two-wire transmitter, and accepts the control of singlechip controller; The two-wire transmitter is converted to passive electric current output with voltage signal.
Described pulse signal generation module is made up of 8 photoelectrical couplers, the LPT interface circuit P2～P9 pin of computing machine is connected with the illuminator of 8 photoelectrical couplers is anodal respectively, the negative pole of the illuminator of 8 photoelectrical couplers is connected with the P25 pin of LTP interface circuit, and two output terminals of the light-receiving device of 8 photoelectrical couplers are as pulse signal output end.
Compared with prior art, advantage of the present utility model is: for the performance test of Distributed Control System (DCS) provides technological means easily, provide technique guarantee for guaranteeing industrial safety, stable operation.
Description of drawings
Fig. 1 is the system architecture diagram of the utility model embodiment.
Fig. 2 is the circuit block diagram of the data acquisition module of the utility model embodiment.
Fig. 3 is the circuit block diagram of the analog quantity test signal generation module of the utility model embodiment.
Fig. 4 is the circuit block diagram of the pulse signal generation module of the utility model embodiment.
Embodiment
Embodiment describes in further detail the utility model below in conjunction with accompanying drawing.
The performance testing device of Distributed Control System (DCS) as shown in Figure 1 comprises data acquisition module, analog quantity test signal generation module and pulse signal generation module, wherein
Data acquisition module, its input end links to each other with Distributed Control System (DCS), output terminal links to each other with computing machine by usb circuit, be used to test the output accuracy of Distributed Control System (DCS) AO passage, or the processing cycle of test Distributed Control System (DCS) central processor unit, or the redundant handoff functionality and the switching time of testing power supply, or redundant handoff functionality of test controller and switching time, or the redundant handoff functionality and the switching time of test communication module;
Analog quantity test signal generation module, its input end links to each other with Distributed Control System (DCS), output terminal links to each other with computing machine by usb circuit, be used to test the AI passage precision of Distributed Control System (DCS), or the series mode rejection ratio of test Distributed Control System (DCS), or the antijamming capability of test Distributed Control System (DCS);
The pulse signal generation module, its input end links to each other with Distributed Control System (DCS), output terminal links to each other with computing machine by the LPT interface circuit, be used to test the function of the SOE of Distributed Control System (DCS), or clock synchronization between the station of test Distributed Control System (DCS), or DO, the DI passage anti-trembling function of test Distributed Control System (DCS).
Above-mentioned data acquisition module is the multi-analog input switch integrated circuit of ADG503 by model, model is the high-speed a/d converter ic of ADS1602, model is the single-chip microcomputer integrated circuit of P89v51, model is the first ternary gating circuit of SN54HCT245, model is the second ternary gating circuit of SN54HCT245, model is the fifo fifo buffer circuit of IDT7207, model is that these 7 integrated circuit of usb circuit of PDIUBSD12 are formed, referring to shown in Figure 2, wherein 8 tunnel of Distributed Control System (DCS) analog quantity input signals access model is the S1～S8 pin of the multi-analog input switch integrated circuit of ADG503, model is that pin and the model of A0～A3 of the multi-analog input switch integrated circuit of ADG503 is that the P0.0～P0.3 of the single-chip microcomputer integrated circuit of P89v51 is connected, accept the corresponding passage of input channel selection instruction connection that the single-chip microcomputer integrated circuit sends, and corresponding simulating amount signal is exported by D and EN pin; Model is that the signal input part IN of high-speed a/d converter ic of ADS1602 and the D of INGND pin and multi-analog input switch integrated circuit are connected with the EN pin, sheet selects the P2.1 pin of CS pin and single-chip microcomputer integrated circuit to be connected, after multi-analog input switch integrated circuit is connected the passage of needs, the single-chip microcomputer integrated circuit sends the CS signal, the high-speed a/d converter ic carries out the A/D conversion to signal, and the numerical value of changing is passed through D0～15 export, send to the P1.0 of single-chip microcomputer integrated circuit pin by the RD pin simultaneously and convert signal; The high low level of the signal after the conversion is divided into 2 groups and has entered the first ternary gating circuit, the A1 of the second ternary gating circuit～A8 pin, the P0.4 of single-chip microcomputer integrated circuit and P0.5 pin respectively with the first ternary gating circuit, the OE pin of the second ternary gating circuit connects, send into the D0～D7 pin of fifo fifo buffer circuit successively according to the order of most-significant byte behind the first least-significant byte data after with the AD conversion, the state of fifo fifo buffer circuit is connected with P1.2 with the P1.1 of single-chip microcomputer integrated circuit with EF by pin FF, send in the single-chip microcomputer integrated circuit, the P0.6 pin of single-chip microcomputer integrated circuit is connected with the W pin of fifo fifo buffer circuit, and control writes data in the fifo fifo buffer circuit successively; The data output Q0～Q7 pin of fifo fifo buffer circuit and the DATA0～DATA7 pin of usb circuit are connected, usb circuit reads data in the fifo fifo buffer circuit by dma mode, data read is connected with the P2.0 pin with the P1.3 of DMACK_N pin and single-chip microcomputer integrated circuit by DMREQ with confirmation signal, P0.7 pin by the single-chip microcomputer integrated circuit sends the R pin of reading data signal to the fifo fifo buffer circuit, data are sent into the DATA0～DATA7 port of usb circuit, carry out exchanges data by D+ and D-data line and USB interface of computer.
Entire circuit is to work under the control of P89v51 single-chip microcomputer integrated circuit in model, what the device of a whole set of circuit was selected for use is low energy-consumption electronic device, the power consumption of reduction equipment has adopted the FIFO mode that data are cushioned, and guarantees that data can not cause loss of data because of the intersystem communications reason.Adopt the book rate of high-speed data acquisition to be not less than 100,000 times/second, to satisfy the needs of Distributed Control System (DCS) performance test.
Above-mentioned analog quantity test signal generation module is the singlechip controller of P89v51 by model, model is the usb circuit of PDIUSBD12USB, model is the data storage circuitry of HM62256, model is the D/A change-over circuit of ADS1601, model is that the two-wire transmitter of XTR101 is formed, referring to shown in Figure 3, wherein usb circuit (PDIUSBD12) is from the computing machine accepted data file, send the data sending request signal by the DMREQ pin to the P3.0 pin of singlechip controller (P89v51), singlechip controller (P89v51) passes through the address strobe pin A0～A14 transmission address data memory instruction to data storage circuitry (HM62256) of P0.0～P0.7 pin and P1.0 and P1.5 pin after receiving signal, and send confirmation signal to the DMACK_N pin of usb circuit (PDIUSBD12) by the P2.0 pin, WE by P2.1～P2.3 pin control data memory circuit (HM62256), OE, thereby the Wave data file that CS three-prong control data memory circuit (HM62256) storage is transmitted from USB interface, usb circuit (PDIUSBD12) is by the IO0～IO7 pin transmission data of DATA0～DATA7 pin to HM62256, after data transmission is finished, DB0～DB7 the pin of D/A change-over circuit (ADS1601) is sent into by IO0～IO7 the data of storage in the data storage circuitry (HM62256) in single-chip microcomputer P89v51 control successively with data, single-chip microcomputer P89V51 is by the CS of pin P2.4～P2.6 control D/A change-over circuit (ADS1601), WR, the UPD pin, digital signal is converted to simulating signal, by IoutA and AGND pin output simulating signal, two-wire transmitter (XTR101) by+IN and-the IN pin accepts this analog signals, the BCONTROL of two-wire transmitter (XTR101) connects the base stage of a triode, the transmitter of triode links to each other with the E pin of two-wire transmitter (XTR101), the collector of triode links to each other with the VCC pin of two-wire transmitter (XTR101) after connecting resistance R, be connected an electric capacity between the out pin of the VCC pin of two-wire transmitter (XTR101) and two-wire transmitter (XTR101), the two-wire transmitter is converted to the passive electric current output of 4～20mA with voltage signal, each output loop all adopts independent circuits, element adopts low power dissipation design, can produce the required signal of Distributed Control System (DCS) analog input channel test.
The pulse signal generation module is made up of 8 photoelectrical couplers, referring to shown in Figure 4, the LPT interface circuit P2～P9 pin of computing machine is connected with the illuminator of 8 photoelectrical couplers is anodal respectively, the negative pole of the illuminator of 8 photoelectrical couplers is connected with the P25 pin of LTP interface circuit, and two output terminals of the light-receiving device of 8 photoelectrical couplers are as pulse signal output end.
Computer CPU dominant frequency signal has reached the GHZ order of magnitude at present, and frequency stability and accuracy are very high, and the signal source that is used as mS level pulse signal can be accomplished the 0mS error fully, is desirable time reference signal.The technical program adopts the method, extract the CPU frequency signal, through frequency dividing circuit, produce specific sequences of pulsed signals signal, by the output of computing machine LPT mouth, the P2 of LPT interface～P9 pin connects the pin one of 8 photoelectric coupled device MOC3041 respectively, and the pin two of MOC3041 all is connected with the P25 pin of LPT interface, thereby control the on off operating mode of each MOC3041 by P2～P9 of LPT, thereby control the on off operating mode of output channel.As signal source the switching value input channel of Distributed Control System (DCS) is carried out performance test.
Claims (4)
1. the performance testing device of a Distributed Control System (DCS) is characterized in that: comprise
Data acquisition module, its input end links to each other with Distributed Control System (DCS), and output terminal links to each other with computing machine by usb circuit;
Analog quantity test signal generation module, its input end links to each other with Distributed Control System (DCS), and output terminal links to each other with computing machine by usb circuit;
The pulse signal generation module, its input end links to each other with Distributed Control System (DCS), and output terminal links to each other with computing machine by the LPT interface circuit.
2. the performance testing device of Distributed Control System (DCS) according to claim 1, it is characterized in that: described data acquisition module is by eight tunnel analog quantity input switch integrated circuit, the high-speed a/d converter ic, the single-chip microcomputer integrated circuit, the first ternary gating circuit, the second ternary gating circuit, the fifo fifo buffer circuit, these 7 integrated circuit of usb circuit are formed, wherein 8 tunnel of Distributed Control System (DCS) analog quantity input signals link to each other with 8 tunnel analog quantity input pins of eight tunnel analog quantity input switch integrated circuit, the input channel selection instruction of eight tunnel analog quantity input switch integrated circuit is controlled by the single-chip microcomputer integrated circuit, the output pin of eight tunnel analog quantity input switch integrated circuit links to each other with the signal input pin of high-speed a/d converter ic, the chip selection signal of high-speed a/d converter ic is selected control by the single-chip microcomputer integrated circuit, the high-order output pin of high-speed a/d converter ic links to each other with the first ternary gating circuit, the low level output pin of high-speed a/d converter ic links to each other with the second ternary gating circuit, the first ternary gating circuit, the second ternary gating circuit under the control of single-chip microcomputer integrated circuit according to first least-significant byte after the order of the most-significant byte data after with the conversion of high-speed a/d converter ic output send into the input pin of fifo fifo buffer circuit successively, the state of fifo fifo buffer circuit is by the control of single-chip microcomputer integrated circuit; The data output pin of fifo fifo buffer circuit and the input pin of usb circuit link to each other, usb circuit reads data in the fifo fifo buffer circuit by dma mode, data read and confirmation signal are by the control of single-chip microcomputer integrated circuit, and usb circuit carries out exchanges data by USB interface data line and USB interface of computer.
3. the performance testing device of Distributed Control System (DCS) according to claim 1, it is characterized in that: described analog quantity test signal generation module is made up of singlechip controller, usb circuit, data storage circuitry, D/A change-over circuit, two-wire transmitter, wherein usb circuit is connected with USB interface of computer and is used for the data file that receiving computer sends, the output terminal of usb circuit links to each other with the input end of data storage circuitry, accepts the control of singlechip controller; The output terminal of memory circuit links to each other with the input end of D/A change-over circuit, and accepts the control of singlechip controller; The output terminal of D/A change-over circuit links to each other with the two-wire transmitter, and accepts the control of singlechip controller; The two-wire transmitter is converted to passive electric current output with voltage signal.
4. the performance testing device of Distributed Control System (DCS) according to claim 1, it is characterized in that: described pulse signal generation module is made up of 8 photoelectrical couplers, the LPT interface circuit P2～P9 pin of computing machine is connected with the illuminator of 8 photoelectrical couplers is anodal respectively, the negative pole of the illuminator of 8 photoelectrical couplers is connected with the P25 pin of LTP interface circuit, and two output terminals of the light-receiving device of 8 photoelectrical couplers are as pulse signal output end.
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| CN2009201218821U CN201532581U (en) | 2009-06-04 | 2009-06-04 | Performance test device of distributed control system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105159279A (en) * | 2015-08-26 | 2015-12-16 | 河北省电力建设调整试验所 | DCS automatically checking method |
| CN114995344A (en) * | 2022-06-11 | 2022-09-02 | 北京国控天成科技有限公司 | Safety protection method based on control system of refining production device |
-
2009
- 2009-06-04 CN CN2009201218821U patent/CN201532581U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105159279A (en) * | 2015-08-26 | 2015-12-16 | 河北省电力建设调整试验所 | DCS automatically checking method |
| CN114995344A (en) * | 2022-06-11 | 2022-09-02 | 北京国控天成科技有限公司 | Safety protection method based on control system of refining production device |
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