CN201230403Y - 印刷电路板 - Google Patents

印刷电路板 Download PDF

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Publication number
CN201230403Y
CN201230403Y CNU200820301435XU CN200820301435U CN201230403Y CN 201230403 Y CN201230403 Y CN 201230403Y CN U200820301435X U CNU200820301435X U CN U200820301435XU CN 200820301435 U CN200820301435 U CN 200820301435U CN 201230403 Y CN201230403 Y CN 201230403Y
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CN
China
Prior art keywords
circuit board
hole
printed circuit
pcb
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNU200820301435XU
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English (en)
Inventor
王萍
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
Original Assignee
Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hongfujin Precision Industry Shenzhen Co Ltd, Hon Hai Precision Industry Co Ltd filed Critical Hongfujin Precision Industry Shenzhen Co Ltd
Priority to CNU200820301435XU priority Critical patent/CN201230403Y/zh
Priority to US12/205,151 priority patent/US20100000778A1/en
Application granted granted Critical
Publication of CN201230403Y publication Critical patent/CN201230403Y/zh
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09545—Plated through-holes or blind vias without lands
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

一种印刷电路板，包括一顶层、一底层及一中间层，所述印刷电路板上开设一穿透所述顶层、底层及中间层的通孔，所述中间层包括至少两个层面，所述通孔仅在所述中间层的两个层面上设有焊盘。本实用新型印刷电路板省去通孔在电路板顶层和底层的焊盘，有利于实现更紧凑的印刷电路板布局设计。

Description

印刷电路板
技术领域
本实用新型涉及一种印刷电路板，尤指一种具特殊过孔的印刷电路板。
背景技术
在多层PCB(Printed Circuit Board，印刷电路板)设计中，由于布线密度、拓扑结构的要求，信号走线经常需要在层间切换，如果它所参考的地平面也发生变化，那么该信号的回流路径将发生变化，从而产生一定的EMI(Electro Magnetic Interference，电磁干扰)问题，解决这一问题最简单有效的方法就是合理添加电容或过孔，在信号走线换层的附近多设置一些接地通孔(或电源孔)和电容能为信号提供完整的低阻抗的回路，保证信号和回流之间的耦合，从而抑制EMI。
传统的接地通孔或其它信号孔在PCB的每一层面上都具有焊盘(见图1)，以实现通孔的电镀内层与印刷电路板表面(或内部)的走线的电气连接。但是，在实际应用中，PCB顶层和底层的通孔焊盘有些是空置无用的，对PCB的空间造成不必要的浪费，不利于更紧凑的印刷电路板布局设计。
实用新型内容
鉴于以上内容，有必要提供一种可紧凑布局的印刷电路板。
一种印刷电路板，包括一顶层、一底层及一中间层，所述印刷电路板上开设一穿透所述顶层、底层及中间层的通孔，所述中间层包括至少两个层面，所述通孔仅在所述中间层的两个层面上设有焊盘。
本实用新型印刷电路板上开设的通孔省去了在印刷电路板顶层及底层的焊盘，节省了电路板的空间，有利于实现更紧凑的印刷电路板布局设计。
附图说明
图1为传统印刷电路板及其通孔的示意图。
图2为本实用新型较佳实施方式印刷电路板及其通孔的示意图。
具体实施方式
请参阅图1，本实用新型较佳实施方式印刷电路板包括一顶层、一底层及设于所述顶层及底层之间的两接地层，一通孔1垂直穿设于所述印刷电路板的顶层、两接地层及底层，所述通孔1仅在所述两接地层上具有焊盘2，所述通孔1的钻孔直径为14mil(1mil＝千分之一寸)，所述焊盘2的外径为20mil。
在制板过程中，先以所述焊盘2所在位置的中心轴线为准钻孔(钻孔直径为14mil)，再在该钻孔内壁镀上涂层，使之成为具有导电性的通孔1，实现所述两接地层之间的层间电气连通，由于涂层的厚度大致在1mil-2mil之间，因此所述通孔1完工后的内径在12mil-10mil之间。
在本实用新型较佳实施方式中，所述通孔1为接地孔，设置于高速信号换层的过孔附近为信号提供完整的低阻抗的回路，以保证信号和回流之间的耦合，从而抑制EMI。所述通孔1在接地层上的焊盘2与高速信号换层走线有连接关系，在顶层和底层未设置焊盘，与电路板的走线没有连接关系。
由于省去了顶层及底层的通孔焊盘，印刷电路板的空间能更紧凑的运用，且通过仿真验证，所述通孔1不但能实现传统通孔的电气性能，而且在传输频率在10GHZ以上的信号时较传统通孔性能更佳。
所述印刷电路板亦可为其它层数的多层印刷电路板，由顶层、中间层及底层组成，其中间层可以包括接地层、电源层及信号层等。
所述通孔1亦可为其它实现电路板层间互连的信号孔，所述信号孔在电路板的顶层、底层和中间层的某些层面无需与电路板的走线连接，因此可以省去在这些层面上的焊盘。

Claims (6)

  1. 【权利要求1】一种印刷电路板，包括一顶层、一底层及设于所述顶层及底层之间的中间层，所述印刷电路板上开设一穿透所述顶层、底层及中间层的通孔，所述中间层包括至少两个层面，其特征在于：所述通孔仅在所述中间层的两个层面上设有焊盘。
  2. 【权利要求2】如权利要求1所述的印刷电路板，其特征在于：所述通孔为信号孔。
  3. 【权利要求3】如权利要求2所述的印刷电路板，其特征在于：所述通孔为设于高速信号换层的过孔附近的接地孔。
  4. 【权利要求4】如权利要求3所述的印刷电路板，其特征在于：所述中间层包括两接地层，所述通孔仅在所述两接地层上设有焊盘。
  5. 【权利要求5】如权利要求2所述的印刷电路板，其特征在于：所述通孔为设于高速信号换层的过孔附近的电源孔。
  6. 【权利要求6】如权利要求5所述的印刷电路板，其特征在于：所述中间层包括两电源层，所述通孔仅在所述电源层上设有焊盘。
CNU200820301435XU 2008-07-03 2008-07-03 印刷电路板 Expired - Fee Related CN201230403Y (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CNU200820301435XU CN201230403Y (zh) 2008-07-03 2008-07-03 印刷电路板
US12/205,151 US20100000778A1 (en) 2008-07-03 2008-09-05 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU200820301435XU CN201230403Y (zh) 2008-07-03 2008-07-03 印刷电路板

Publications (1)

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CN201230403Y true CN201230403Y (zh) 2009-04-29

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US (1) US20100000778A1 (zh)
CN (1) CN201230403Y (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111338439A (zh) * 2020-02-23 2020-06-26 苏州浪潮智能科技有限公司 适用于双列直插式存储模块的卡槽、主板及主板设计方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9545003B2 (en) * 2012-12-28 2017-01-10 Fci Americas Technology Llc Connector footprints in printed circuit board (PCB)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6335494B1 (en) * 2000-06-23 2002-01-01 International Business Machines Corporation Multiple power distribution for delta-I noise reduction
US6643916B2 (en) * 2001-05-18 2003-11-11 Hewlett-Packard Development Company, L.P. Method to assemble a capacitor plate for substrate components
US7249337B2 (en) * 2003-03-06 2007-07-24 Sanmina-Sci Corporation Method for optimizing high frequency performance of via structures
US20090049414A1 (en) * 2007-08-16 2009-02-19 International Business Machines Corporation Method and system for reducing via stub resonance

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111338439A (zh) * 2020-02-23 2020-06-26 苏州浪潮智能科技有限公司 适用于双列直插式存储模块的卡槽、主板及主板设计方法
CN111338439B (zh) * 2020-02-23 2021-07-27 苏州浪潮智能科技有限公司 适用于双列直插式存储模块的卡槽、主板及主板设计方法

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Granted publication date: 20090429