CN201035573Y - Flash memory microcontroller - Google Patents
Flash memory microcontroller Download PDFInfo
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- CN201035573Y CN201035573Y CNU2007200673810U CN200720067381U CN201035573Y CN 201035573 Y CN201035573 Y CN 201035573Y CN U2007200673810 U CNU2007200673810 U CN U2007200673810U CN 200720067381 U CN200720067381 U CN 200720067381U CN 201035573 Y CN201035573 Y CN 201035573Y
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Abstract
The utility model provides a flash micro controller which comprises a kernel unit and a peripheral unit, and the kernel unit and the peripheral unit are mutually communicated through a bus. The kernel unit comprises a CPU, a clock generator, a reset logic and a memorizer; the peripheral unit comprises an input and output terminal, a timer and an A-D converter. The flash micro controller still comprises a function component unit which at least comprises a low voltage detecting and resetting module which is communicated with the kernel unit and the peripheral unit through a bus. The utility model overcomes the unstable factor of a power system, which is brought by the complex environment, stabilizes the power system and protects the load through being arranged with the low voltage detecting and resetting module, and increases the anti-jamming capability of the whole structure.
Description
Technical field
The utility model belongs to the SIC (semiconductor integrated circuit) design field, relates to a kind of flash memory microcontroller chip.
Background technology
Along with deep-submicron CMOS (complementary metal oxide semiconductor (CMOS), ComplementaryMetal-Oxide-Semiconductor Transistor) the continuous progress of integrated circuit production technology, can be integrated in the microcontroller of complexity (MCU) kernel on the chip piece at present, leave enough silicon area simultaneously and be used to realize complicated storer and peripheral hardware logic.The method for designing and the framework that are used for high-end 32 and 64 bit CPUs in the past can effectively be used for 8 8-digit microcontroller systems at a low price now.Utilize these powerful and cheap microcontrollers to make the integrated level of system improve constantly, also strengthened the ability that microprocessor data is handled and flow process is controlled simultaneously greatly.The plurality of advantages of microprocessor makes increasing microcontroller apply to the every field of social life, and development and national economy has been played requisite facilitation.And reliability, anti-interference, dirigibility, the compatibility of microcontroller also had more and more higher requirement.
At present exist following deficiency for 8 flash memory (FLASH) microcontroller on the market: (1) its power-supply system is subjected to the influence of various factors easily: as, the switch of electronic product can bring noise to power-supply system; Various radiation, radiowave also can bring noise to power-supply system, and the power supply overload can cause voltage to descend.When mains fluctuations were big, electronic product will be unstable, sometimes even can't normally move; Supply voltage is low excessively, and electronic product also can't normally move.So, when design flash memory microcontroller, must adopt safeguard measure, prevent that mains fluctuations from causing deadlock; (2) in addition, existing flash memory microcontroller lacks complete peripheral hardware, thereby has limited chip and outside getting in touch, for subsequent design is made troubles; (3) capacity of reservoir is bigger in the existing flash memory microcontroller, is generally tens of thousand bit, even last million, and cost is very high; (4) simultaneously, the reliability of existing flash memory microcontroller and dirigibility remain further to be improved.
Summary of the invention
The utility model has overcome the influence that extraneous factor brings for the flash memory microcontroller in the prior art, and a kind of flash memory microcontroller that can overcome labile factor that complex environment brings to power-supply system, stabilized power source system, protection load is provided.
The utility model is achieved through the following technical solutions:
A kind of flash memory microcontroller comprises: kernel unit, peripheral unit, and kernel unit, peripheral unit are by the mutual communication of bus; Described kernel unit comprises CPU (central processing unit), clock generator, reseting logic, storer, and described peripheral unit comprises input/output port, timer, analog to digital converter; This flash memory microcontroller also comprises the functional part unit, and this functional part unit comprises that at least low pressure detects and reseting module, this low pressure detect and reseting module by bus and kernel unit, peripheral unit communication.
In above-mentioned flash memory microcontroller, described low pressure detects and reseting module comprises control register, voltage detection circuit, wave filter and logic control circuit; Described control register links to each other with voltage detection circuit, wave filter and logic control circuit respectively by control line, described voltage detection circuit, wave filter and logic control circuit are connected in series by control line, and described logic control circuit has two signal output parts.
In above-mentioned flash memory microcontroller, described voltage detection circuit comprises bleeder circuit, voltage stabilizer and comparer; Supply voltage inserts bleeder circuit and voltage stabilizer, and control register connects bleeder circuit by control line, and the bleeder circuit voltage output end is connected to the comparer inverting input, and the voltage stabilizer voltage output end is connected to the comparer in-phase input end.
In addition, the utility model has overcome in the prior art defective of limited chip and external relation owing to lack complete peripheral unit, be achieved through the following technical solutions: in above-mentioned flash memory microcontroller, described peripheral unit also comprise in bus mode module between two-way seizure/comparison/pulse width modulation module, high speed serial peripheral interface, high-speed chip, the high-speed synchronous asynchronous receiver-transmitter module any one or a plurality of, above-mentioned each module inserts bus and kernel unit, functional part unit, and other peripheral unit communications respectively.
In above-mentioned flash memory microcontroller, described functional part unit also comprise in power in cell configuration position, the sheet time-delay reset module, WatchDog Timer, the park mode control module any one or a plurality of, above-mentioned each module insert bus with kernel unit, peripheral unit, reach other functional part unit communications.
Simultaneously, the utility model has also overcome the deficiency that memory capacity is big in the prior art, cost is high, be achieved through the following technical solutions: in above-mentioned flash memory microcontroller, described storer comprises program storage and data random access memory, and this data random access memory comprises specified register and general-purpose register.
In above-mentioned flash memory microcontroller, described program storage is that capacity is the FLASH program storage of 4K * 16bit, and the capacity of specified register is 64 * 8bit, and the capacity of general-purpose register is 192 * 8bit.
In above-mentioned flash memory microcontroller, described clock generator is the system clock oscillator; Described timer is No. three timers.
In above-mentioned flash memory microcontroller, described analog to digital converter is 85 channel modulus converters.
Compared with prior art, the flash memory microcontroller of the utility model announcement has following advantage:
1, provides a kind of 8 novel bit flash memory microcontrollers; by low pressure detection and reseting module being set, having overcome the labile factor that complex environment brings to power-supply system; can the stabilized power source system, the protection load, thereby can improve the antijamming capability of total.
2, the utility model has adopted the low capacity reservoir also at some compact electric apparatus, greatly reduces cost.
3, provide more complete peripheral hardware,, carry out internal task simultaneously easily so that single-chip microcomputer can be got in touch with the outside more easily.
4, provide a large amount of special features, improved the reliability of system, increased the dirigibility of design.
Description of drawings
Fig. 1 is the structured flowchart of the utility model flash memory microcontroller;
Fig. 2 is the structured flowchart of kernel unit and peripheral unit in the utility model;
Fig. 3 is the circuit connection diagram of detection of the utility model mesolow and reseting module;
Fig. 4 is a voltage detection circuit synoptic diagram in low pressure detection and the reseting module.
Embodiment
Below in conjunction with drawings and Examples the utility model is elaborated.
See also Fig. 1, disclosed a kind of flash memory microcontroller among the figure, comprise kernel unit 1, peripheral unit 2 and functional part unit 3; Kernel unit comprises CPU11, clock generator 12, reseting logic 13, storer 14; Peripheral unit 2 comprises input/output port 21, three road timer 2s 2, analog to digital converter 23, two-way seizure/comparison/pulse width modulation module 24, high speed serial peripheral interface 25, bus mode module 26 between high-speed chip, high-speed synchronous asynchronous receiver-transmitter module 27; The low pressure that comprises functional part unit 3 detects and reseting module 31, cell configuration position 32, sheet in power on time-delay reset module 33, WatchDog Timer 34, park mode control module 35; Above-mentioned each module insert bus 4, with other module communications.
(1) kernel unit
The utility model mainly is its storer 14 at the improvement of kernel unit.Described storer 14 comprises program storage and data random access memory, and described data random access memory comprises specified register and general-purpose register.Described program storage is that capacity is the FLASH program storage of 4K * 16bit, and the capacity of specified register is 64 * 8bit, and the capacity of general-purpose register is 192 * 8bit.Because the utility model has adopted the reservoir of low capacity, when finishing desired task, greatly reduces cost.
(2) peripheral unit
As Fig. 2, input/output port comprises port A (PA), port B (PB), port C (PC).Port A is 6 latchs, and the port of all of the port A all has TTL SMT enter drive, and its middle port PA4 has the CMOS output driver, and other port has the TTL output driver; Port B is eight bidirectional ports, the port of all of the port B has TTL SMT input and full TTL output driver, and they all have draws on inner weak, port PBO among the port B can be used as the external interrupt mouth that can select to interrupt the edge, and high six of port B can be used as fracture in the variation, and outside change in voltage is made interrupt response; Port C is one 8 a bidirectional port, and the port of all of the port C all has TTL SMT enter drive and CMOS output driver.
Three road timer 2s 2 comprise timer 2 21, timer 2 22, timer 2 23.Wherein: (1) timer 2 21 is 8 bit timings/counter, and CPU can carry out read-write operation to it, can select internal clocking and external clock reference for use, when selecting external clock, the clock edge that carries out able to programme is selected, and overflows to produce to overflow interruption, and timer 2 21 stops counting under the sleep pattern.(2) timer 2 22 is 16 bit timings/counter, and CPU can carry out read-write operation to it, and 3 pre-dividers able to programme can be selected internal clocking and external clock reference for use; When selecting external clock, external clock negative edge counting, and can be made as synchronous mode count mode or asynchronous mode, can do the time base of seizure, comparison module, counting overflows to produce and overflows interruption, if be set to the external asynchronous count mode, continue counting under the sleep pattern, overflow interruption and can wake CPU up.(3) timer 2 23 is 8 bit timing devices, and CPU can carry out read-write operation to it, 4 pre-dividers able to programme, 4 back able to programme frequency dividers, has only internal clock source, clock source frequency Fosc/4 can do the time base counter of pulse width modulation module, and counting overflows to produce and overflow interruption.
Analog to digital converter 23 is 85 channel modulus converters, its clock can have following selection: Frc, Fosc/2, Fosc/8, Fosc/32, wherein, FoSc promptly is the work clock of CPU, Frc is the clock that the special-purpose resistance-capacitance oscillator of described analog to digital converter is produced, analog to digital converter 23 can become corresponding 8 position digital signals with an analog signal conversion, and the utility model has 6 road analog input ends.
Seizure/comparison/pulse width modulation module 24 common multiplexing pins, can select different mode by setting related register, capture function can be caught following four kinds of situations on pin: when per 16 rising edges take place when per 4 rising edges take place when each rising edge takes place when each negative edge takes place in the signal, in the signal, in the signal, in the signal; Comparing function can trigger following incident when the incident of relatively coincideing takes place: to export this pin state be high level, export this pin state is low level, export that this pin state remains unchanged, special event triggers; The width modulation function can produce on pin that one-period is adjustable, the width modulation of 10 bit resolutions of EDM Generator of Adjustable Duty Ratio output.
High-speed synchronous asynchronism transceiver 27 has following several mode of operation: full duplex asynchronous pattern, the synchronous master mode of half-duplex, the synchronous follower mode of half-duplex.
The utility model makes single-chip microcomputer to get in touch with the outside more easily, and carries out internal task efficiently by above more complete peripheral hardware is provided.
(3) functional part unit
As shown in Figure 1, the functional part unit of flash memory microcontroller comprises 5 parts in the present embodiment, is respectively: time-delay reset module 33, WatchDog Timer 34, park mode control module 35 power in low pressure detection and reseting module 31, cell configuration position 32, the sheet.It is existing that details are as follows:
As Fig. 3, low pressure detects and reseting module 31 comprises control register 311, voltage detection circuit 312, wave filter 313 and logic control circuit 314; Described control register 311 links to each other with voltage detection circuit 312, wave filter 313, logic control circuit 314 respectively by control line, described voltage detection circuit 312, wave filter 313, logic control circuit 314 are by the control line serial connection, and described logic control circuit has two signal output parts.
The control register 311 of microprocessor is provided with the detection magnitude of voltage of voltage detection circuit 312 by control line, by control line wave filter 313 filtering periodic quantities is set, and by control line logic control circuit 314 is set and produces reset signal or reset interrupt.After supply voltage dropped to setting value, voltage detection circuit 312 passed to wave filter 313 by control line with voltage reduction signal and carries out Filtering Processing.If the mains fluctuations time, then wave filter 313 did not transmit signal less than the filtering time; Otherwise wave filter passes to logic control circuit 314 by control line with voltage reduction signal, and logic control circuit 314 produces reset interrupt signal 315 (BO RlF) or reset signal 316 (BOR).
As shown in Figure 4, supply voltage VDD enters bleeder circuit 3121 and voltage stabilizer 3122 by control line, and control register 311 is by control line control bleeder circuit 3121.Bleeder circuit 3121 output voltages are to comparer 3123 inverting inputs, and voltage stabilizer 3122 output voltages are to comparer 3123 in-phase input ends.The output voltage of bleeder circuit 3121 changes with the variation of supply voltage.
The utility model has overcome the labile factor that complex environment brings to power-supply system owing to increased that low pressure detects and reseting module, can the stabilized power source system, the protection load, thus can improve the antijamming capability of total.
Whether are the mode of operation of cell configuration position 32 decision devices and the utilization of partial function, as the time-delay that powers on, under-voltage reset, WatchDog Timer.
Time-delay reset module 33 powers in the sheet: can produce a reset signal during chip power, if the time-delay that powers on enables, the time-delay and after time-delay finishes of then beginning to power on activates the starting of oscillation timer chips by the time-delay reset module 33 that powers in the sheet and starts working.
WatchDog Timer 34 has 8 pre-dividers, adopts the 32KRC oscillator as counting clock, can produce to overflow to reset, and can wake CPU up under park mode.
Park mode control module 35: enter the blocking of oscillator of park mode device, input/output port keeps original level, and park mode control module 35 is waken CPU up by following incident: device resets; WatchDog Timer wakes (if WatchDog Timer is enabled) up; External interrupt.
The utility model is improved system reliability and design flexibility by above-mentioned special feature module is provided.
Above embodiment is the unrestricted the technical solution of the utility model in order to explanation only.Peripheral unit that increases as, the utility model and functional part unit can be increase in the module any one or a plurality of.Any modification or partial replacement that does not break away from the utility model spirit and scope all should be encompassed in the middle of the claim scope of the present utility model.
Claims (9)
1. a flash memory microcontroller comprises kernel unit, peripheral unit, and kernel unit, peripheral unit are by the mutual communication of bus; Described kernel unit comprises CPU, clock generator, reseting logic, storer, and described peripheral unit comprises input/output port, timer, analog to digital converter; It is characterized in that:
This flash memory microcontroller also comprises the functional part unit, and this functional part unit comprises that at least low pressure detects and reseting module, this low pressure detect and reseting module by bus and kernel unit, peripheral unit communication.
2. flash memory microcontroller as claimed in claim 1 is characterized in that, described low pressure detects and reseting module comprises control register, voltage detection circuit, wave filter and logic control circuit; Described control register links to each other with voltage detection circuit, wave filter, logic control circuit respectively by control line, described voltage detection circuit, wave filter, logic control circuit are connected in series by control line, and described logic control circuit has two signal output parts.
3. flash memory microcontroller as claimed in claim 2 is characterized in that described voltage detection circuit comprises bleeder circuit, voltage stabilizer and comparer; Supply voltage inserts bleeder circuit and voltage stabilizer, and control register connects bleeder circuit by control line, and the bleeder circuit voltage output end is connected to the comparer inverting input, and the voltage stabilizer voltage output end is connected to the comparer in-phase input end.
4. as claim 1 or 2 or 3 described flash memory microcontrollers, it is characterized in that, described peripheral unit also comprises two-way seizure/comparison/pulse width modulation module, high speed serial peripheral interface, bus mode module between high-speed chip, any one in the high-speed synchronous asynchronous receiver-transmitter module or a plurality of; Above-mentioned each module inserts bus and kernel unit, functional part unit respectively, reaches other peripheral unit communications.
5. as claim 1 or 2 or 3 described flash memory microcontrollers, it is characterized in that, described functional part unit also comprise in power in cell configuration position, the sheet time-delay reset module, WatchDog Timer, the park mode control module any one or a plurality of, above-mentioned each module insert bus with kernel unit, peripheral unit, reach other functional part unit communications.
6. as claim 1 or 2 or 3 described flash memory microcontrollers, it is characterized in that described storer comprises program storage and data random access memory, this data random access memory comprises specified register and general-purpose register.
7. flash memory microcontroller as claimed in claim 6 is characterized in that, described program storage is that capacity is the FLASH program storage of 4K * 16 bit, and the capacity of specified register is 64 * 8bit, and the capacity of general-purpose register is 192 * 8bit.
8. as claim 1 or 2 or 3 described flash memory microcontrollers, it is characterized in that described clock generator is the chip system clock oscillator; Described timer is No. three timers.
9. as claim 1 or 2 or 3 described flash memory microcontrollers, it is characterized in that described analog to digital converter is 85 channel modulus converters.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007200673810U CN201035573Y (en) | 2007-02-14 | 2007-02-14 | Flash memory microcontroller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007200673810U CN201035573Y (en) | 2007-02-14 | 2007-02-14 | Flash memory microcontroller |
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| CN201035573Y true CN201035573Y (en) | 2008-03-12 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNU2007200673810U Expired - Lifetime CN201035573Y (en) | 2007-02-14 | 2007-02-14 | Flash memory microcontroller |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103401425A (en) * | 2012-06-06 | 2013-11-20 | 崇贸科技股份有限公司 | Control circuit for power converter and digital power control circuit for power converter |
| WO2018053714A1 (en) * | 2016-09-21 | 2018-03-29 | 深圳市汇顶科技股份有限公司 | Single-chip microcomputer system, and reset method for single-chip microcomputer system |
| CN107860106A (en) * | 2017-10-19 | 2018-03-30 | 珠海格力电器股份有限公司 | Chip wiring method of controller and chip |
| CN111600276A (en) * | 2019-02-21 | 2020-08-28 | 瑞萨电子美国有限公司 | Automatic power-on reset detection and recovery for multi-phase digital buck controller |
| CN114632559A (en) * | 2022-01-26 | 2022-06-17 | 浙江大学 | On-chip micro-groove array digital PCR chip based on electrical impedance detection and manufacturing method thereof |
-
2007
- 2007-02-14 CN CNU2007200673810U patent/CN201035573Y/en not_active Expired - Lifetime
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103401425A (en) * | 2012-06-06 | 2013-11-20 | 崇贸科技股份有限公司 | Control circuit for power converter and digital power control circuit for power converter |
| CN103401425B (en) * | 2012-06-06 | 2016-12-28 | 崇贸科技股份有限公司 | Control circuit and digital power control circuit for power converter |
| WO2018053714A1 (en) * | 2016-09-21 | 2018-03-29 | 深圳市汇顶科技股份有限公司 | Single-chip microcomputer system, and reset method for single-chip microcomputer system |
| US11016548B2 (en) | 2016-09-21 | 2021-05-25 | Shenzhen GOODIX Technology Co., Ltd. | Single chip system and reset method for single chip system |
| CN107860106A (en) * | 2017-10-19 | 2018-03-30 | 珠海格力电器股份有限公司 | Chip wiring method of controller and chip |
| CN111600276A (en) * | 2019-02-21 | 2020-08-28 | 瑞萨电子美国有限公司 | Automatic power-on reset detection and recovery for multi-phase digital buck controller |
| CN111600276B (en) * | 2019-02-21 | 2024-04-16 | 瑞萨电子美国有限公司 | Automatic power-on reset detection and recovery for multiphase digital buck controller |
| CN114632559A (en) * | 2022-01-26 | 2022-06-17 | 浙江大学 | On-chip micro-groove array digital PCR chip based on electrical impedance detection and manufacturing method thereof |
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Legal Events
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
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| CP03 | Change of name, title or address |
Address after: 200030 B704I room, No. 666, Beijing East Road, Shanghai, Huangpu District, China Patentee after: SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD. Address before: 200030, 15 floor, Xuhui yuan building, 1089 south two road, Shanghai, Zhongshan Patentee before: Shanghai Hair Group Integated Circuit Co., Ltd. |
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| CX01 | Expiry of patent term |
Granted publication date: 20080312 |
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| CX01 | Expiry of patent term |