CN1987622A - Array base board structure of thin film transistor liquid crystal display and its producing method - Google Patents
Array base board structure of thin film transistor liquid crystal display and its producing method Download PDFInfo
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Abstract
Through enlarging contact area between transparent pixel electrode and drain electrode of thin film transistor (TFT), structure of array base plate (ABP) of TFT LCD form favorable connection. The method for preparing ABP of TFT LCD includes three steps of photoetching technology with masks: first, using first ordinary mask defines pattern of first layer of metal thin film so as to form grid scan lines, and grid electrode; then, using second mask i.e. graytone, semitransparent mask defines patterns of second layer of metal thin film and active layer to form channels of data scan lines, silicon island, source/drain electrodes and TFT; finally, using third ordinary mask defines second layer of insulation film i.e. pattern of passive film, and using lift off stripping technique forms patterns of transparent conductive film, i.e. transparent pixel electrodes. The invention reduces number of mask, and number of photoetching process, and simplifies procedure for preparing ABP of TFT LCD.
Description
Technical field
The present invention relates to array base-plate structure of a kind of Thin Film Transistor-LCD (TFT-LCD) and preparation method thereof.
Background technology
Lcd technology develops very soon, because it is in light weight, liquid crystal display device is widely used in portable electric appts.Along with the expansion of application, need aspect manufacturing technology, reduce cost and boost productivity.The making of a liquid crystal display device is to form pattern by the deposition of a cluster film and photoetching process to finish.The mask number that photoetching is used is the complicated and simple degree of weight liquid making LCD technology.One time photoetching process is used a mask.Many researchers after deliberation reduce the possible method of mask number because reduce the reduction that a mask means manufacturing cost.
A common liquid crystal display device is made up of color membrane substrates, array base palte and the liquid crystal that is sandwiched between the two.The structure of its array base palte is shown in Fig. 1 a and Fig. 1 b.Array base palte comprises one group of controlling grid scan line 1,2, one groups of data scanning lines 5 of gate electrode, source electrode 6, drain electrode 7, film transistor switch device and transparent pixels electrode 10.Controlling grid scan line 1 is parallel to each other and data scanning line 5 intersects to form matrix structure.Form a film transistor switch device in the position that controlling grid scan line 1 and data scanning line 5 intersect.It comprises 2, one of gate electrodes of drawing from controlling grid scan line 1 are in relative position from source electrode 6 that data scanning line 5 is drawn and one and source electrode drain electrode 7.Drain electrode 7 is output terminals of film transistor switch device.A transparent pixels electrode 10 forms by via hole on the passivation layer 8 and drain electrode 7 and electrically contacts.The part of controlling grid scan line 1 promptly forms memory capacitance with transparent pixels electrode 10 overlapping bossing and transparent pixels electrodes 10.
The array base palte manufacturing process flow of above-mentioned LCD as shown in Figures 2 and 3.Five times mask technique is finished by five step process as shown in Figure 2 successively, has used five mask.Four times mask technique is finished by four step process as shown in Figure 3 successively, has used four mask.Each step process is formed by thin film deposition, mask exposure, etching and photoresist lift off four procedures substantially.
Thin Film Transistor-LCD process for making shown in Fig. 1 a and Fig. 1 b is as described below.On glass substrate, form gate electrode 2 and controlling grid scan line 1 by the gate mask version; Successive sedimentation gate insulator 4, active layer film and Ohmic contact layer film on gate metal form semiconductor layer 3 by the semiconductor layer mask; Form source electrode 6, drain electrode 7 and data scanning line 5 by the source-drain electrode mask; Form the via hole of passivation layer film by the passivation layer mask; Form transparent pixels electrode 10 by transparent pixels electrode mask at last.
And four mask techniques are to utilize the translucent mask of gray tone, and the photoetching process of semiconductive layer and source-drain electrode is merged to in the middle of masking process.Its method is successive sedimentation gate insulator 4, active layer film and Ohmic contact layer film and is used to form source electrode 6 and the second layer metal film of drain electrode 7.At first utilize the territory, full impregnated area pellucida of the translucent mask of gray tone to form the silicon island of film transistor device, utilize the cineration technics of the translucent area of the translucent mask of gray tone and photoresist on the thin film transistor (TFT) silicon island, to form the channel part 13 of source electrode 6, drain electrode 7 and thin film transistor (TFT) then.Change the design and the thin film deposition processes order of mask, other five masks and four masking process technology are also arranged.
All there are the photoetching process complexity in five masks and four masking process of aforementioned thin-film transistor LCD device array substrate, use the many defectives of mask quantity.Some technology is when using liftoff stripping technology, and the special stripper of use not only corrodes photoresist, also other materials is corroded.Drawback such as low, the cost height of yields during above defective has caused and made.
Summary of the invention
In order to overcome the defective of prior art, the invention provides a kind of TFT-LCD array substrate structure, and a kind of manufacture method that is different from the array base palte of previous Thin Film Transistor-LCD.First purpose of the present invention provides a kind of TFT-LCD array substrate structure, makes to have excellent contact between the different materials, increases the contact area of transparent pixels electrode and drain electrode, and reduces the fraction defective in producing.Second purpose of the present invention provides a kind of manufacture method that adopts the thin-film transistor LCD device array substrate of translucent mask of gray tone and liftoff stripping technology, uses the array base palte making that three times mask is finished liquid crystal display device.Reduce the number of mask, simplified manufacturing process.The 3rd purpose of the present invention is to optimize liftoff stripping technology, when forming passivation layer pattern, in the exposure imaging technology of photoetching, makes the sidewall of photoresist vertical, and in etching technics, makes the passivation layer concave side wall.When carrying out liftoff stripping technology, utilize this side wall construction, can use common stripper, only photoresist is peeled off, and need do not corroded other material, improved the efficient and the reliability of liftoff stripping technology, reduced cost.By the following description of this invention and specific embodiment, can also recognize other advantage of the present invention.
To achieve these goals, the invention provides a kind of film transistor array base plate structure, comprise: glass substrate, be formed at controlling grid scan line on the glass substrate, data scanning line, thin film transistor (TFT) and transparent pixels electrode, the electrical connection of described transparent pixels electrode and described thin film transistor (TFT) drain electrode is to cover thin film transistor (TFT) drain electrode upper surface by the transparent pixels electrode, forms that full contacting structure realizes.
Wherein, described transparent pixels electrode directly contacts electrical connection with active layer with the ohmic contact layer sidewall in the side-walls of thin film transistor (TFT).In making thin-film transistor array base-plate technology, when the passivation layer film is carried out etching, realize the sidewall pattern of indent, therefore when the deposit transparent pixel electrode, just formed the structure of transparent pixels electrode in the indent side-walls disconnection of passivation layer film.
For achieving the above object, the present invention also provides a kind of method of making thin-film transistor array base-plate, comprises the following steps: at first, and an insulation transparent substrate is provided; On dielectric substrate, form ground floor metallic film and one deck photoresist successively; Use the pattern of first block of mask definition photoresist, and etching forms the pattern of ground floor metallic film, i.e. gate electrode and controlling grid scan line; Then, deposition one layer insulating, one semiconductor layer and layer of metal film at least on substrate; Coating one deck photoresist on metallic film; Use second mask, promptly the translucent mask of gray tone forms the thin film transistor (TFT) silicon island through exposure imaging and etching, utilizes photoresist ashing technology and etching, forms the raceway groove of source-drain electrode and film transistor switch device; At last, deposition one deck passivation layer film on substrate; Form the photoresist pattern with the 3rd mask by exposure imaging, remove the passivation layer film that is not covered, the part drain electrode is come out by photoresist; Deposition layer of transparent conductive film on substrate, utilize liftoff stripping technology, peel off the photoresist that remains, deposited transparent conductive film is also removed thereupon on it, the transparent conductive film of passivation layer film upper surface and part drain electrode upper surface remains, and forms the transparent pixels electrode.
Wherein, some steps below the translucent mask of the described gray tone method that forms multilayer thin film pattern on substrate comprises: deposit film on glass substrate; Coating one deck photoresist on film; Use the translucent mask of gray tone that photoresist is exposed, form certain pattern; The translucent mask of described gray tone comprises complete transparent region, translucent area and light tight zone, and transparent region is two light transmission parts with different transmittances with translucent area fully, the feasible light intensity difference that is radiated on the photoresist; As mask, membraneous material is carried out etching with the photoresist that forms pattern, form Thinfilm pattern.Wherein, behind the exposure imaging of the translucent mask of described gray tone definition the zone of no photoresist comprise transparent pixels electrode, controlling grid scan line and with the external circuit coupling part; Translucent area comprises the thin film transistor channel part; The zone that keeps whole photoresists behind the exposure imaging comprises source electrode, drain electrode and data scanning line.Described the 3rd mask, when exposure imaging formed described passivation layer pattern, control exposure imaging condition formed the vertical photoresist pattern of sidewall.Behind the exposure imaging, during to described passivation layer film etching, the control etching condition forms the passivation layer Thinfilm pattern of concave side wall.When adopting described liftoff stripping technology, utilize the described vertical photoresist sidewall and the passivation layer film side wall construction of indent, can use the common photoresist stripper that does not contain corrosion other materials composition, described stripper only carries out chemical reaction with photoresist, thereby only photoresist is peeled off, do not corrode other material that comprises transparent conductive film, the transparent conductive film on the photoresist is peeled off and is removed with photoresist.
The invention provides a kind of manufacture method of thin-film transistor LCD device array substrate of three masking process, the manufacturing process of liquid crystal display device is simplified, reduced the cost that array substrate for liquid crystal display device is made, improved production efficiency.The 3rd mask must be the translucent mask of gray tone in other three masking process relatively, the 3rd mask of the present invention can be used common mask, needn't carry out photoresist ashing like this in the technological process and handle, further reduce processing step and corresponding product defects.The structure of a kind of thin-film transistor LCD device array substrate provided by the invention is different from previous array base palte; the transparent pixels electrode is that formation contacts with the thin film transistor (TFT) drain electrode at passivation protection film via hole place on the previous array base palte; remove the via hole of passivation protection film in the array base-plate structure of the present invention, replace the full contact on drain electrode surface.Increase the contact area of transparent pixels electrode and drain electrode, formed more reliable electrical connection, effectively improved the product yield.Use special stripper in traditional liftoff stripping technology, it also corrode other materials, and the present invention has optimized liftoff stripping technology except photoresist is peeled off, improved the efficient and the reliability of liftoff stripping technology, has reduced cost.Above-mentioned feature and advantage obtain more significantly embodying in the drawings and specific embodiments.
Description of drawings
Fig. 1 a is a kind of typical thin film transistor pixel structure vertical view that elder generation's the first five time masking process is made;
Fig. 1 b is a kind of typical thin film transistor pixel structure sectional view that elder generation's the first five time masking process is made;
Fig. 2 is typical five masking process techniqueflows;
Fig. 3 is typical four masking process techniqueflows;
Fig. 4 is three masking process flow processs of the present invention;
Fig. 5 a is the vertical view of pixel after whole technologies of the present invention's mask first time are finished;
Fig. 5 b is the present invention's sectional view at A-A place among Fig. 5 a after for the first time whole technologies of mask are finished;
Fig. 6 is the vertical view of pixel after whole technologies of the present invention's mask second time are finished;
Fig. 7 a is the present invention's A-A place sectional view among Fig. 6 after for the second time the photoetching process of mask is finished;
Fig. 7 b is the present invention's A-A place sectional view among Fig. 6 after for the second time the etching technics first time of mask is finished;
Fig. 7 c is the present invention's A-A place sectional view among Fig. 6 after for the second time the photoresist ashing technology of mask is finished;
Fig. 7 d is the present invention after for the second time the etching second time of mask forms the technology of thin film transistor channel and photoresist stripping process and finishes, A-A place sectional view among Fig. 6;
Fig. 8 is the vertical view of the present invention's pixel after whole technologies of mask are finished for the third time;
Fig. 9 is the vertical view of the present invention's pixel after the photoetching process of mask is finished for the third time;
Figure 10 a is the present invention's sectional view at A-A place among Fig. 9 after the photoetching process of mask is finished for the third time;
Figure 10 b is the present invention's sectional view at A-A place among Fig. 9 after the etching technics of mask is finished for the third time;
Figure 10 c is the present invention's sectional view at A-A place among Fig. 9 after the transparent conductive coatings depositing operation of mask is finished for the third time;
Figure 10 d is the enlarged drawing at B place among Figure 10 c;
Figure 10 e is the sectional view at A-A place among Fig. 8 after the technology of the 3rd mask of the present invention is finished.
Identify among the figure: 1, controlling grid scan line; 2, gate electrode; 3, semiconductor layer; 4, gate insulation layer; 5, data scanning line; 6, source electrode; 7, drain electrode; 8, passivation layer; 9, the transparent conductive film on the photoresist; 10, transparent pixels electrode; 11, the passivation layer part that does not have photoresist to cover; 12, the passivation layer part that has photoresist to cover; 13, thin film transistor channel part; 14, the photoresist of the translucent mask translucent portion of gray tone corresponding region; 15, the photoresist of the opaque section corresponding region of the translucent mask of gray tone; 16, photoresist sidewall; 17, passivation layer film sidewall.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is further elaborated:
At first, use first mask, on glass substrate, form controlling grid scan line 1 and gate electrode 2:, on glass substrate, form ground floor metallic film, i.e. gate metal film earlier by magnetron sputtering or other film build method referring to Fig. 5 a and Fig. 5 b.The material of gate metal film can be metals such as molybdenum, aluminium, alumel, tungsten, chromium or copper, also can be the alloy of above-mentioned several metal materials.Can also be multi-layer film structure in some cases, the material of each layer film can be selected from above-mentioned material.Next use first mask, form the pattern of controlling grid scan line 1 and gate electrode 2 by photoetching and etching technics.
Then, use second mask, form the pattern of gate insulation layer 4, semiconductor layer 3, source electrode 6, drain electrode 7 and data scanning line 5 etc., wherein semiconductor layer 3 comprises active layer and ohmic contact layer.Earlier on the substrate that has formed controlling grid scan line 1 and gate electrode 2, the multilayer film such as second layer metal layer that form gate insulation layer 4, semiconductor layer 3 successively and be used to form data scanning line 5, source electrode 6 and drain electrode 7, wherein semiconductor layer 3 comprises one deck intrinsic semiconductor layer, be active layer and one deck doping semiconductor layer, i.e. ohmic contact layer.Gate insulation layer 4 can adopt oxide, nitride, oxides of nitrogen, organic insulation medium or other insulating medium.Gate insulation layer 4 and semiconductor layer 3 can form by plasma auxiliary chemical vapor deposition or other film build method, and the reacting gas of use can include but not limited to SiH
4, NH
3, N
2, N
2O, SiH
2Cl
2, H
2, TEOS etc.Described second layer metal layer can form by magnetron sputtering or other film build method, and its material can be various suitable metal or alloy.After forming multilayer film, carry out the photoresist coating, use second mask to expose then, described second mask is the translucent mask of gray tone, if use positive photoresist, the translucent area of the translucent mask of described gray tone comprises the channel part 13 of thin film transistor (TFT); Transparent region comprises transparent pixels electrode 10, controlling grid scan line 1 and the part that is connected with external circuit fully; Light tight zone comprises source electrode 6, drain electrode 7 and data scanning line 5.Through behind the exposure imaging, form the structure shown in Fig. 7 a.The photoresist 14 of the translucent mask translucent portion of gray tone corresponding region has different thickness with the photoresist 15 of the opaque section corresponding region of the translucent mask of gray tone.Other complete exposed areas, promptly the photoresist corresponding to the complete transparent region of mask is removed.Carry out the etching first time then, remove the multilayer film of no photoresist overlay area, second layer metal layer and the semiconductor layer 3 promptly removing transparent pixels electrode 10, controlling grid scan line 1 and grade and cover on the zone with the external circuit connecting portion, after etching is finished for the first time shown in Fig. 7 b.Then remaining photoresist is carried out ashing treatment, its thickness of attenuate, make the zone of photoresist thinner thickness, the photoresist 14 that is top, thin film transistor channel part 13 zone is removed, expose the second layer metal layer under it, and the photoresist 15 on the thicker zone of other photoresist thickness still remains with certain thickness, and the structure after photoresist ashing technology is finished is shown in Fig. 7 c.Next the film to thin film transistor channel part 13 tops carries out etching, remove the second layer metal layer and the ohmic contact layer that cover on it,, also will etch away the active layer of segment thickness owing to adopted over etching, form thin film transistor channel part 13, after finishing shown in Fig. 7 d.So only use a translucent mask of gray tone just to finish the pattern of gate insulation layer 4, semiconductor layer 3 (comprising active layer and ohmic contact layer), source electrode 6, drain electrode 7 and data scanning line 1 etc., the pattern after finishing as shown in Figure 6.
At last, use the 3rd mask, form the part that electrically contacts of passivation layer 8, transparent pixels electrode 10 and transparent pixels electrode 10 and drain electrode 7: on the substrate as shown in Figure 6 that second mask forms, deposit one deck passivation layer film earlier, its material can be silicon nitride, silicon oxynitride or other suitable insulation material, and deposition process can be plasma auxiliary chemical vapor deposition or other film build method.Carry out the photoresist coating then, use the 3rd mask to expose, described the 3rd mask is common mask, the translucent mask of promptly non-gray tone.Behind the exposure imaging, form the photoresist pattern shown in Fig. 9 and Figure 10 a, forming does not have photoresist passivation layer part 11 that covers and the passivation layer part 12 that has photoresist to cover.Next carry out etching, remove the passivation layer part 11 that does not have photoresist to cover, so a part of drain electrode 7 comes out, shown in Figure 10 b.After finishing etching, follow the deposit transparent conductive film, shown in Figure 10 c.The pattern at B place obtains by CONTROL PROCESS condition in photoetching and etching technics among Figure 10 c shown in Figure 10 d, when photoetching, residue photoresist sidewall 16 forms vertical pattern after making exposure imaging, when etching, take over etching to make remaining passivation layer film sidewall 17 form the pattern of indent.When the deposit transparent conductive film, can not deposit transparent conductive film substantially on the passivation layer film sidewall 17 of vertical photoresist sidewall 16 and indent like this.After having deposited transparent conductive film, adopt liftoff stripping technology, peel off remaining photoresist and on transparent conductive film, owing to do not have transparent conductive film substantially on the vertical photoresist sidewall 16 and the passivation layer film sidewall 17 of indent, transparent conductive film just disconnects at passivation layer film sidewall 17 places of indent like this, thereby photoresist lift off liquid can be at an easy rate peeled off photoresist from described gap contact lithograph glue sidewall 16, therefore described stripper only carries out chemical reaction with photoresist, do not corrode other material that comprises transparent conductive film, and the transparent conductive film on the photoresist be with photoresist peel off and removed.Structure after liftoff stripping technology is finished is shown in Figure 10 e, the transparent pixels electrode 10 that forms contacts entirely with the surface of drain electrode 7, and the layer of having chance with of transparent pixels electrode 10 and drain electrode 7 one sides also directly contacts with the sidewall of ohmic contact layer, thereby makes transparent pixels electrode 10 and good being electrically connected of drain electrode 7 formation.In transparent pixels electrode 10 other edges, transparent pixels electrode 10 disconnects with passivation layer film sidewall 17 places of passivation layer film in indent.The final thin film transistor (TFT) array cellular construction that forms is shown in Fig. 8 and 10e.
By above-mentioned steps, use three mask to finish the making of thin-film transistor array base-plate of the present invention.Present embodiment only is used for explanation rather than limits thin-film transistor array base-plate of the present invention and manufacture method thereof.Part unless otherwise indicated, the present invention is not limited to the detail of foregoing description.Under the prerequisite that does not depart from essential characteristics and core process technology, the present invention also has other specific embodiment.Any modifications and variations that meet feature of the present invention, all within the scope of the present invention.
Claims (10)
1, a kind of film transistor array base plate structure, comprise: glass substrate, be formed at controlling grid scan line, data scanning line, thin film transistor (TFT) and transparent pixels electrode on the glass substrate, it is characterized in that: the electrical connection of described transparent pixels electrode and described thin film transistor (TFT) drain electrode is the upper surface that covers the thin film transistor (TFT) drain electrode by the transparent pixels electrode, forms that full contacting structure realizes.
2, a kind of film transistor array base plate structure according to claim 1 is characterized in that, described transparent pixels electrode directly contacts electrical connection with active layer with the ohmic contact layer sidewall in the side-walls of thin film transistor (TFT).
3, a kind of film transistor array base plate structure according to claim 1 and 2 is characterized in that: described transparent pixels electrode disconnects in the indent side-walls of passivation layer film.
4, a kind of method of making thin-film transistor array base-plate is characterized in that:
At first, provide an insulation transparent substrate; On dielectric substrate, form ground floor metallic film and one deck photoresist successively; Use the pattern of first block of mask definition photoresist, and etching forms the pattern of ground floor metallic film, i.e. gate electrode and controlling grid scan line;
Then, deposition one layer insulating, one semiconductor layer and layer of metal film at least on substrate; Coating one deck photoresist on metallic film; Use second mask, promptly the translucent mask of gray tone forms the thin film transistor (TFT) silicon island through exposure imaging and etching, utilizes photoresist ashing technology and etching, forms the raceway groove of source-drain electrode and film transistor switch device;
At last, deposition one deck passivation layer film on substrate; Form the photoresist pattern with the 3rd mask by exposure imaging, remove the passivation layer film that is not covered, the part drain electrode is come out by photoresist; Deposition layer of transparent conductive film on substrate, utilize liftoff stripping technology, peel off the photoresist that remains, deposited transparent conductive film is also removed thereupon on it, the transparent conductive film of passivation layer film upper surface and part drain electrode upper surface remains, and forms the transparent pixels electrode.
5, a kind of method of making thin-film transistor array base-plate according to claim 4 is characterized in that: by the zone of no photoresist behind the exposure imaging of the translucent mask of described gray tone definition comprise transparent pixels electrode, controlling grid scan line and with the external circuit coupling part; Translucent area comprises the thin film transistor channel part; The zone that keeps whole photoresists comprises source electrode, drain electrode and data scanning line.
6, according to claim 4 or 5 described a kind of methods of making thin-film transistor array base-plate, it is characterized in that: when described exposure imaging formed described passivation layer pattern, control exposure imaging condition formed the vertical photoresist pattern of sidewall.
7, according to claim 4 or 5 described a kind of methods of making thin-film transistor array base-plate, it is characterized in that: during to described passivation layer film etching, form the passivation layer Thinfilm pattern of concave side wall.
8, a kind of method of making thin-film transistor array base-plate according to claim 6 is characterized in that: during to described passivation layer film etching, form the passivation layer Thinfilm pattern of concave side wall.
9, according to claim 4 or 5 described a kind of methods of making thin-film transistor array base-plate, it is characterized in that: described the 3rd mask can be common mask; When adopting described liftoff stripping technology, stripper only carries out chemical reaction with photoresist, does not corrode other material that comprises transparent conductive film, and the transparent conductive film on the photoresist is peeled off and is removed with photoresist.
10. a kind of method of making thin-film transistor array base-plate according to claim 8 is characterized in that: described the 3rd mask can be common mask; When adopting described liftoff stripping technology, stripper only carries out chemical reaction with photoresist, does not corrode other material that comprises transparent conductive film, and the transparent conductive film on the photoresist is peeled off and is removed with photoresist.
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