CN1960601A - Multilayer routing substrate and manufacturing method thereof - Google Patents
Multilayer routing substrate and manufacturing method thereof Download PDFInfo
- Publication number
- CN1960601A CN1960601A CN 200610142436 CN200610142436A CN1960601A CN 1960601 A CN1960601 A CN 1960601A CN 200610142436 CN200610142436 CN 200610142436 CN 200610142436 A CN200610142436 A CN 200610142436A CN 1960601 A CN1960601 A CN 1960601A
- Authority
- CN
- China
- Prior art keywords
- resistive element
- wiring pattern
- ceramic thin
- layer wire
- thin plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
The present invention provides a multilayer wiring board which has highly precise resistance value of a resistor and provides the method of manufacturing the wiring board. In the multilayer wiring board, a wiring pattern 5 is arranged in one ceramic sheet 2b positioned between laminated layers of a laminated substrate 1, and the resistor 6 is disposed in the other ceramic sheet 2c positioned between the laminated layers. Since the ceramic sheets 2b and 2c are laminated and the resistor 6 is connected to the wiring pattern 5, the resistor 6 can be formed on the flat ceramic sheet 2c where the wiring pattern 5 does not exist. Thereby, a blot by the wiring pattern 5 is eliminated, and the wiring board can be obtained with sufficient precision of the resistance value and without need of trimming.
Description
Technical field
The present invention relates to be adapted at multi-layer wire substrate and the manufacture method thereof used in various electric equipments and the electronic circuit module.
Background technology
At first, with reference to relevant accompanying drawing, in the past multi-layer wire substrate and manufacture method thereof described, Fig. 9 is the exploded view of multi-layer wire substrate in the past, Figure 10 is expression about the major part amplification plan view of the relation of the wiring pattern of in the past multi-layer wire substrate and resistive element, Figure 11～Figure 17 is the key diagram of the manufacture method of multi-layer wire substrate in the past, below, structure with reference to Fig. 9, Figure 10 explanation multi-layer wire substrate in the past, multilayer board 51 forms by stacked many pieces of ceramic thin plates 52, and each ceramic thin plate 52 is respectively equipped with hole 53.
In these holes 53, be provided with bonding conductor 54, and on the surface of each ceramic thin plate 52, be provided with wiring pattern 55, this wiring pattern 55 as shown in figure 10, conductive pattern 55a and the platform part 55b that is connected with conductive pattern 55a with the circuitous usefulness of wiring, and, between the lamination of multilayer board 51, as shown in figure 10, on the surface of a side's (lower side) ceramic thin plate 52, be provided with wiring pattern 55 and the resistive element 56 that is connected with platform part 55b.
This wiring pattern 55, by adopting stencil printing to carry out the pattern printing, and carry out drying, sintering and form, and resistive element 56 is by the printed resistor body and carry out after sintering forms, by stacked many pieces of ceramic thin plates 52, and formation multi-layer wire substrate in the past.
Below, in conjunction with Figure 11～Figure 17, the manufacture method of multi-layer wire substrate is in the past described.At first, as shown in figure 11, prepare the many pieces of ceramic thin plates 52 that constitute by tellite (green sheet), then, as shown in figure 12, on ceramic thin plate 52, form hole 53, then as shown in figure 13, in hole 53, fill bonding conductor 54, form bonding conductor 54.
Then, as shown in figure 14, printed wiring pattern 55 on the surface of each ceramic thin plate 52, and carry out drying, then ceramic thin plate 52 is carried out sintering, shown in Figure 15,16, on the ceramic thin plate 52 of the side (lower side) between the lamination, forming resistive element 56 afterwards by printing, sintering, by many pieces of ceramic thin plates 52 are stacked, finish the manufacturing of multi-layer wire substrate in the past then.
But, in multi-layer wire substrate in the past, because resistive element 56 is arranged between the platform part 55b of wiring pattern 55 by printing, so between the end of platform part 55b and ceramic thin plate 52, have ladder difference portion, therefore, cause the amount of the resistive element in the ladder difference portion to increase, as shown in figure 10, produce the 56a of the portion of oozing out (the limit portion of collapsing) at the resistive element 56 that is arranged on the ceramic thin plate 52, thereby existed the low problem of precision of resistance value.
In addition, in the manufacture method of in the past multi-layer wire substrate, because resistive element 56 is to be formed between the platform part 55b of wiring pattern 55 by printing, so, between the end of platform part 55b and ceramic thin plate 52, have ladder difference portion, therefore, cause the amount of the resistive element in the ladder difference portion to increase, as shown in figure 16, produced the 56a of the portion of oozing out (the limit portion of collapsing), thereby existed the low problem of precision of resistance value at the resistive element 56 that is arranged on the ceramic thin plate 52.
Summary of the invention
The present invention its objective is the high multi-layer wire substrate and the manufacture method thereof of precision of the resistance value that a kind of resistive element is provided in view of the actual conditions of conventional art and propose.
To achieve the above object, as the present invention's 1, provide a kind of multi-layer wire substrate, it constitutes has: the multilayer board that constitutes by stacked many pieces of ceramic thin plates; Be located at the wiring pattern between the lamination of this multilayer board; And be located at resistive element between the described lamination with the state that is connected with this wiring pattern, on the described ceramic thin plate of the side between the described lamination, be provided with described wiring pattern, on described ceramic thin plate, be provided with described resistive element the opposing party between the described lamination, by a stacked described side and described the opposing party's described ceramic thin plate, constituted the structure that described resistive element is connected with described wiring pattern.
And, as the present invention's 2, constitute described multilayer board and formed by low-temperature sintered ceramics, and described wiring pattern has conductive pattern and the platform part that is used to connect described resistive element that is connected with this conductive pattern, the width of described platform part is wideer than the width of described resistive element.
And, as the present invention's 3, adopted the manufacture method of following multi-layer wire substrate, promptly, possess claim 1 or 2 described multi-layer wire substrates, and comprise: the pattern that forms wiring pattern on the described ceramic thin plate that comprises at the described ceramic thin plate of the side between the described lamination forms operation; The resistance that forms resistive element on the described ceramic thin plate the opposing party between the described lamination forms operation; With the stacked operation of stacked many pieces of described ceramic thin plates,, constituted being connected of described wiring pattern and described resistive element by described stacked operation.
In addition, as the present invention's 4, adopted the manufacture method of following multi-layer wire substrate, promptly, it is the slurry formation of main component that described wiring pattern adopts with silver, and described resistive element adopts resistance slurry to form, and after described silver paste and described resistance slurry have been carried out drying, carries out described stacked operation.
In addition, as the present invention's 5, adopted the manufacture method that forms described resistive element by printing.
In multi-layer wire substrate of the present invention, owing on the ceramic thin plate of the side between the lamination at multilayer board, be provided with wiring pattern, on the ceramic thin plate of the opposing party between the lamination, be provided with resistive element, ceramic thin plate by a stacked side and the opposing party, constituted being connected of resistive element and wiring pattern, so, resistive element can be formed on the smooth ceramic thin plate that does not have wiring pattern, eliminated because of the portion of oozing out (the limit portion of collapsing) that wiring pattern forms, thereby can obtain the high multi-layer wire substrate of precision of resistance value.
And, because multilayer board is formed by low-temperature sintered ceramics, so, the variation of the resistance value of resistive element in the time of can being suppressed at the sintering of ceramic thin plate, and because the width of the platform part of wiring pattern is wideer than the width of resistive element, even, also can guarantee being connected of platform part and resistive element effectively so there are some deviations.
And owing to comprise: the pattern that forms wiring pattern on the ceramic thin plate of the side's ceramic thin plate between the lamination that comprises at multilager base plate forms operation; Form operation at the resistance that on the ceramic thin plate of the opposing party between the lamination, forms resistive element; Stacked operation with stacked many pieces of ceramic thin plates, by stacked operation, constituted being connected of wiring pattern and resistive element, so, resistive element can be formed on the smooth ceramic thin plate that does not have wiring pattern, eliminate the portion of oozing out (the limit portion of collapsing) that causes based on wiring pattern, thereby can obtain the high multi-layer wire substrate of precision of resistance value.
In addition, because it is the slurry formation of main component that wiring pattern adopts with silver, and resistive element adopts resistance slurry to form, after silver paste and resistance slurry have been carried out drying, carry out stacked operation, so, when stacked operation, silver paste can not mix with resistance slurry, thereby can obtain high-precision resistance value.
In addition, owing to form resistive element,, thereby can obtain the high multi-layer wire substrate of production efficiency so the manufacturing of resistive element is simple by printing.
Description of drawings
Fig. 1 is the major part profile of multi-layer wire substrate of the present invention.
Fig. 2 is the major part amplification plan view of the relation of expression wiring pattern of multi-layer wire substrate of the present invention and resistive element.
Fig. 3 is the key diagram of the 1st operation (hole formation operation) of the manufacture method of expression multi-layer wire substrate of the present invention.
Fig. 4 is the key diagram of the 2nd operation (conductor formation operation) of the manufacture method of expression multi-layer wire substrate of the present invention.
Fig. 5 is the key diagram of the 3rd operation (pattern formation operation) of the manufacture method of expression multi-layer wire substrate of the present invention.
Fig. 6 is the key diagram of the 4th operation (resistance formation operation) of the manufacture method of expression multi-layer wire substrate of the present invention.
Fig. 7 is the key diagram of the 5th operation (stacked operation) of the manufacture method of expression multi-layer wire substrate of the present invention.
Fig. 8 is the major part amplification plan view of the relation of expression wiring pattern of multi-layer wire substrate manufacture method of the present invention and resistive element.
Fig. 9 is the exploded view of multi-layer wire substrate in the past.
Figure 10 is a major part amplification plan view of representing the relation of the wiring pattern of multi-layer wire substrate in the past and resistive element.
Figure 11 is the 1st key diagram of the manufacture method of multi-layer wire substrate in the past.
Figure 12 is the 2nd key diagram of the manufacture method of multi-layer wire substrate in the past.
Figure 13 is the 3rd key diagram of the manufacture method of multi-layer wire substrate in the past.
Figure 14 is the 4th key diagram of the manufacture method of multi-layer wire substrate in the past.
Figure 15 is the 5th key diagram of the manufacture method of multi-layer wire substrate in the past.
Figure 16 is the 6th key diagram of the manufacture method of multi-layer wire substrate in the past.
Figure 17 is the 7th key diagram of the manufacture method of multi-layer wire substrate in the past.
Among the figure: the 1-multilayer board; The 2-ceramic thin plate; 2a～2e-ceramic thin plate; The 3-hole; The 4-bonding conductor; The 5-wiring pattern; The 5a-conductive pattern; The 5b-platform part; The 6-resistive element; The 7-electronic device.
Embodiment
Below, with reference to accompanying drawing embodiments of the present invention are described, Fig. 1 is the major part profile of multi-layer wire substrate of the present invention, Fig. 2 is the major part amplification plan view of the relation of expression wiring pattern of multi-layer wire substrate of the present invention and resistive element, Fig. 3 is the key diagram of the 1st operation (hole formation operation) of the manufacture method of expression multi-layer wire substrate of the present invention, Fig. 4 is the key diagram of the 2nd operation (conductor formation operation) of the manufacture method of expression multi-layer wire substrate of the present invention, Fig. 5 is the key diagram of the 3rd operation (pattern formation operation) of the manufacture method of expression multi-layer wire substrate of the present invention, Fig. 6 is the key diagram of the 4th operation (resistance formation operation) of the manufacture method of expression multi-layer wire substrate of the present invention, Fig. 7 is the key diagram of the 5th operation (stacked operation) of the manufacture method of expression multi-layer wire substrate of the present invention, and Fig. 8 is the major part amplification plan view of the relation of the wiring pattern of expression multi-layer wire substrate manufacture method of the present invention and resistive element.
Below, in conjunction with Fig. 1, Fig. 2 the structure of multi-layer wire substrate of the present invention is described, multilayer board 1 (is 5 pieces here by the stacked many pieces of ceramic thin plates 2 that are made of low-temperature sintered ceramics (LTCC of sintering temperature below 900 degree), be followed successively by 2a～2e) form from the bottom, each ceramic thin plate 2 is respectively equipped with hole 3.
In these holes 3, be provided with bonding conductor 4, and be formed with wiring pattern 5 on the surface of each ceramic thin plate 2, this wiring pattern 5 as shown in Figure 2, conductive pattern 5a and the platform part 5b that is connected with conductive pattern 5a with the circuitous usefulness of wiring, and, between the lamination of multilayer board 1 as shown in Figure 1 and Figure 2, on the surface of a side ceramic thin plate 2 (2b of lower side), be provided with wiring pattern 5, and as shown in Figure 1, on the opposing party's ceramic thin plate 2 (2c of upper side), be provided with the ribbon resistance body 6 that is connected with platform part 5b.At this moment, resistive element 6 is in the state that is connected with the platform part 5b wideer than the width of resistive element 6.
This wiring pattern 5 is by to adopt printings such as stencil printing be the slurry (silver paste or silver-palladium slurry) of main component with silver and carry out drying and form, and, resistive element 6 forms by adopting printed resistor slurry such as stencil printing and carrying out drying, then, after having formed wiring pattern 5 and resistive element 6, as shown in Figure 1, many pieces of ceramic thin plates 2 are stacked, carrying out stacked (ceramic thin plate 2b, 2c's is stacked) time, as shown in Figure 2, resistive element 6 is connected with platform part 5b formation, and by the various electronic devices 7 of configuration on multilayer board 1, form desired circuit, formed multi-layer wire substrate of the present invention therefrom.
Then, in conjunction with Fig. 3～Fig. 8, the manufacture method of multi-layer wire substrate of the present invention is described.At first, in the 1st operation, as shown in Figure 3, the many pieces of ceramic thin plates 2 that preparation is made of tellite, and the hole that these ceramic thin plates 2 implement to be provided with a plurality of holes 3 formed operation, then, as the 2nd operation, as shown in Figure 4, by in hole 3, filling conductor, implement to form the conductor formation operation of bonding conductor 4.
Then, as the 3rd operation as shown in Figure 5, the surface that is implemented in each ceramic thin plate 2 is by the printed silver slurry and carry out the pattern that drying forms wiring pattern 5 and form operation, then, as the 4th operation as shown in Figure 6, be implemented in the position that does not have wiring pattern 5 below the ceramic thin plate 2c, by the printed resistor slurry and carry out drying, the resistance that forms resistive element 6 forms operation.
Then, as the 5th operation as shown in Figure 7, implement many pieces of ceramic thin plates 2 (the stacked operation that 2a～2e) is stacked, so far, as shown in Figure 8, be in the state that the wide platform part 5b of resistive element 6 and width is connected, and the state that the wiring pattern between the lamination 5 is connected by bonding conductor 4, then, by under the state of glass material, many pieces of ceramic thin plates 2 being carried out sintering between the thin plate, finished the manufacturing of multi-layer wire substrate of the present invention.In addition, resistive element 6 is formed with a plurality of between the lamination of multilayer board 1.
Claims (5)
1. multi-layer wire substrate is characterized in that having: the multilayer board that constitutes by stacked many pieces of ceramic thin plates; Be located at the wiring pattern between the lamination of this multilayer board; And be located at resistive element between the described lamination with the state that is connected with this wiring pattern, on the described ceramic thin plate of the side between the described lamination, be provided with described wiring pattern, on described ceramic thin plate, be provided with described resistive element the opposing party between the described lamination, by a stacked described side and described the opposing party's described ceramic thin plate, constituted being connected of described resistive element and described wiring pattern.
2. multi-layer wire substrate according to claim 1, it is characterized in that, described multilayer board is formed by low-temperature sintered ceramics, and described wiring pattern has conductive pattern and the platform part that is used to connect described resistive element that is connected with this conductive pattern, and the width of described platform part is wideer than the width of described resistive element.
3. the manufacture method of a multi-layer wire substrate, it is characterized in that, possess claim 1 or 2 described multi-layer wire substrates, and comprise: comprising on the described ceramic thin plate of the described ceramic thin plate of a side between the described lamination, the pattern that forms wiring pattern forms operation; On the described ceramic thin plate the opposing party between the described lamination, the resistance that forms resistive element forms operation; With the stacked operation of stacked many pieces of described ceramic thin plates,, constituted being connected of described wiring pattern and described resistive element by described stacked operation.
4. the manufacture method of multi-layer wire substrate according to claim 3, it is characterized in that, it is the slurry formation of main component that described wiring pattern adopts with silver, and described resistive element adopts resistance slurry to form, after described silver paste and described resistance slurry have been carried out drying, carry out described stacked operation.
5. the manufacture method of multi-layer wire substrate according to claim 4 is characterized in that, described resistive element forms by printing.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005318385A JP2007128962A (en) | 2005-11-01 | 2005-11-01 | Multilayer wiring board and method of manufacturing same |
| JP2005318385 | 2005-11-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1960601A true CN1960601A (en) | 2007-05-09 |
Family
ID=38072030
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200610142436 Pending CN1960601A (en) | 2005-11-01 | 2006-10-26 | Multilayer routing substrate and manufacturing method thereof |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2007128962A (en) |
| CN (1) | CN1960601A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108966491A (en) * | 2017-12-29 | 2018-12-07 | 深圳硅基仿生科技有限公司 | The ceramic substrate and its manufacturing method of airtight feedthrough |
-
2005
- 2005-11-01 JP JP2005318385A patent/JP2007128962A/en not_active Withdrawn
-
2006
- 2006-10-26 CN CN 200610142436 patent/CN1960601A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108966491A (en) * | 2017-12-29 | 2018-12-07 | 深圳硅基仿生科技有限公司 | The ceramic substrate and its manufacturing method of airtight feedthrough |
| CN109574637A (en) * | 2017-12-29 | 2019-04-05 | 深圳硅基仿生科技有限公司 | Ceramic substrate and its manufacturing method with feed through pole |
| CN108966491B (en) * | 2017-12-29 | 2019-07-16 | 深圳硅基仿生科技有限公司 | The ceramic substrate and its manufacturing method of airtight feedthrough |
| CN113099603A (en) * | 2017-12-29 | 2021-07-09 | 深圳硅基仿生科技有限公司 | Ceramic substrate for implantable medical device and method for manufacturing same |
| CN113099603B (en) * | 2017-12-29 | 2022-06-21 | 深圳硅基仿生科技有限公司 | Ceramic substrate for implantable medical device and method for manufacturing same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2007128962A (en) | 2007-05-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7417196B2 (en) | Multilayer board with built-in chip-type electronic component and manufacturing method thereof | |
| US8193898B2 (en) | Laminated body and manufacturing method thereof | |
| US20170278638A1 (en) | Composite electronic component and resistor device | |
| US10079110B2 (en) | Capacitor device and composite electronic component including the same | |
| CN1226068A (en) | Resistor elements and methods of producing same | |
| KR20010006892A (en) | Multi layer electronic part | |
| CN1822356A (en) | Interposer for decoupling integrated circuits on a circuit board | |
| US20090294167A1 (en) | Multilayer wiring board | |
| JP4329762B2 (en) | Chip type electronic component built-in multilayer board | |
| CN1960601A (en) | Multilayer routing substrate and manufacturing method thereof | |
| JP2006510233A (en) | Printed wiring board having low-inductance embedded capacitor and manufacturing method thereof | |
| JP5382225B2 (en) | Ceramic multilayer substrate and manufacturing method thereof | |
| WO2018030192A1 (en) | Ceramic electronic component | |
| US6846375B2 (en) | Method of manufacturing multilayer ceramic wiring board and conductive paste for use | |
| KR100289959B1 (en) | Manufacturing method of embedded capacitor of low temperature simultaneous firing ceramic | |
| JP2010016141A (en) | Ceramic board with built-in part and its manufacturing method | |
| KR20060114562A (en) | Embedded capacitor for low temperature co-fired ceramic substrate and method of manufacturing the same | |
| JP2008205135A (en) | Multilayer ceramic capacitor and capacitor mounting circuit board | |
| JP2004119547A (en) | Ceramic wiring board and its manufacturing method | |
| JP2000323806A (en) | Ceramic circuit board with bump and manufacture thereof | |
| KR102436222B1 (en) | Embedded multilayer ceramic electronic component, manufacturing method thereof and print circuit board having embedded multilayer ceramic electronic component | |
| JP2009252783A (en) | Production method of ceramic multilayer substrate, and method for adjusting amount of warpage of ceramic multilayer substrate | |
| KR100764857B1 (en) | Low temperature co-fired ceramic board | |
| JP2016195236A (en) | Capacitor element, and composite electronic component including the same | |
| CN1780527A (en) | Electric circuit substrate and its manufacture |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| AD01 | Patent right deemed abandoned |
Effective date of abandoning: 20070509 |
|
| C20 | Patent right or utility model deemed to be abandoned or is abandoned |