CN1780527A - Electric circuit substrate and its manufacture - Google Patents
Electric circuit substrate and its manufacture Download PDFInfo
- Publication number
- CN1780527A CN1780527A CNA2005101254970A CN200510125497A CN1780527A CN 1780527 A CN1780527 A CN 1780527A CN A2005101254970 A CNA2005101254970 A CN A2005101254970A CN 200510125497 A CN200510125497 A CN 200510125497A CN 1780527 A CN1780527 A CN 1780527A
- Authority
- CN
- China
- Prior art keywords
- resistance
- circuit substrate
- wiring pattern
- hole
- insulating barrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/22—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming
- H01C17/24—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
Abstract
A circuit board of the invention is provided with a multilayer substrate (1) formed of a plurality of ceramic insulating layers (2), wiring patterns (3) installed in the multilayer substrate (1), and resistors (5a, 5b) arranged in lamination of the multilayer substrate (1). Holes (1b) are made in positions confronted with the resistors (5a, 5b) in the insulating layer (2) forming the multilayer substrate (1). The resistors (5a, 5b) can be trimmed through the holes (1b). Thus, the resistors (5a, 5b) can be trimmed after the multilayer substrate (1) is formed. The multilayer substrate (1), the wiring patterns (3) and the resistors (5a, 5b) can easily be manufactured compared to a conventional case, productivity is sufficient, cost is inexpensive and trimming is realized through the holes (1b). Thus, the resistor is easily trimmed without deleting the insulating layer (2). The invention also provides a manufacturing method of the circuit board.
Description
Technical field
The present invention relates to a kind of various electronic equipments of near radio device etc. and the circuit substrate and manufacture method thereof of electronic circuit cell of being suitable for.
Background technology
As in the past circuit substrate and the relevant accompanying drawing of manufacture method thereof are described, then Fig. 6 represents the major part cutaway view of circuit substrate in the past, Fig. 7 represents the key diagram of first operation of the manufacture method of circuit substrate in the past, Fig. 8 represents the key diagram of second operation of the manufacture method of circuit substrate in the past, and Fig. 9 represents the key diagram of second operation of the manufacture method of circuit substrate in the past.
Then, as describe the formation of circuit substrate in the past based on Fig. 6, then multilager base plate 51 is formed by aluminum oxide substrate 52 and a plurality of insulating barriers 53 of being made of the glass that is arranged on this aluminum oxide substrate 52.
In addition, be provided with wiring pattern 54 in the surface of multilager base plate 51 and the lamination, connect by bonding conductor 55 between the wiring pattern 54 in surface and the lamination, in the lamination of multilager base plate 51, be connected simultaneously with wiring pattern 54, and, be provided with and be insulated the resistance 56 that layer 53 covers, further on the surface of multilager base plate 51, carry electronic unit 57 and formation circuit substrate in the past.
Secondly, as manufacture method, then at first, as shown in Figure 7, behind printing conductive paste on the aluminum oxide substrate 52, burn till conductor paste and form wiring pattern 54 based on Fig. 7～Fig. 9 explanation circuit substrate in the past.Then, burn till resistive paste after the printed resistor paste and form resistance 56.
Then, as shown in Figure 8, at aluminum oxide substrate 52, wiring pattern 54, burn till the glass paste behind the printed glass paste above the resistance 56 and form ground floor insulating barrier 53.
Then, as shown in Figure 9, on the insulating barrier 53 of ground floor, burn till the glass paste behind the printed glass paste and form second layer insulating barrier 53.On the insulating barrier 53 of the second layer, burn till the glass paste behind the printed glass paste then and form three-layer insulated layer.Further on the 3rd layer insulating barrier 53, burn till conductor paste behind the printing conductive paste and form wiring pattern 54.Carry electronic unit 57 at last and finish the manufacturing of circuit substrate in the past.
In addition, in circuit substrate and manufacture method thereof in the past, though the finishing of resistance 56 is after burning till resistance shown in Figure 7 56, perhaps after forming ground floor insulating barrier 53 shown in Figure 8, carry out, but in either case, because after being trimmed, be formed on the second layer, the three-layer insulated layer 53 and lip-deep wiring pattern 54 are respectively with other operation printing with burn till and form, therefore not only it makes trouble, production efficiency is poor, cost uprises, and when carrying out the finishing of resistance 56 after forming multilager base plate 51, need eliminate insulating barrier 53 and its operation variation.
In circuit substrate and manufacture method thereof in the past, there are the following problems, promptly because after resistance 56 is trimmed, be formed on the second layer, the 3rd layer insulating barrier 53 and lip-deep wiring pattern 54 respectively with other operation printing with burn till and form, therefore it makes trouble, and production efficiency is poor, and cost uprises, and when after forming multilager base plate 51, carrying out the finishing of resistance 56, need eliminate insulating barrier 53 and its operation variation.
Summary of the invention
The object of the present invention is to provide a kind of production efficiency good, cheap and easy circuit substrate of finishing resistance and manufacture method thereof.
As first scheme that solves above-mentioned problem, circuit substrate of the present invention has: multilager base plate, and its a plurality of insulating barriers by pottery constitute; Wiring pattern, it is arranged in the surface and lamination of this multilager base plate; Resistance, its with state that this wiring pattern is connected under, be arranged in the lamination of described multilager base plate; Forming on the described insulating barrier of described multilager base plate, with the position of described resistance subtend on be provided with to exposing the hole of described resistive surface, can repair described resistance by described hole.
As alternative plan, in described circuit substrate, in described hole, be provided with the sealing that constitutes by glass or insulating resin.
As alternative plan, in described circuit substrate, the top in described hole, with state that described wiring pattern is connected under dispose electronic unit.
As cubic case, the manufacture method of circuit substrate of the present invention, possesses described circuit substrate, on the first ceramic tellite that is used to form the described insulating barrier that is provided with described wiring pattern and described resistance, be provided with described wiring pattern on its surface, and overlap and to be used to form after the position with described resistance subtend is provided with the second ceramic tellite of described insulating barrier in described hole, perhaps on the described first ceramic tellite that is used to form the described insulating barrier that is provided with described wiring pattern and described resistance, coincidence is used to form the described second ceramic tellite of the described insulating barrier that is provided with described hole in the position with described resistance subtend, and after forming described wiring pattern on the surface of the described second ceramic tellite, burn till described wiring pattern simultaneously, described resistance, and first, the second ceramic tellite carries out the finishing of described resistance then by described hole.
As the 5th scheme, in the manufacture method of described circuit substrate, carry out the finishing of described resistance after, filling glass or insulating resin in described hole, burn till described glass afterwards, and make described insulating resin sclerosis, form the sealing of blocking described hole by heating.
Circuit substrate of the present invention, owing to have: multilager base plate, its a plurality of insulating barriers by pottery constitute; Wiring pattern, it is arranged in the surface and lamination of this multilager base plate; Resistance, its with state that this wiring pattern is connected under, be arranged in the lamination of multilager base plate; On the insulating barrier that forms multilager base plate, with the position of resistance subtend on be provided with to exposing the hole of resistive surface, can repair resistance by the hole, compared with the past, the manufacturing of multilager base plate, wiring pattern and resistance is easier, and production efficiency is good, cheap, and owing to finishing is undertaken by the hole, therefore needn't cut insulating barrier, repair easily.
In addition,, therefore avoid the intrusion of dust or moisture, obtain good performance by the sealing protective resistance owing in the hole, be provided with the sealing that constitutes by glass or insulating resin.
In addition, the top in hole with state that wiring pattern is connected under dispose electronic unit.Therefore space utilization is good, can miniaturization.
In addition, owing to possess circuit substrate, on the first ceramic tellite that is used to form the insulating barrier that is provided with wiring pattern and resistance, be provided with wiring pattern on its surface, and overlap and to be used to form after the position with the resistance subtend is provided with the second ceramic tellite of insulating barrier in hole, perhaps on the first ceramic tellite that is used to form the insulating barrier that is provided with wiring pattern and resistance, coincidence is used to form the second ceramic tellite of the described insulating barrier that is provided with the hole in the position with the resistance subtend, and after forming wiring pattern on the surface of the second ceramic tellite, burn till wiring pattern simultaneously, resistance, and first, the second ceramic tellite, carry out the finishing of resistance then by the hole, compared with the past, multilager base plate, wiring pattern, and the manufacturing of resistance is easier, production efficiency is good, cheap, and because finishing is undertaken by the hole, therefore needn't cut insulating barrier, repair easily.
In addition, because after carrying out the finishing of resistance, filling glass or insulating resin in the hole; burn till glass afterwards, and make the insulating resin sclerosis, form the sealing of blocking the hole by heating; therefore avoid the intrusion of dust or moisture by the sealing protective resistance, obtain good performance.
Description of drawings
Fig. 1 represents the major part cutaway view of circuit substrate of the present invention.
Fig. 2 represents the key diagram of first operation of the manufacture method of circuit substrate of the present invention.
Fig. 3 represents the key diagram of second operation of the manufacture method of circuit substrate of the present invention.
Fig. 4 represents the key diagram of the 3rd operation of the manufacture method of circuit substrate of the present invention.
Fig. 5 represents the key diagram of the 4th operation of the manufacture method of circuit substrate of the present invention.
Fig. 6 represents the major part cutaway view of circuit substrate in the past.
Fig. 7 represents the key diagram of first operation of the manufacture method of circuit substrate in the past.
Fig. 8 represents the key diagram of second operation of the manufacture method of circuit substrate in the past.
Fig. 9 represents the key diagram of the 3rd operation of the manufacture method of circuit substrate in the past.
Among the figure: 1-multilager base plate, 1a, 1-hole, 2-insulating barrier, the 2a-first ceramic tellite, the 2b-second ceramic tellite, 2c-the 3rd ceramic tellite, 3-wiring pattern, 4-bonding conductor, 5a, 5b-resistance, 6-sealing, 7-electronic unit.
Embodiment
As relevant circuit substrate of the present invention and manufacture method accompanying drawing thereof are described, then Fig. 1 represents the major part cutaway view of circuit substrate of the present invention, Fig. 2 represents the key diagram of first operation of the manufacture method of circuit substrate of the present invention, Fig. 3 represents the key diagram of second operation of the manufacture method of circuit substrate of the present invention, Fig. 4 represents the key diagram of the 3rd operation of the manufacture method of circuit substrate of the present invention, and Fig. 5 represents the key diagram of the 4th operation of the manufacture method of circuit substrate of the present invention.
Then, as the formation of circuit substrate of the present invention is described based on Fig. 1, then multilager base plate 1 is formed according to the lamination of a plurality of (3 layers) insulating barrier 2 that is made of low-temperature sintering ceramic potteries such as (LTCC), and has a plurality of aperture 1a and the macropore 1b that is located on the thickness direction.
In addition, in the surface of multilager base plate 1 and lamination, be provided with wiring pattern 3, connect by the bonding conductor (through hole) 4 that is arranged on hole 1a between the wiring pattern 3 in surface and the lamination, in the lamination of multilager base plate 1, be provided with a plurality of resistance 5a, the 5b that constitutes by the thick film that is connected with wiring pattern 3 simultaneously.
The top of this resistance 5a, 5b is positioned at the position of hole 1b subtend, becomes the state that has exposed resistance 5a, 5b surface.Can repair resistance 5a, 5b by hole 1b, after being trimmed, be provided with the sealing 6 that constitutes by glass or insulating resin in hole 5a, the 5b.
The electronic unit 7 that is made of the IC parts is carried under the state that the wiring pattern with the surface that is arranged on multilager base plate 1 is connected.Form desirable electric circuit, at least one of this electronic unit 7 is configured in the top of hole 5a or 5b and forms circuit substrate of the present invention simultaneously.
The circuit substrate of the present invention that such formation is arranged, to not having at this on main substrate of illustrated electric equipment, the following wiring pattern (terminal) 3 that is located at multilager base plate 1 is welded on the circuit pattern of main substrate, with the circuit substrate mounted on surface by mounting.
In addition, though be to be illustrated under 3 layers the situation to insulating barrier 2 in the present embodiment.But, also can be more than 2 layers or 4 layers.In addition, resistance 5a, 5b also can be any one party.Further, under the situation more than 4 layers, as long as resistance is located at suitable position in the lamination.
Then, the manufacture method of circuit substrate of the present invention is described based on Fig. 1～Fig. 5, at first, as shown in Figure 2, prepare to form the first ceramic tellite 2a of the insulating barrier 2 that is provided with hole 1a, printing is used to form the conductor paste of wiring pattern 3 on the surface of this first ceramic tellite 2a, and with state that this conductor paste is connected under, print the resistive paste that is used to form resistance 5a.
Then, as shown in Figure 3, the second ceramic tellite 2b that is provided with hole 1a, 2b is overlapped after on the first ceramic tellite 2a, printing is used to form the conductor paste of wiring pattern 3 on the surface of the second ceramic printed-circuit board 2b, simultaneously with state that this conductor paste is connected under, print the resistive paste that is used to form resistance 5b.In addition, fill the conductor paste that is used to form bonding conductor 4 in the 1a of hole.
At this moment, the hole 1b that is arranged on the second ceramic printed-circuit board 2b becomes the state with resistance 5a subtend.
In addition, though at this to the second ceramic tellite 2b is overlapped behind the first ceramic tellite 2a, the situation that conductor paste and resistive paste are set on the second ceramic tellite 2b is illustrated, but also can after being arranged on the second ceramic tellite 2b, conductor paste and resistive paste again the second ceramic tellite 2b be overlapped on the first ceramic tellite 2a.
Then, as shown in Figure 4, the 3rd ceramic tellite 2c that is provided with hole 1a, 1b is overlapped after on the tellite 2b of second pottery, printing is used to form the conductor paste of wiring pattern 3 on the surface of the 3rd ceramic tellite 2c, fills the conductor paste that is used to form bonding conductor 4 simultaneously in the 1a of hole.
At this moment, the hole 1b that is arranged on the 3rd ceramic printed-circuit board 2c becomes the state with resistance 5a subtend.
At this, though to the 3rd ceramic tellite 2c being overlapped after on the second ceramic tellite 2b, the situation that conductor paste and resistive paste are set on the 3rd ceramic tellite 2c is illustrated, but also can after being arranged on the 3rd ceramic printed circuit base 2c, conductor paste and resistive paste again the 3rd ceramic tellite 2c be overlapped on the second ceramic tellite 2b.
Then, under such state (3 layers of state that is all overlapped), after wiring pattern 3, bonding conductor 4, the ceramic tellite 2a of resistance 5a, 5b and first～3rd, 2b, 2c are burnt till with about 850 degree simultaneously, utilize topping machanisms such as laser, resistance 5a, 5b are repaired by hole 1b.
Then, as shown in Figure 5, after carrying out the finishing of resistance, in the 1b of hole, fill the glass paste of the sealing 6 that is used to form glass, or be used to form the thermosetting insulating resin paste of the sealing 6 of insulating resin, the glass paste is burnt till with about 600 degree afterwards, makes it sclerosis by thermmohardening insulating resin paste is heated with about 200 degree simultaneously, forms the sealing 6 of blocking hole 1b.
Then, as shown in Figure 1, carry electronic unit 7, then finish the manufacturing of circuit substrate of the present invention as surface at multilager base plate 1.
Claims (5)
1, a kind of circuit substrate has:
Multilager base plate, its a plurality of insulating barriers by pottery constitute;
Wiring pattern, it is arranged in the surface and lamination of this multilager base plate;
Resistance, its with state that this wiring pattern is connected under, be arranged in the lamination of described multilager base plate;
Forming on the described insulating barrier of described multilager base plate, with the position of described resistance subtend on be provided with to exposing the hole of described resistive surface, can repair described resistance by described hole.
2, circuit substrate according to claim 1 is characterized in that, is provided with the sealing that is made of glass or insulating resin in the described hole.
3, circuit substrate according to claim 1 and 2 is characterized in that, the top in described hole, with state that described wiring pattern is connected under dispose electronic unit.
4, a kind of manufacture method of circuit substrate, possesses the described circuit substrate of claim 1, on the first ceramic tellite that is used to form the described insulating barrier that is provided with described wiring pattern and described resistance, be provided with described wiring pattern on its surface, and overlap and to be used to form after the position with described resistance subtend is provided with the second ceramic tellite of described insulating barrier in described hole, perhaps on the described first ceramic tellite that is used to form the described insulating barrier that is provided with described wiring pattern and described resistance, coincidence is used to form the described second ceramic tellite of the described insulating barrier that is provided with described hole in the position with described resistance subtend, and after forming described wiring pattern on the surface of the described second ceramic tellite, burn till described wiring pattern simultaneously, described resistance, and first, the second ceramic tellite carries out the finishing of described resistance then by described hole.
5, the manufacture method of circuit substrate according to claim 4 is characterized in that, carry out the finishing of described resistance after, filling glass or insulating resin in described hole, burn till described glass afterwards, and make described insulating resin sclerosis, form the sealing of blocking described hole by heating.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004337264A JP2006147913A (en) | 2004-11-22 | 2004-11-22 | Circuit board and its manufacturing method |
| JP2004337264 | 2004-11-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1780527A true CN1780527A (en) | 2006-05-31 |
Family
ID=36627237
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2005101254970A Pending CN1780527A (en) | 2004-11-22 | 2005-11-17 | Electric circuit substrate and its manufacture |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP2006147913A (en) |
| KR (1) | KR100753231B1 (en) |
| CN (1) | CN1780527A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101046138B1 (en) * | 2009-07-17 | 2011-07-01 | 삼성전기주식회사 | Multilayer Wiring Board and Manufacturing Method Thereof |
| JP2013045899A (en) * | 2011-08-24 | 2013-03-04 | Dainippon Printing Co Ltd | Wiring board with built-in element and manufacturing method therefor |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3684239B2 (en) * | 1995-01-10 | 2005-08-17 | 株式会社 日立製作所 | Low EMI electronic equipment |
| JP3601679B2 (en) * | 1999-07-27 | 2004-12-15 | 株式会社村田製作所 | Method for producing composite laminate |
-
2004
- 2004-11-22 JP JP2004337264A patent/JP2006147913A/en not_active Withdrawn
-
2005
- 2005-11-17 CN CNA2005101254970A patent/CN1780527A/en active Pending
- 2005-11-21 KR KR1020050111148A patent/KR100753231B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR100753231B1 (en) | 2007-08-30 |
| JP2006147913A (en) | 2006-06-08 |
| KR20060056865A (en) | 2006-05-25 |
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| Date | Code | Title | Description |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| AD01 | Patent right deemed abandoned | ||
| C20 | Patent right or utility model deemed to be abandoned or is abandoned |