CN1905148A - 接合焊盘及其制造方法、电子设备及其制造方法 - Google Patents

接合焊盘及其制造方法、电子设备及其制造方法 Download PDF

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CN1905148A
CN1905148A CNA2006101086077A CN200610108607A CN1905148A CN 1905148 A CN1905148 A CN 1905148A CN A2006101086077 A CNA2006101086077 A CN A2006101086077A CN 200610108607 A CN200610108607 A CN 200610108607A CN 1905148 A CN1905148 A CN 1905148A
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bond pad
pad
drop
substrate
matrix
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CN100447974C (zh
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丰田直之
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Seiko Epson Corp
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Seiko Epson Corp
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    • HELECTRICITY
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    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
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Abstract

提供一种制造方法更简单的接合焊盘的制造方法、接合性良好的接合焊盘、及电子设备的制造方法、电子设备。接合焊盘(45)的制造方法包括:通过液滴喷出法在基体(P)上配置由包含导电性材料的液体构成的液滴(L)的工序;及使液滴(L)固化,形成焊盘的工序。形成的接合焊盘(45)是圆柱状,且具有凹状的凹部(47)。

Description

接合焊盘及其制造方法、电子设备及其制造方法
技术领域
本发明涉及接合焊盘(bonding pad)的制造方法、接合焊盘、及电子设备的制造方法、电子设备。
背景技术
在半导体装置等中,通过接合引线(bonding wire)连接配置于基板上的半导体元件(芯片)和作为电极用焊盘(pad)的接合焊盘。该接合引线是铝或金等导电性的材料,能够导通半导体元件(芯片)和接合焊盘之间。
例如专利文献1公开的那样,因为该接合焊盘是由铝等导电性材料形成的,可以容易地控制成膜时的膜厚,所以采用了薄膜形成方法。
【专利文献1】日本特开2005-167274号公报
但是,在该方法中,接合焊盘的形状变得越微细,就越需要精度高的掩模对准(mask alignment)。而且,因为需要对每一个基板进行掩模对准的作业,所以较为繁琐。而且,因为接合焊盘是平坦的,所以接合接合引线时的力的施加方法难以变得均匀,所以有时接合引线不能向接合焊盘准确地连接。
发明内容
本发明的目的在于提供:制造方法更简单的接合焊盘的制造方法、接合性良好的接合焊盘、及电子设备的制造方法、电子设备。
本发明的接合焊盘的制造方法,是在基体上形成焊盘的接合焊盘的制造方法,其特征在于,包括:通过液滴喷出法在所述基体上配置由包含导电性材料的液体构成的液滴的工序;及使所述液滴固化,形成所述焊盘的工序。
根据本发明,通过将由包含导电性材料的液体构成的液滴配置于基板上并使其固化,可以简单地形成接合焊盘。而且,不必如薄膜形成方法那样需要掩模,所以可以简化制造方法。
本发明的接合焊盘的制造方法优选,在形成所述焊盘的工序中,将所述焊盘形成为圆柱状。
根据本发明,因为接合焊盘是圆柱状,所以与矩形状的接合焊盘相比,若圆的直径和矩形状的一边的长度相同,则圆的面积比矩形状的面积小,所以用于形成接合焊盘的材料变少。
本发明的接合焊盘的制造方法优选,在形成所述焊盘的工序中,所述焊盘形成为凹状。
根据本发明,若接合焊盘形成为凹状,则接合引线稳定地配置于接合焊盘的凹部,所以接合接合引线时的力的施加方法容易变得均匀,所以接合引线可以向接合焊盘准确地连接。因而,接合作业变得容易,从而生产率提高。
本发明的接合焊盘,是形成于基体上的接合焊盘,其特征在于,具有焊盘,所述焊盘是通过液滴喷出法、使由包含导电性材料的液体构成的液滴配置在所述基体上,使所述液滴固化而形成的。
根据本发明,因为通过液滴喷出法而形成,所以可以提供制造方法简单的接合焊盘。
本发明的接合焊盘优选,所述焊盘形成为圆柱状。
根据本发明,因为接合焊盘是圆柱状,所以与矩形状的接合焊盘相比,若圆的直径和矩形状的一边的长度相同,则圆的面积比矩形状的面积小,所以能够提供可以节约材料的接合焊盘。
本发明的接合焊盘优选,所述焊盘形成为凹状。
根据本发明,若将接合焊盘形成为凹状,则接合引线稳定地配置于接合焊盘的凹部,所以接合接合引线时的力的施加方法容易变得均匀,所以接合引线可以向接合焊盘准确地连接。因而,可以提供接合作业变得容易,从而生产率可以提高的接合焊盘。
本发明的电子设备的制造方法,是包括基体、及具有配置于所述基体上的电极的元件的电子设备的制造方法,其特征在于,包括:通过液滴喷出法使由包含导电性材料的液体构成的液滴配置在所述基体上,使所述液滴固化而形成接合焊盘的工序;及以引线连接所述电极和所述接合焊盘的连接工序。
根据本发明,因为可以通过液滴喷出法在基板上简单地形成接合焊盘,所以电子设备的生产率提高。
本发明的电子设备,是包括基体、及具有配置于所述基体上的电极的元件的电子设备,其特征在于,包括:接合焊盘,所述接合焊盘是通过利用液滴喷出法使由包含导电性材料的液体构成的液滴配置在所述基体上,使所述液滴固化而形成的;及引线,所述引线连接所述电极和所述接合焊盘。
根据本发明,因为可以通过液滴喷出法在基板上简单地形成接合焊盘,所以可以提供生产率可以提高的电子设备。
附图说明
图1是表示液滴喷出装置的整体结构的概略立体图;
图2是局部地表示液滴喷出装置的主要部分的局部立体图;
图3(a)~(d)是表示实施方式的接合焊盘的制造工序的工序剖面图;
图4是表示接合焊盘的制造工序的顺序的概略流程图;
图5(a)是表示作为电子设备的半导体装置的例子的图,图5(b)是接合焊盘的说明图。
图中:
1-液滴喷头;41-作为元件的半导体元件;42-作为电极的电极焊盘;45-接合焊盘;45a-干燥膜;46-作为引线的接合引线;47-凹部;50-作为电子设备的半导体装置;IJ-液滴喷出装置;L-液滴;P-作为基体的基板。
具体实施方式
以下,列举实施方式并参照附图,详细地说明本发明的接合焊盘的制造方法、及接合焊盘。另外,以通过液滴喷出方法在基体上涂敷了功能液的基板为例进行说明。在说明本发明的特征结构及方法之前,首先,依次说明:在液滴喷出方法中使用的基体、液滴喷出法、液滴喷出装置、表面处理方法、和接合焊盘材料。
<基体>
作为能够使用于本发明的基体,可以使用Si晶片、石英玻璃、玻璃、塑料薄膜、金属板等各种的坯料基板。并且,在这些各种坯料基板的表面作为衬底层而形成有半导体膜、金属膜、电介质膜、有机膜等的部件也可以作为基体使用。
<液滴喷出法>
作为液滴喷出法的喷出技术,可以列举出带电控制方式、加压振动方式、机电变换式、电热变换方式、静电吸引方式等。在此,带电控制方式利用带电电极对材料赋予电荷,利用偏向电极控制材料的飞翔方向,并使材料从喷嘴喷出。另外,加压振动方式对材料施加30kg/cm2左右的超高压,使材料喷出到喷嘴前端侧,在不施加控制电压的情况下材料直线前进而从喷嘴被喷出,若施加控制电压,则在材料间引起静电排斥,材料飞散,从而不从喷嘴喷出。另外,机电变换方式利用了压电元件(piezoelectricelement)受到脉冲电信号而变形的性质,通过压电元件变形,经由挠性物质对贮存有材料的空间施加压力,从该空间挤压出材料,使材料从喷嘴喷出。
另外,电热变换方式通过设置于贮存有材料的空间内的加热器,使材料急剧地气化,产生气泡(bubble),通过气泡的压力使空间内的材料喷出。静电吸引方式对贮存有材料的空间内施加微小压力,在喷嘴形成材料的弯液面(meniscus),在该状态下施加静电引力之后拉出材料。另外,除此之外,也可以应用:利用因电场产生的流体的粘性变化的方式、或通过放电火花飞行的方式等技术。液滴喷出法具有如下的优点:在材料的使用上浪费少,而且能够可靠地将期望的量的材料配置在期望的位置。另外,通过液滴喷出法喷出的液体材料的一滴的量例如是1~300毫微克。
<液滴喷出装置>
接着,说明利用上述的液滴喷出法喷出液体材料的液滴喷出装置的一个例子。另外,在本实施方式中,举例说明:利用液滴喷出法从液滴喷头对基板喷出(滴下)液滴的液滴喷出装置。
图1是表示液滴喷出装置IJ的概略结构的立体图。
液滴喷出装置IJ包括:液滴喷头1、X轴方向驱动轴4、Y轴方向引导轴5、控制装置CONT、台架(stage)7、清洁机构8、基台9、及加热器15。
台架7是支承基板P的部件,所述基板P作为通过该液滴喷出装置IJ配置液体材料的基体,所述台架7具有将基板P固定于基准位置的未图示的固定机构。
液滴喷头1是具有多个喷嘴的多喷嘴型的液滴喷头,使长度方向和X轴方向一致。多个喷嘴以一定间隔设置于液滴喷头1的下面。从液滴喷头1的喷嘴对被台架7支承的基板P喷出液体材料。
X轴方向驱动轴4连接有X轴方向驱动电机2。X轴方向驱动电极2是步进电机等,若从控制装置CONT供给X轴方向的驱动信号,则使X轴方向驱动轴4旋转。若X轴方向驱动轴4旋转,则液滴喷头1在X轴方向上移动。
Y轴方向引导轴5被固定为不相对于基台9运动。台架7具有Y轴方向驱动电机3。Y轴方向驱动电机3是步进电机等,若从控制装置CONT供给Y轴方向的驱动信号,则使台架7在Y轴方向上移动。
控制装置CONT对液滴喷头1供给液滴的喷出控制用的电压。并且,对X轴方向驱动电机2供给控制液滴喷头1的X轴方向的移动的驱动脉冲信号,对Y轴方向驱动电机3供给控制台架7的Y轴方向的移动的驱动脉冲信号。
清洁机构8清洁液滴喷头1。在清洁机构8配备有未图示的Y轴方向的驱动电机。通过该Y轴方向的驱动电机的驱动,清洁机构8沿Y轴方向引导轴5移动。清洁机构8的移动也由控制装置CONT控制。
加热器15在此是通过灯加热退火(lamp anneal)对基板P进行热处理的机构,进行包含于配置在基板P上的液体材料中的溶剂的蒸发、干燥。该加热器15的电源的接通以及断开也由控制装置CONT控制。
液滴喷出装置IJ相对地扫描液滴喷头1和支承基板P的台架7,同时对于基板P,从在X轴方向上排列于液滴喷头1的下面的多个喷嘴喷出液滴。
图2是用于说明通过压电方式进行的液体材料的喷出原理的图。
在图2中,与收容液体材料的液体室21邻接地设置有压电元件22。液体材料经由液体材料供给系统23被供给到液体室21,所述液体材料供给系统23包括收容液体材料的材料罐。压电元件22连接于驱动电路24,经由该驱动电路24对压电元件22施加电压,使压电元件22变形,由此液体室21变形。在液体室21复原到原来的状态时,从喷嘴25喷出液体材料。在该情况下,通过使施加电压的值变化,控制压电元件22的应变量。并且,通过使施加电压的频率变化,控制压电元件22的应变速度。因为通过压电方式进行的液滴喷出不会对液体材料施加热,所以具有不易对液体材料的组成产生影响的优点。
以上说明的液滴喷出装置IJ可以在本发明的配置方法或制造方法中使用,不过本发明并不限定于此,如果是可以喷出液体材料、并使其命中到规定的命中预定位置的液滴喷出装置,则也可以使用任意的装置。
<表面处理方法>
作为本实施方式的表面处理方法,可以采用:通过进行以液滴的接触角控制为对象的疏液化处理(liquid repellency treatment)而在基板P的表面形成有机薄膜的方法、或等离子体处理法等。另外,为了良好地进行疏液化处理,优选进行冲洗作为预处理工序。例如,可以采用紫外线冲洗、紫外线/臭氧冲洗、等离子体冲洗、酸或碱冲洗等。
在进行疏液化处理来形成有机薄膜的方法中,在基板P的表面、由硅烷化合物或界面活性剂等有机分子形成有机薄膜。用于对基板P的表面进行处理的有机分子,具有:能够物理性或化学性地结合于基板P的官能团、和与此相反地称为疏液团的对基板P的表面性进行改进(控制表面能量)的官能团,结合于基板P而形成有机薄膜,理想情况下成为单分子膜。
另一方面,在等离子体处理法中,在常压或真空中对基板P进行等离子体照射。使用于等离子体处理的气体种类,可以考虑基板P的表面材质等而进行各种选择。作为处理气体,可以适当地使用碳氟类化合物,例如,可以例示出四氟甲烷、全氟代己烷、全氟代癸烷等。将四氟甲烷作为处理气体的等离子体处理法(CF4等离子体处理法)的处理条件例如是:等离子体功率(plasma power)是50~1000W,四氟化碳气体流量是50~100mL/min,基板P相对于等离子体放电电极的输送速度是0.5~1020mm/sec,基板P的温度是70~90℃。
<接合焊盘材料>
用于形成接合焊盘45的液滴L,由使导电性微粒分散在分散剂中的分散液或有机金属化合物的溶液构成。在本实施方式中,作为导电性微粒使用金。作为其它的导电性微粒,除了可以使用含有例如银、铜、铁、锡、铝、铬、锰、钼、钛、钯、铟、锑、钨及镍中的任意一个的金属微粒之外,还可以使用它们的氧化物、有机化合物及导电性聚合物或超导体的微粒等。为了提高分散性,这些导电性微粒等也可以在表面涂敷有机物等来使用。导电性微粒的颗粒直径优选大于等于1nm且小于等于0.1μm。若比0.1μm大,则有在后述的液滴喷头的喷嘴产生堵塞的问题。另外,若比1nm小,则涂敷剂对于导电性微粒的体积比变大,从而得到的膜中的有机物的比率变得过多。
另外,作为氧化物,可以列举出ITO或ATO等。另外,作为有机金属化合物,例如可以列举出由含有金、银、铜、钯等的化合物或配位化合物,通过热分解析出金属的有机金属化合物。具体地,可以列举出氯三乙基膦金(I)、氯三甲基膦金(I)、氯三苯基膦金(I)、2、4-戊二酮银(I)配位化合物、三甲基膦(六氟乙酰丙酮)银(I)配位化合物、及六氟戊二酮环辛二烯铜(I)配位化合物等。
作为分散剂或溶剂,可以分散上述的导电性微粒,只要是不引起凝聚的分散剂或溶剂,就没有特别的限定。例如,除了水之外,还可以例示出:甲醇、乙醇、丙醇、丁醇等醇类,正庚烷、正辛烷、癸烷、十二烷、十四烷、甲苯、二甲苯、异丙基苯、杜烯、茚、二戊烯、四氢化萘、十氢化萘、环己基苯等烃系化合物,或乙二醇二甲醚、乙二醇二乙醚、乙二醇甲乙醚、二乙二醇二甲醚、二乙二醇二乙醚、二乙二醇甲乙醚、1,2-二甲氧基乙烷、双(2-甲氧基乙基)醚、p-二噁烷等醚类化合物,及碳酸丙烯酯、γ-丁内酯、N-甲基-2-吡咯烷酮、二甲替甲酰胺、二甲亚砜、环己酮等极性化合物。在它们之中,在微粒的分散性和分散液的稳定性、并且在对液滴喷出法的应用的容易度的这些点上,优选水、醇类、烃系化合物、醚类化合物,作为更优选的分散介质,可以列举出水、烃系化合物。
上述导电性微粒的分散液的表面张力优选是在大于等于0.02N/m且小于等于0.07N/m的范围内。在利用液滴喷出法喷出液体时,如果表面张力小于0.02N/m,则因为配线图案用功能液的组成物对喷嘴面的润湿性增大,所以容易产生飞行弯曲,若超过0.07N/m,则因为在喷嘴前端的弯液面的形状不稳定,所以难以进行喷出控制。为了调整表面张力,只要对上述分散液,在不使与基板P的接触角较大地降低的范围内,微量添加氟类、硅酮类、非离子类等表面张力调节剂即可。非离子类表面张力调节剂起到如下的作用:提高液体的润湿性,改良膜的平整性,防止膜的微细的凹凸的产生等。上述表面张力调节剂也可以根据需要,包含醇、醚、酯、酮等有机化合物。
上述分散液的粘度优选是大于等于1mPa·s且小于等于50mPa·s。在利用液滴喷出法将液体材料作为液滴L喷出时,在粘度比1mPa·s小的情况下,喷嘴周边部容易因配线图案用功能液的流出而被污染,并且,在粘度比50mPa·s大的情况下,流动阻力变高从而难以进行顺利的液滴L的喷出。
以下,列举实施方式,参照附图详细地说明本发明的接合焊盘的制造方法、接合焊盘、及电子设备。
(实施方式)
<接合焊盘的制造方法>
接着,说明本实施方式的接合焊盘的形成方法。在本实施方式中,说明如下的方法:在进行了表面处理的基板上、通过液滴喷出法从液滴喷头的喷嘴液滴状地喷出并配置包含导电性材料的液滴,使配置的液滴固化,从而形成圆柱状的接合焊盘。
图3(a)~(d)是表示本实施方式的接合焊盘45的制造工序的工序剖面图。图4是表示接合焊盘45的制造工序的顺序的概略流程图。
参照图3及图4,说明本发明的接合焊盘45的制造方法。另外,本实施方式的接合焊盘45的形成方法由基板冲洗工序、基板表面处理工序、材料配置工序、干燥工序及固化处理工序而概略地构成。以下,对于各工序进行详细说明。
(基板冲洗工序)
在图4的步骤S1中,冲洗基板P。为了良好地进行基板P的疏液化处理,优选作为疏液化处理的预处理工序而进行冲洗。基板P的冲洗方法例如可以采用紫外线冲洗、紫外线/臭氧冲洗、等离子体冲洗、酸或碱冲洗等。另外,基板P的材料具有电绝缘性,例如使用了Si。
(基板表面处理工序)
在图4的步骤S2中,如图3(a)所示,对基板P的表面进行表面处理。基板P的表面处理以减小接合焊盘材料的命中直径为目的对基板P的表面进行疏液化,以便能够得到必要的接触角。作为对基板P的表面进行疏液化的方法,可以采用在基板P的表面形成有机薄膜的方法、等离子体处理法等。另外,在此采用了形成有机薄膜的方法。然后,基板P被赋予疏液性,形成疏液层H1。
(材料配置工序)
在图4的步骤S3中,如图3(b)所示,使用液滴喷出装置IJ,在基板P上喷出并配置作为接合焊盘材料的液滴L。作为包含于液滴L的导电性微粒,例如使用了金。作为液滴喷出的条件,例如可以在液滴的重量为4ng/dot,液滴的速度(喷出速度)为5~7m/sec条件下进行。并且,喷出液滴的气体介质优选被设定为温度小于等于60℃,湿度小于等于80%。以此,液滴喷头1的喷嘴不会堵塞,可以进行稳定的液滴喷出。另外,配置液滴L时的液滴喷出次数可以一次配置,也可以分为多次配置。液滴L若配置于基板P上,则形成为半球状。
(干燥工序)
在图4的步骤S4中,如图3(c)所示,对配置于基板P上的液滴L进行干燥。在喷出了液滴L之后,除去分散剂,进行干燥处理。然后,可以得到通过渗入而形成的特别形状。该通过渗入形成的特别形状,有中央部凹陷的形状、和成为环状的形状等,也被称为「咖啡着色(coffee stain)」现象,也如文献1(R.D.Deegan,et.al.,Nature,389,827(1997))所述,这些形状是由于液滴中的固态成分因内部对流而集中于周边部的现象而形成的。根据文献2(R.D.Deegan,et.al.,Langmuir,20,7789(2004)),液体的干燥速度越快,粘度越低,越容易产生该特别形状。因此,越使用低沸点且低粘度的溶剂,越容易形成该特别形状。并且,为了加快干燥速度,优选在形成该特别形状的限度内加热或减压的环境下进行干燥。然后,形成凹状的干燥膜45a。而且,内侧的高度比外侧的高度低。该干燥膜45a的剖面形状呈圆形,且该干燥膜45a形成为圆柱状。
加热处理,除了例如通过加热基板P的普通的加热板(hot plate)、电炉等进行的处理之外,也可以通过灯光退火来进行。作为使用于灯光退火的光的光源,并不特别地限定,不过可以将红外线灯、氙气灯、YAG激光器、氩离子激光器、二氧化碳激光器、XeF、XeCl、XeBr、KrF、KrCl、ArF、ArCl等激元激光器等作为光源而使用。这些光源通常使用输出大于等于10W且小于等于5000W的范围的光源,不过在本实施方式中,大于等于100W且小于等于1000W的范围就足够。
另外,减压处理可以通过回转泵、真空泵、涡轮泵等进行。即使是这些泵的内置的普通的减压干燥机也无妨,可以与加热处理组合。在这些减压干燥的工序中,在101~104Pa的真空度比较低的减压下达成,在真空度过高的情况下,溶剂漰沸,从而难以得到目的形状。
(固化处理工序)
在图4的步骤S5中,如图3(d)所示,固化处理干燥后的干燥膜45a。为了提高接合时的机械强度,需要固化干燥膜45a。因此,对喷出工序后的基板P实施热处理及/或光处理。然后,形成具有凹部47(参照图5(b))的接合焊盘45。因为接合焊盘45具有凹部47,所以内侧的高度比外侧的高度低。另外,接合焊盘45的剖面形状呈圆形,且该接合焊盘45形成为圆柱状。而且,因为包含于液滴L的导电性微粒是金,所以形成金的接合焊盘45。因为与铝等相比,金是柔软且导电性良好的材料,所以对接合接合引线46(参照图5(b))是优选的。
另外,热处理及/或光处理通常在大气中进行,不过也可以根据需要,在氮气、氩气、氦气等惰性气体的气体介质中进行。热处理及/或光处理的处理条件考虑到:溶剂的沸点(蒸汽压力)、气体介质的种类和压力、聚合引发剂(polymerization initiator agent)的反应温度或反应曝光量、交联反应的反应温度或反映曝光量、低聚物或聚合物的玻化温度、坯料的耐热温度、微粒的分散性或氧化性等的热行为等,来适当地决定。
在光处理中,可以使用紫外线、远紫外线、电子束、X射线等,固化处理干燥后的干燥膜45a,任一种均优选为小于等于1J/cm2,为了提高生产率,更优选的是小于等于0.2J/cm2。另外,在热处理中,除了通过加热板、电炉等进行的处理之外,也可以通过灯光退火来进行,如果在固化物的玻化温度以下,则优选是小于等于200℃。在是玻化温度以上而过热的情况下,有因热塌边(thermal sagging)而变形的弊端。
<电子设备>
图5(a)是表示作为本实施方式的电子设备的半导体装置50的例子的图。该图(b)是接合焊盘45的说明图。
如图5(a)所示,在基板P上配置有半导体元件41,且形成有多个接合焊盘45。接合焊盘45是圆柱状。在半导体元件41形成有多个电极焊盘42,电极焊盘42和接合焊盘45由接合引线46连接。另外,接合焊盘45被构成为:与未图示的驱动电路连接,驱动半导体元件41。
如图5(b)所示,形成于基板P上的接合焊盘45的剖面呈凹状,接合焊盘45具有凹部47。接合焊盘45的内侧部分比外侧部分低。在该凹部47配置线状的接合引线46。接合引线46的剖面形状是圆形,且该接合引线46是细线状。而且,接合引线46在不产生错位的情况下稳定地配置于凹部47。
接合焊盘45和电极焊盘42的材质是金。接合引线46的材质是铝。另外,接合引线46的材质并不拘泥于铝,只要是能够导通电极焊盘42和接合焊盘45的材质即可,所以也可以使用例如金、银、铜、等其它材料。
参照图5(a),简单地说明接合电极焊盘42和接合焊盘45,形成作为电子设备的半导体装置50的方法。
在具有接合焊盘45的基板P上配置具有电极焊盘42的半导体元件41。接着,在具有凹部47的接合焊盘45配置接合引线46,接合接合引线46。接着,在半导体元件41上的电极焊盘42配置接合引线46,接合接合引线46。然后,通过重复进行需要次数的这些接合作业,形成作为半导体装置的电子设备50。另外,由于凹部47形成为凹状,所以与平坦的状态相比,圆线状的接合引线46稳定地配置于该凹部47,所以接合接合引线46时的力的施加方法容易变得均匀,因此,接合引线46可以向接合焊盘45准确地连接。因而,由于是接合作业变得容易从而生产率能够提高的接合焊盘45,所以能够提供生产性可以提高的作为电子设备的半导体装置50。
可以将具有本发明的接合焊盘45的作为电子设备的半导体装置50应用于例如液晶装置使用的液晶驱动用IC。并且,也可以普遍地应用于液晶装置以外的任意的电光学装置,例如作为电光学物质而使用了EL(场致发光)元件的光学装置、或等离子体显示器(PDP)、或场致发射显示器(FED)等电光学装置。
在本实施方式中,可以得到以下的效果。
(1)通过将由包含导电性材料的液体构成的液滴L配置于基板P上并使其固化,可以简单地形成接合焊盘45。不必如薄膜形成方法那样需要掩模,所以可以使制造方法简化。而且,因为也不需要掩模,所以较为经济。
(2)因为接合焊盘45是圆柱状,所以与矩形状相比,若圆的直径和矩形状的一边的长度相同,则圆的面积比矩形状的面积小,所以用于形成接合焊盘45的材料也变少,从而可以节约材料。
(3)若将接合焊盘45形成为凹状,则接合引线46被稳定地配置于接合焊盘45的凹部47。而且因为接合接合引线46时的力的施加方法容易变得均匀,所以接合引线46可以向接合焊盘45准确地连接。因而,接合作业变得容易,从而生产率提高。
(4)因为通过液滴喷出法形成接合焊盘45,所以可以提供制造方法简单的接合焊盘45。因为是可以简单地形成接合焊盘45的制造方法,所以电子设备50的生产率提高。
以上,列举优选的实施方式说明了本发明,不过本发明并不限定于上述各实施方式,也包括以下所示的变形,在可以达成本发明的目的的范围内,可以设定为其它任意的具体构造及形状。
(变形例一)在所述的实施方式中,利用咖啡着色现象在基板P上形成了具有凹部47的圆柱状的接合焊盘45,不过并不限定于此。例如,凹部47也可以不形成于接合焊盘45。即使这样,因为通过液滴喷出法形成圆柱状的接合焊盘45,所以也能够得到与实施方式相同的效果。
(变形例二)在所述的实施方式中,基板P的材料使用了具有绝缘性的Si,不过并不限定于此。例如,也可以选择具有导电性的材料,通过利用液滴喷出法配置具有绝缘性的材料并使其固化的方法、或薄膜形成方法等,配置绝缘膜,之后,将接合焊盘45形成于基板P上。即使这样,因为以液滴喷出法形成圆柱状的接合焊盘45,所以也能够得到与实施方式相同的效果。
(变形例三)在所述的实施方式中,将圆柱状的接合焊盘45形成于基板P上,不过并不限定于此。例如,也可以是具有椭圆的剖面形状的接合焊盘45。即使这样,因为以液滴喷出法形成柱状的接合焊盘45,所以也能够得到与实施方式相同的效果。
(变形例四)在所述的实施方式中,将圆柱状的接合焊盘45形成于基板P上,不过并不限定于此。例如,也可以是圆的剖面形状和椭圆的剖面形状混合的接合焊盘45。即使这样,因为以液滴喷出法形成圆柱状的接合焊盘45,所以也能够得到与实施方式相同的效果。

Claims (8)

1.一种在基体上形成焊盘的接合焊盘的制造方法,其特征在于,
包括:
通过液滴喷出法在所述基体上配置由包含导电性材料的液体构成的液滴的工序;及
使所述液滴固化,形成所述焊盘的工序。
2.如权利要求1所述的接合焊盘的制造方法,其特征在于,
在形成所述焊盘的工序中,将所述焊盘形成为圆柱状。
3.如权利要求1或2所述的接合焊盘的制造方法,其特征在于,
在形成所述焊盘的工序中,将所述焊盘形成为凹状。
4.一种接合焊盘,形成于基体上,其特征在于,
具有焊盘,所述焊盘是通过液滴喷出法,使由包含导电性材料的液体构成的液滴配置在所述基体上,使所述液滴固化而形成的。
5.如权利要求4所述的接合焊盘,其特征在于,
所述焊盘形成为圆柱状。
6.如权利要求4或5所述的接合焊盘,其特征在于,
所述焊盘形成为凹状。
7.一种电子设备的制造方法,所述电子设备包括:基体、及具有配置于所述基体上的电极的元件,
所述电子设备的制造方法的特征在于,
包括:
通过液滴喷出法使由包含导电性材料的液体构成的液滴配置在所述基体上,使所述液滴固化而形成接合焊盘的工序;及
以引线连接所述电极和所述接合焊盘的连接工序。
8.一种电子设备,其包括:基体、及具有配置于所述基体上的电极的元件,其特征在于,
包括:
接合焊盘,其是通过利用液滴喷出法使由包含导电性材料的液体构成的液滴配置在所述基体上,使所述液滴固化而形成的;及
引线,其连接所述电极和所述接合焊盘。
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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102473697A (zh) * 2009-06-26 2012-05-23 垂直电路公司 曲折配置的堆叠裸片的电互连
US9147583B2 (en) 2009-10-27 2015-09-29 Invensas Corporation Selective die electrical insulation by additive process
US9153517B2 (en) 2008-05-20 2015-10-06 Invensas Corporation Electrical connector between die pad and z-interconnect for stacked die assemblies
US9252116B2 (en) 2007-09-10 2016-02-02 Invensas Corporation Semiconductor die mount by conformal die coating
US9305862B2 (en) 2008-03-12 2016-04-05 Invensas Corporation Support mounted electrically interconnected die assembly
US9490195B1 (en) 2015-07-17 2016-11-08 Invensas Corporation Wafer-level flipped die stacks with leadframes or metal foil interconnects
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US9871019B2 (en) 2015-07-17 2018-01-16 Invensas Corporation Flipped die stack assemblies with leadframe interconnects
US10566310B2 (en) 2016-04-11 2020-02-18 Invensas Corporation Microelectronic packages having stacked die and wire bond interconnects

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009051847A1 (en) * 2007-10-19 2009-04-23 Calin Caluser Three dimensional mapping display system for diagnostic ultrasound machines and method
KR101608745B1 (ko) 2009-12-30 2016-04-05 삼성전자 주식회사 인쇄회로기판조립체의 제조방법
JP6532947B2 (ja) 2014-12-12 2019-06-19 デジタル・アロイズ・インコーポレイテッド 金属構造物の積層造形
JP2016178201A (ja) * 2015-03-20 2016-10-06 コミッサリア ア レネルジー アトミーク エ オ エナジーズ アルタナティブス キャビティを備えた端部を含む、電子構成要素のための導電性部材の製造方法
US11853033B1 (en) 2019-07-26 2023-12-26 Relativity Space, Inc. Systems and methods for using wire printing process data to predict material properties and part quality

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2536110B2 (ja) 1988-12-27 1996-09-18 凸版印刷株式会社 ボンディングパッドの形成方法
JPH0590327A (ja) 1991-09-27 1993-04-09 Nec Ic Microcomput Syst Ltd 半導体集積回路
KR970053171A (ko) * 1995-12-18 1997-07-29 문정환 본딩패드 배선형성방법 및 구조
US6357111B1 (en) * 1997-04-21 2002-03-19 Seiko Epson Corporation Inter-electrode connection structure, inter-electrode connection method, semiconductor device, semiconductor mounting method, liquid crystal device, and electronic apparatus
JP4741045B2 (ja) 1998-03-25 2011-08-03 セイコーエプソン株式会社 電気回路、その製造方法および電気回路製造装置
US6402012B1 (en) * 1999-11-08 2002-06-11 Delphi Technologies, Inc. Method for forming solder bumps using a solder jetting device
US6861370B1 (en) 2000-10-23 2005-03-01 Renesas Technology Corp. Bump formation method
GB2375536A (en) * 2000-12-01 2002-11-20 Univ Sheffield Combinatorial molecule design system and method
FR2835037B1 (fr) * 2002-01-18 2006-11-03 Legris Sa Moyens de connexion bout a bout de deux elements de conduite
JP4042460B2 (ja) 2002-04-22 2008-02-06 セイコーエプソン株式会社 製膜方法及びデバイス及び電子機器並びにデバイスの製造方法
JP2004172612A (ja) 2002-11-06 2004-06-17 Ricoh Co Ltd 微小径バンプを有する半導体素子、インクジェット方式によるバンプ形成およびそれに用いるインク組成物
JP3801158B2 (ja) 2002-11-19 2006-07-26 セイコーエプソン株式会社 多層配線基板の製造方法、多層配線基板、電子デバイス及び電子機器
TWI239629B (en) * 2003-03-17 2005-09-11 Seiko Epson Corp Method of manufacturing semiconductor device, semiconductor device, circuit substrate and electronic apparatus
JP4344270B2 (ja) * 2003-05-30 2009-10-14 セイコーエプソン株式会社 液晶表示装置の製造方法
JP2005040652A (ja) 2003-07-22 2005-02-17 Seiko Epson Corp 液状体の塗布方法、液状体の塗布装置、曲面体、コンタクトレンズの製造方法、コンタクトレンズの製造装置、及びコンタクトレンズ
JP2005056985A (ja) 2003-08-01 2005-03-03 Seiko Epson Corp 半導体装置の製造方法、半導体装置および電子機器
JP4290510B2 (ja) * 2003-08-22 2009-07-08 太陽インキ製造株式会社 インクジェット用光硬化性・熱硬化性組成物とそれを用いたプリント配線板
TWI331345B (en) 2003-09-12 2010-10-01 Nat Inst Of Advanced Ind Scien A dispersion of nano-size metal particles and a process for forming a layer of an electric conductor with use thereof
KR101110766B1 (ko) * 2003-11-14 2012-03-16 가부시키가이샤 한도오따이 에네루기 켄큐쇼 액정표시장치 및 액정표시장치의 제조 방법
US7768405B2 (en) * 2003-12-12 2010-08-03 Semiconductor Energy Laboratory Co., Ltd Semiconductor device and manufacturing method thereof
JP2005183682A (ja) 2003-12-19 2005-07-07 Ricoh Co Ltd 基板の製造方法及び基板
JP2005240651A (ja) * 2004-02-25 2005-09-08 Aisin Seiki Co Ltd 弁開閉時期制御装置
JP2006156943A (ja) * 2004-09-28 2006-06-15 Seiko Epson Corp 配線パターンの形成方法、配線パターンおよび電子機器
JP2005167274A (ja) 2005-01-21 2005-06-23 Seiko Epson Corp 半導体装置、半導体装置の製造方法並びに液晶表示装置

Cited By (18)

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CN102473697B (zh) * 2009-06-26 2016-08-10 伊文萨思公司 曲折配置的堆叠裸片的电互连
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