CN1855783A - Mass TDMA complex switching chip data processing method - Google Patents

Mass TDMA complex switching chip data processing method Download PDF

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Publication number
CN1855783A
CN1855783A CN 200510066147 CN200510066147A CN1855783A CN 1855783 A CN1855783 A CN 1855783A CN 200510066147 CN200510066147 CN 200510066147 CN 200510066147 A CN200510066147 A CN 200510066147A CN 1855783 A CN1855783 A CN 1855783A
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data
tdm
input
setting
bit wide
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CN1855783B (en
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涂君
雷春
潘剑锋
柳精伟
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Abstract

The method thereof comprises: in TDM chip, a series/parallel converter converts the series TDM bit-stream into the parallel data in an 8 bits bit-wide; the input memory implements the buffering / bit-wide conversion for the data, namely converting the parallel data in 8 bits bit-wide into the parallel data in 8*m bit-wide; the parallel/series converter converts the parallel data in 8 bits bit-wide into the TDM bit-stream; the output memory implements the buffering/bit-wide conversion, namely converting the parallel data in 8*m bit-wide into the parallel data in 8 bits bit-wide, and implements relevant TDM switch.

Description

The data processing method of mass TDMA complex switching chip
Technical field
The present invention relates to the communication system data exchange component, relate in particular to a kind of data processing method of mass TDMA complex switching chip.
Background technology
TDM (time division multiplexing) mode has obtained using widely in the existing Modern Communication System.The theory diagram of existing TDM exchange chip is written in the input store after the serial/parallel conversion of serial/parallel transducer of the TDM signal of input process as shown in Figure 1; Switching Module is written in the appropriate address of output storage according to configuration data sense data from input store of reading from the swap table memory, finishes the TDM exchange; The data of reading from output storage are through becoming the TDM signal of output after the parallel/serial conversion of parallel/serial transducer.
The design of TDM exchange chip can be finished the TDM function of exchange well in the above-mentioned prior art, but its TDM capacity that can support be subject to the bandwidth of Switching Module, the bandwidth of Switching Module is the product of data bit width and clock frequency, and the raising of device working clock frequency is subject to the restriction of semiconductor process technology, the performance that can not realize several times in a short time improves, that is to say, the major defect of prior art is that the bit wide of Switching Module is fixed as 8, can only visit a byte at every turn, the bandwidth ratio of Switching Module is less, so the TDM capacity that causes the TDM exchange chip of monolithic to be supported is little.
Yet, along with the continuous increase of number of users, to the capacity requirement of TDM exchange chip with increasing.For this reason, must to use jumbo TDM exchange chip, but utilize the jumbo TDM switching network of existing techniques in realizing then to need multi-disc TDM exchange chip cascade or three grades of switching networks of employing " TST ", and finish the swap table memory that network process need dispose a plurality of TDM exchange chips of taking of a TDM, realize and control all more complicated, and the cost height, poor reliability.
Summary of the invention
In view of above-mentioned existing in prior technology problem, the purpose of this invention is to provide a kind of data processing method of mass TDMA complex switching chip, it is big to make that exchange chip has a capacity, realize and control simple, cost is low, high reliability features.
The objective of the invention is to be achieved through the following technical solutions:
The invention provides a kind of data processing method of mass TDMA complex switching chip, comprising:
Each road time division multiplexing tdm data of A, input writes each self-corresponding input store respectively after each serial/parallel transducer conversion;
B, the described tdm data of each input store buffer memory reach the frame number of setting up to data;
C, when the input store data in buffer reaches the frame of setting, Switching Module sense data and carry out corresponding TDM exchange and handle from input store;
Data after E, process TDM exchange are handled are exported after output storage and parallel/serial transducer conversion process successively.
The quantity of the frame of described setting is:
More than or equal to 2 frames.
Described step C comprises:
Configuration data from the input store sense data of Switching Module by reading the swap table memory, and be written to appropriate address in the output storage realizes that the TDM exchange handles.
Among the present invention, when the input bit wide of described input store was 8, then its output bit wide was 8 to multiply by the number of frames of setting; The input bit wide of output storage is 8 to multiply by the number of frames of setting; The output bit wide is 8; The input and output bit wide of Switching Module all is 8 to multiply by the number of frames of setting.
As seen from the above technical solution provided by the invention, the present invention reaches processing bandwidth that increases Switching Module and the purpose that increases TDM exchange chip capacity by the bit wide of expansion input store and output storage.The bandwidth of input store and output storage is m of the prior art times among the present invention, and under the identical situation of device operating frequency, the TDM exchange chip capacity that adopts design of the present invention is m a times of prior art scheme.Therefore, the invention provides the method for designing of a kind of large capacity I DM exchange chip device and data processing thereof, it is big to have an exchange chip capacity, realize and control simple, cost is low, the advantage that reliability is high.
Description of drawings
Fig. 1 is the schematic diagram of prior art scheme;
Fig. 2 is the schematic diagram of technical solution of the present invention.
Embodiment
Core of the present invention is that the data bit width that writes of input store is 8, and the sense data bit wide is 8 * m; The data bit width that writes of output storage is 8 * m, and the sense data bit wide is 8; Input store and output storage are finished metadata cache and bit width conversion function simultaneously, and it is 8 * m that Switching Module is handled bit wide, thus make the capacity of TDM exchange chip be the prior art scheme m doubly.
The embodiment of device of the present invention as shown in Figure 2, the structure of described large capacity I DM exchange chip device comprises: serial/parallel transducer, parallel/serial transducer, input store, output storage, Switching Module and swap table memory;
Below in conjunction with data input, output processing procedure the annexation of each intermodule that described device comprises is described further:
Described device receives tdm data, at first handles through serial/parallel transducer, will be cached in the input store through the input tdm data after the serial/parallel conversion process of serial/parallel transducer afterwards;
In input store, after the data of the frame that is filled with setting, by Switching Module the data of storing in each input store are written in the output storage again, the frame of described setting can be two or more;
In output storage, storing the data that Switching Module writes, the tdm data signal that obtains exporting after the parallel/serial conversion process of the sense data parallel/serial transducer of process of output storage.
Need to prove, among the present invention, suppose that the quantity at the data cached frame that sets of input store is m, m is more than or equal to 2, and the input bit wide of described input store is 8, then:
The output bit wide of described input store is 8 * m;
The input bit wide of described output storage is 8 * m, and the output bit wide is 8;
The input and output bit wide of described Switching Module all is 8 * m.
Therefore, the present invention can expand the bit wide of Switching Module by the quantity that changes the frame of setting, and then reaches the purpose that increases the Switching Module bandwidth and increase TDM exchange chip capacity.Among the present invention the bandwidth of Switching Module be Switching Module bandwidth in the prior art m doubly, under the identical situation of device operating frequency, the TDM exchange chip capacity that adopts design of the present invention also be m a times of prior art scheme.
In the existing scheme, input store is filled with 1 frame and just exchanges, and Switching Module need be finished a TDM exchange to all speech channels in the time of a frame; And adopt design of the present invention, because input store need be filled with the m frame and just exchange,, Switching Module gets final product so only need finishing a TDM exchange to all speech channels in the time of m frame.Concrete TDM exchange processing mode is then same as the prior art.
As seen, the invention provides the method for designing of a kind of large capacity I DM exchange chip device and data processing thereof, it is big to have an exchange chip capacity, realize and control simple, cost is low, the advantage that reliability is high.
The above; only for the preferable embodiment of the present invention, but protection scope of the present invention is not limited thereto, and anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claims.

Claims (4)

1, a kind of data processing method of mass TDMA complex switching chip is characterized in that, comprising:
Each road time division multiplexing tdm data of A, input writes each self-corresponding input store respectively after each serial/parallel transducer conversion;
B, the described tdm data of each input store buffer memory reach the frame number of setting up to data;
C, when the input store data in buffer reaches the frame of setting, Switching Module sense data and carry out corresponding TDM exchange and handle from input store;
Data after E, process TDM exchange are handled are exported after output storage and parallel/serial transducer conversion process successively.
2, the data processing method of mass TDMA complex switching chip according to claim 1 is characterized in that, the quantity of the frame of described setting is:
More than or equal to 2 frames.
3, the data processing method of mass TDMA complex switching chip according to claim 1 and 2 is characterized in that, described step C comprises:
Configuration data from the input store sense data of Switching Module by reading the swap table memory, and be written to appropriate address in the output storage realizes that the TDM exchange handles.
4, the data processing method of mass TDMA complex switching chip according to claim 1 and 2 is characterized in that, when the input bit wide of described input store was 8, then its output bit wide was 8 to multiply by the number of frames of setting; The input bit wide of output storage is 8 to multiply by the number of frames of setting; The output bit wide is 8; The input and output bit wide of Switching Module all is 8 to multiply by the number of frames of setting.
CN2005100661471A 2005-04-21 2005-04-21 Mass TDMA complex switching chip data processing method Active CN1855783B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101958143A (en) * 2009-07-16 2011-01-26 北京中电华大电子设计有限责任公司 Method and structure for eliminating coupling crosstalk among bit lines of read-only memory
CN102006199A (en) * 2009-08-28 2011-04-06 中兴通讯股份有限公司 Time division multiplexing (TDM) switching module testing device, method and system
CN105955901A (en) * 2016-04-15 2016-09-21 中国电子科技集团公司第五十四研究所 Enhancement-type large-capacity high-speed data exchange design method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2285524B (en) * 1994-01-11 1998-02-04 Advanced Risc Mach Ltd Data memory and processor bus
JP4594930B2 (en) * 2003-06-03 2010-12-08 スターレント・ネットワークス・エルエルシー System and method for reformatting data

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101958143A (en) * 2009-07-16 2011-01-26 北京中电华大电子设计有限责任公司 Method and structure for eliminating coupling crosstalk among bit lines of read-only memory
CN101958143B (en) * 2009-07-16 2015-11-25 北京中电华大电子设计有限责任公司 A kind of method and structure eliminating ROM (read-only memory) coupling crosstalk among bit lines
CN102006199A (en) * 2009-08-28 2011-04-06 中兴通讯股份有限公司 Time division multiplexing (TDM) switching module testing device, method and system
CN102006199B (en) * 2009-08-28 2013-09-11 中兴通讯股份有限公司 Time division multiplexing (TDM) switching module testing device, method and system
CN105955901A (en) * 2016-04-15 2016-09-21 中国电子科技集团公司第五十四研究所 Enhancement-type large-capacity high-speed data exchange design method
CN105955901B (en) * 2016-04-15 2019-05-31 中国电子科技集团公司第五十四研究所 A kind of design method of enhanced high-capacity and high-speed data exchange

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