CN1734755B - 用于源安装封装的可焊接的顶部金属化和钝化 - Google Patents

用于源安装封装的可焊接的顶部金属化和钝化 Download PDF

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CN1734755B
CN1734755B CN2005100537690A CN200510053769A CN1734755B CN 1734755 B CN1734755 B CN 1734755B CN 2005100537690 A CN2005100537690 A CN 2005100537690A CN 200510053769 A CN200510053769 A CN 200510053769A CN 1734755 B CN1734755 B CN 1734755B
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semiconductor device
passivation layer
solder contacts
silver
interval
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CN1734755A (zh
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M·施坦丁
A·索勒
M·P·埃尔温
D·P·琼斯
M·卡罗尔
I·G·瓦格斯塔夫
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Infineon science and technology Americas
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International Rectifier Corp USA
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Abstract

一个位于半导体芯片上的含银可焊接触点具有其与一环氧钝化层的面对面边缘间隔开的外边缘，因此，在焊接之后，没有银离子存在，且不会自由迁移到所述环氧层之下而形成枝状结晶。

Description

用于源安装封装的可焊接的顶部金属化和钝化
相关申请 
本申请要求于2004年3月11日提交的美国临时申请第60/552，139号的优先权。 
技术领域
本发明涉及半导体器件及其制造工艺，特别是涉及一种新颖的用于半导体芯片的可焊接触点结构。 
背景技术
用于半导体器件的可焊接触点是众所周知的。这样的触点结构通常是沉积在铝芯片电极上的含有银的合金，其通过一层搭接在触点区域边缘的绝缘钝化覆盖膜来与其它表面相绝缘。 
人们已经发现，来自顶部金属层的银离子会迁移到钝化层之下，并且形成位于暴露在电场和湿气中的延长暴露区之下的枝状结晶。因此，随着时间推移，枝状结晶将在器件电极和器件终端之间形成导电桥，因此降低了器件的可靠性。 
由此期望提供一种钝化的顶部含银可焊接触点，在其中阻止了银从器件电极和在钝化层之下的迁移。 
发明内容
根据本发明，含银可焊接金属层在其外围被中断，并与一环氧钝化层的边缘间隔开，在环氧钝化层的边缘和可焊接金属层的面对面边缘之间形成一个间隔。在将器件粘结到一个电路板或其类似物的焊接期间，该粘结焊接剂(attach-solder)将溶解暴露的银，形成一焊接剂合金。这阻止了在其操作期间将电场加到该器件的过程中银离子从可焊接的电极迁移到终端。因此，减少了枝状结晶的形成，且提高了器件的可靠性。
本发明可以应用到其中需要可焊接触点的任意半导体器件，如在2003年9月23日公布的、发明名称为“CHIP SCALE SURFACE DEVICE ANDPROCESS OF MANUFACTURE”(IR-1830)的专利6,624,522中示出的国际整流器公司(International Rectifier)的Direct 器件，以及叨焊晶片；凸起的/晶片级封装等。 
附图说明
图1是一个在前述专利第6,624,522号中示出的类型的Direct 型封装的底视图。 
图2是图1的圆形圈出部分的横截面，示出了现有技术的钝化层和可焊接金属的搭接区域。 
图3是如图2的部分的横截面，但是示出了本发明中可焊接金属的边缘与环氧钝化膜的面对面边缘是间隔开的。 
具体实施方式
首先参照图1和图2，示出了Direct 
Figure S05153769020050317D00002083557QIETU
型封装10的底视图，其中一个MOSFET半导体芯片11被包含在一个金属盒12中，该金属盒具有一个如图所示的打开的底面和一个如图2与图3所示的顶部网膜13。网膜13连接到凸缘14和15上，该凸缘形成一个位于芯片11的底面上的漏电极16的触点。 
芯片11的顶面通过导电盒2的打开的底面而暴露出来，并且含有一个源电极，该源电极具有可焊接触点20与21和一个可焊接的栅极触点22。尽管由于容差变化会导致一个可达大约50微米的偏差(upset)，然而触点20、21和22通常与漏极触点14、15共面。因此，该器件在其触点14、15、20、21和22是可焊接到位于一个平电路板(未示出)上的各个相应触点区域上的。触点20、21和22彼此是相互绝缘的，并与通过一个绝缘钝化层30密封芯片11的顶面的传统终端相绝缘。 
应注意到，对本发明的解释应用到一个Direct 
Figure S05153769020050317D00002083617QIETU
型器件。然而，芯片11可以是具有一个可焊接触点的任何芯片，其通过一个环绕钝化覆盖膜而绝缘。
在图示的器件中，芯片10(此处示出的是硅，但其也可采用其它材料，例如SiC和GaN等)具有在图2中的横截面中示出的触点结构，其是穿过在图1中的圆35中示出的表面区域的截面。因此，可焊接触点21是含银可焊接金属的暴露区域，如厚度分别为1000埃、2000埃和6000埃的传统的钛/镍/银块，其沉积在MOSFET芯片11的铝源触点40的上面。可焊接触点21被由氮化物层42和环氧层41组成的绝缘钝化层30所包围。应注意到，触点21的边缘搭接氮化物层42，并被封装在环氧层41之下。因此，触点21的外凸缘区域43被捕获在环氧层41之下，并且在焊接操作中没有暴露给焊接剂。环氧层41可以由BCB、聚酰胺或聚硅氧烷钝化材料形成。 
在图2的结构中，并在焊接到触点21的暴露区域之后，自由银离子在操作中可从顶部金属21迁移到绝缘环氧层之下，且能在暴露到电场及湿气的延长暴露区之下形成枝状结晶。这些枝状结晶能形成接触到和伸向芯片终端的导电桥，因此影响了器件的可靠性。 
根据本发明，如图3所示，金属化层21的边缘被缩短以覆盖在氮化物层42上，但与环氧层41的面对面层间隔开，从而在其之间产生了间隔50。该间隔50优选包围图1中的触点21的外围。值得注意的是，触点21的外凸缘完全暴露给了焊接连接。可以布置，通常的共面钝化层和可焊接触点的偏差一直可达大约50微米，以完全暴露所述可焊接触点的表面。 
当图3中的器件通过焊接粘接到电路板上时，粘结焊接剂溶解暴露的含银触点21，以传统的方式形成一焊接剂合金。当采用任何传统焊接剂时这都发生。现在银完全都被捕获进了该合金中，而不能从器件电极中迁移出而形成枝状结晶并降低器件可靠性。应注意到，在现有技术的器件中，在焊接和剩余的银是形成不利的枝状结晶的迁移离子来源期间，在环氧层42下捕获的含银可焊接触点21不被到达。 
为了形成间隔50，与图2相比，氮化物50延伸了大约35微米；且该间隔50大约是10微米，其宽度也可为大约5微米到20微米，更通常地，该间隔的宽度至少是保证没有银被封装在环氧层41之下所需的宽度，且在焊接期间所有的银触点暴露给合金化过程。 
尽管采用特定实施例描述了本发明，然而对于本领域普通技术人 员来说，实现多种变化和改变及其它应用是显而易见的。因此本发明不应局限于在此公开的具体实施例。 

Claims (23)

1.一种半导体器件，包括：
用于半导体芯片的可焊接触点，所述可焊接触点包括一个设置在半导体芯片的表面之上的含银层；
一个形成在所述表面上且与所述可焊接触点共面的钝化层；
所述钝化层具有第一层和下面的第二层；
所述钝化层的所述第一层和所述可焊接触点具有由一个间隔隔开的面对面的边缘；
所述下面的第二层延伸跨越和在所述间隔之下，并由所述可焊接触点的所述边缘搭接；
该间隔的宽度是保证没有银被封装在所述钝化层的所述第一层之下所需的宽度，且在焊接期间所有的银触点暴露给合金化过程。
2.如权利要求1所述的半导体器件，其中所述下面的第二层是在下面的氮化物层。
3.如权利要求1所述的半导体器件，其中所述钝化层的所述第一层是一个环氧层。
4.如权利要求2所述的半导体器件，其中所述钝化层的所述第一层是一个环氧层。
5.如权利要求1所述的半导体器件，其中所述可焊接触点是一个钛、镍和银的合成层。
6.如权利要求2所述的半导体器件，其中所述可焊接触点是一个钛、镍和银的合成层。
7.如权利要求3所述的半导体器件，其中所述可焊接触点是一个钛、镍和银的合成层。
8.如权利要求4所述的半导体器件，其中所述可焊接触点是一个钛、镍和银的合成层。
9.如权利要求1所述的半导体器件，其中所述间隔的宽度为从5微米到20微米。
10.如权利要求2所述的半导体器件，其中所述间隔的宽度为从5微米到20微米。
11.如权利要求3所述的半导体器件，其中所述间隔的宽度为从5微米到20微米。
12.如权利要求5所述的半导体器件，其中所述间隔的宽度为从5微米到20微米。
13.如权利要求1所述的半导体器件，其中所述可焊接触点和所述钝化层的所述第一层是共面的，并且它们之间的偏差一直可达50微米，以完全暴露所述可焊接触点的表面。
14.如权利要求1所述的半导体器件，其中所述钝化层的所述第一层是一种从由环氧树脂、BCB、聚酞胺和聚硅氧烷组成的组中选出的材料。
15.如权利要求13所述的半导体器件，其中所述钝化层的所述第一层是一种从由环氧树脂、BCB、聚酞胺和聚硅氧烷组成的组中选出的材料。
16.一种半导体器件，包括：
硅芯片，所述硅芯片具有：一个顶面、一个终端区域和多个设置在所述顶面上并且与所述终端区域间隔开的可焊接触点；
位于所述顶面上的、包围并与所述可焊接触点共面的绝缘钝化层；
所述可焊接触点的表面为了焊接连接而被暴露；及一个设置在所述绝缘钝化层的第一层和每个所述可焊接触点的面对面边缘之间的间隔；
所述绝缘钝化层下面的第二层，延伸跨越和在所述间隔之下，并由每个所述可焊接触点的每个所述边缘搭接；
该间隔的宽度是保证没有银被封装在所述绝缘钝化层的第一层之下所需的宽度，且在焊接期间所有的银触点暴露给合金化过程。
17.如权利要求16所述的半导体器件，其中所述可焊接触点是含银的触点，且因此在焊接之后，所述可焊接触点的暴露区域完全转换为一个银合金，其阻止了在器件操作期间能穿过所述绝缘钝化层的下面到达所述终端区域的银离子的产生。
18.如权利要求16所述的半导体器件，其进一步包括一个位于所述绝缘钝化层和所述可焊接触点的边缘之下的氮化物层。
19.如权利要求18所述的半导体器件，其中所述间隔的宽度为从5微米到20微米。
20.如权利要求18所述的半导体器件，其中所述可焊接触点是堆叠的TiNiAg触点。
21.如权利要求19所述的半导体器件，其中所述可焊接触点是堆叠的TiNiAg触点。
22.一种用于防止银枝状结晶形成的工艺，所述银枝状结晶是由于银离子从一个位于半导体芯片上的含银可焊接电极迁移到一个位于所述半导体芯片上的钝化层而形成的；所述工艺包括在所述含银可焊接电极的边缘和所述钝化层的第一层的面对面边缘之间形成一个间隔；所述钝化层的下面的第二层延伸跨越和在所述间隔之下，并由所述含银可焊接触点的所述边缘搭接；因此在将所述含银可焊接电极焊接到一个支承期间，所述含银可焊接电极的几乎所有的银都转换成了一个焊接合金，从而降低了银离子的所述迁移到所述钝化层之下的可能性；该间隔的宽度是保证没有银被封装在所述钝化层的第一层之下所需的宽度，且在焊接期间所有的银触点暴露给合金化过程。
23.如权利要求22所述的工艺，其中所述间隔的宽度为从5微米到20微米。
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