CN1716836A - 读取致能产生器，读取致能信号产生方法，数据传输方法 - Google Patents

读取致能产生器，读取致能信号产生方法，数据传输方法 Download PDF

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Publication number
CN1716836A
CN1716836A CNA2005100810207A CN200510081020A CN1716836A CN 1716836 A CN1716836 A CN 1716836A CN A2005100810207 A CNA2005100810207 A CN A2005100810207A CN 200510081020 A CN200510081020 A CN 200510081020A CN 1716836 A CN1716836 A CN 1716836A
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mentioned
enable signal
signal
data
circuit
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CN100466504C (zh
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阿朗·沙多
沈强
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Apple Inc
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KY WIRE ELECTRIC CO Ltd
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Abstract

一种电子装置，包括第一电路，第二电路，以及第三电路。第一电路根据读取致能信号读取数据信号。第二电路根据信息位种类和预先决定的压缩样式产生上述读取致能信号。第三电路当上述读取致能信号为第一状态时，传递上述数据信号，以及当上述读取致能信号为第二状态时，传递一默认值。

Description

读取致能产生器，读取致能信号产生方法，数据传输方法
技术领域
本发明涉及一种数据传输的方法或架构，特别是涉及涡轮码(turbo)译码器解交错符号存储器(deinterleaved symbol memory)的读取致能(readenable)产生器。
背景技术
数据传输系统通常包括错误校正码(error correction code)部分和交错器(interleaver)部分。接收器通常包括解交错器(deinterleaver)和译码器，解交错操作在译码的前执行。大致说来，解交错用一种顺序写进整个数据区块(block)进入存储器(memory)，并用另一种顺序读出。数据区块读取通常会提供给译码器。涡轮码为一种错误校正码。涡轮码由两种或以上的组件替代码(component constituent code)组成。
现有接收器由解交错存储器依序读取一些编码符号(coded symbols)，进行解交错处理。无论正在译码何种替代码，这种存储器都包含提供到涡轮码译码器的上述编码符号。
由解交错符号存储器读取所有的符号，而不管正在解碼何种替代码，将会在解每个数据帧(frame)时消耗更多电力。因为由解交错符号存储器读取符号时会消耗电力，如果读取了目前替代码解码上所不需要的某些符号时，电力就被浪费了。当上述存储器在反复译码被读取多次时，这种电力消耗的缺点就会更加严重。尤其是使用更大的存储器时，电力损耗将会和数据传输率同时增加。
因此需要建构一种方法或装置，用以选择性处理特定替代码，以减低电力损耗。
发明内容
有鉴于此，本发明提出一种电子装置，包括第一电路，第二电路，以及第三电路。第一电路根据读取致能信号读取数据信号。第二电路根据信息位种类和预先决定的压缩样式产生上述读取致能信号。第三电路当上述读取致能信号为第一状态时，传递上述数据信号，以及当上述读取致能信号为第二状态时，传递一默认值。
本发明的特点在于(i)只根据被译码的特定替代码，由存储器读取编码符号，(ii)和现有方式相较，更节省电力，(iii)减少多余的读取操作，(iv)在译码操作时，节省很多读取操作，和(v)减少芯片的功率消耗。
附图说明
图1是本发明实施例的系统10的示意图。
图2是本发明实施例的接收器16细部结构的示意图。
图3是本发明实施例的图2中读取致能产生器细部结构的示意图。
图4是本发明实施例的图1中接收器涡轮码译码器的细部结构的示意图。
图5是本发明实施例的图1中传送器涡轮码编码器的细部结构的示意图。
附图符号说明
10-系统；12-传送器；14-传送媒介；16-接收器；20-涡轮码译码器；22-区块交错器；24-调制器；26-信息位；28-编码位；30-交错位；32-传输符号；34-接收符号；；36-交错符号；38-输出；90-解调器；92-解交错器；102-存储器地址和读取致能产生器区块；104-符号存储器；106-涡轮码译码器；108-涡轮码译码器接口；110-逻辑门；112-读取致能产生器；114-存储器地址产生器；120-地址产生器；122-查询表；124-并列到串行电路；130-modulo R-1计数器；132-多任务器；140-符号计数器；304-替代码译码器；306-交错器；308-替代码译码器；310-解交错器；312-决定电路；314-控制器；316-交错器；318-加法器；320a～n-编码符号输出；324a～n-编码符号输出；326a～n-编码符号输出；402-涡轮码解交错器；404-替代码编码器；406-替代码编码器；408-符号压缩和重复电路。
具体实施方式
本发明实施例可和涡轮码译码器一起使用，该涡轮码译码器由存储器中读取符号，用以译码信息位(information bit)。读取致能产生器可以只将某些需要读取的符号，置于致能(enable)状态。例如，译码器可以有两个译码状态，一个用于解替代码1(CC1，Constituent Code 1)，另一个用于解替代码2(CC2，Constituent Code 2)。译码器在预先定义的循环内，相互交替于此两种状态之间。对于每个信息位，编码符号由涡轮码译码器利用CC1的编码器，或CC2的编码器产生。当解替代码CC1时，只需要由CC1的编码器产生的编码符号。同样的，当解替代码CC2时，只需要由CC2的编码器产生的编码符号。当解涡轮码时，只由存储器读取特定状态所需要的符号，以减低由存储器的读取操作次数，以此节省电力。本发明可用来实现一种译码程序或压缩样式(puncture pattern)，用以产生高电力效率的读取致能脉冲顺序(read enable strobe sequence)。
图1是本发明实施例的系统10的示意图。系统10通常包括传送器(transmitter)12，传送媒介(transmission media)14，和接收器16。传送器12可由外部来源(未图标)接收输入信号(例如，信息位26)，并且传送讯号(传送符号32)至该传送媒介14。信号信息位26可以是压缩的声音，数据，或其它信息。接收器16可以接收信号(例如，接收符号34)，并且传送信号(例如，输出38)。在某些例子中，该传递媒介14可以是基站(cellu1artowers)间的空间、移动电话和基站间的空间、在基站和卫星间的空间、等等。然而，其它传播媒介例如，光纤、铜线、等等，可以用来实现特定设计的条件。在某些例子中，传送器12内部的交错位(interleaved bit)，信号传送符号32和信号接收符号34可以为符合码分多址(code divisionmultiple access，CDMA)的符号和位。传送器12通常包括涡轮码译码器20，区块交错器22和调制器(modulator)24。涡轮码译码器20产生编码位28的信号。区块交错器22执行交错处理和产生信号交错位。区块调制器24产生适于传输媒介中传送的传送符号32。该接收器16通常包括解调器(demodulator)90，解交错器92和涡轮码译码器106。该解交错器92通常包括存储器地址和读取致能产生器区块或电路102，和符号存储器104。电路102可用于减低该接收器16的电力消耗。在某些例子中，符号存储器104可由解交错符号存储器实现。
参照图2，图2为接收器16细部结构的示意图。该接收器16通常包括存储器地址和读取致能产生器102，符号存储器104，涡轮码译码器106，涡轮码译码器接口108和逻辑门110。接口108可由涡轮码译码器的接口实现。在某些例子中，逻辑门110可由一个AND逻辑门构成。然而，其它逻辑门或逻辑门组合也可用以实现特殊架构的设计条件。
该存储器地址和读取致能产生器区块102通常包括读取致能产生器区块或电路112，和存储器地址产生器区块或电路114。读取致能产生器区块112可传送读取致能信号(例如，TD_RE)到符号存储器104的存储器致能输入(例如，ME)。信号TD_RE也可传送到逻辑门110的输入。存储器地址产生器区块114传送地址信号(例如，ADR)到符号存储器104的地址输入(例如，ADR)。符号存储器104也可由图1中，解调制器90，接收该交错位的数据输入(例如，DI)，和通常传送到逻辑门110输入的数据输出(例如，DO)。逻辑门110传送数据信号(例如，TD_DATA)到该涡轮码译码器接口108。该数据信号TD_DATA通常传送由符号存储器104接收的涡轮码数据。该涡轮码译码器接口108通常传送许多符号(例如，X，Y0，Y1，Y’0和Y’1)到涡轮码译码器106。涡轮码译码器106传送该信号输出38以反应一或多的X，Y0，Y1，Y’0和Y’1符号。
参照图3，图3为读取致能产生器112细部结构的示意图。读取致能产生器112通常包括区块或电路120，区块或电路122，和区块或电路124。该电路120可由地址产生器(address generator)实现。该电路122可由查询表(lookup table)实现。电路124可由并列到串行转换电路实现。该电路124通常包括区块或电路130和区块或电路132。该电路130可由计数器电路实现，就像modulo R-1计数器，其中1/R为编码率。该电路132可由多任务器电路实现。
由于每次只需要给一个特定替代码的编码符号，所以只有这些编码符号由符号存储器104被读取。没用的编码符号可以用‘0’替换。读取致能产生器112，根据正在由涡轮码译码器106译码的特定替代码的该压缩样式，于读取致能信号TD_RE上提供选通(strobe)到符号存储器104。大致说来，只有涡轮码译码器106需要的符号会被读取。对于CDMA2000涡轮码，不同的压缩样式可由偶数和奇数信息位来实现。
以下表格1显示偶数和奇数数据位的查询表，以几个编码率为例：
表格1
  编码率1/2   编码率1/3   编码率1/4
偶数数据信息位     XY0     XY0Y’0     XY0Y1Y’1
奇数数据信息位     XY’0     XY0Y’0     XY0Y’0Y’1
该信号X，Y0，和Y1代表1/3编码率中用于CC1的编码符号。该信号X’，Y’0，和Y’1代表1/3编码率中用于CC2的编码符号，其与CDMA2000标准指定相同，此处列出以供参考。该X’为符号X的交错版本，且通常不被传送。
当译码CC1时，只需要编码符号X，Y0，和Y1。如果该压缩样式包括上述编码符号Y’0，和Y’1，这些符号会被既定样式替换。该既定样式可全部为0，全部为1，或任意其它合适的”忽略”(don't care)状态。类似地，当译码CC2时，只需要编码符号X’，Y’0，和Y’1。该X’由涡轮码译码器106中的交错器316以在CC1编码时递送的符号X产生。因此，该符号X’通常不需要由符号存储器104读出。如果该压缩样式包括上述编码符号X，Y0，和Y1，这些符号会被既定样式替换。
对于每个信息位，R译码符号产生且储存在解交错符号存储器104。查询表122中的压缩样式通常每个有R位。‘1’通常表示这个特定符号是需要的。因此存储器104的读取操作为需要的。‘0’通常表示这个特定符号不被需要。因此不需要存储器104的读取操作，由0(或其它先前决定的样式)代替提供。
以下表格2显示以几个以上列出的编码率为例的查询表：
表格2
 编码率1/2   编码率1/3  编码率1/4
   CC1  偶数数据信息位      11     110     1110
 奇数数据信息位      10     110     1100
   CC2  偶数数据信息位      00     001     0001
 奇数数据信息位      01     001     0011
除了数据位，传送器12的编码器产生6*R的尾端位(tail bits)(1/R为该编码率)。在译码CC1和CC2的每个循环中，所有该尾端位的编码符号应该由符号存储器104读出。查询表122内的上述压缩样式可由根据编码率的’1’字符串实现。
以下表格3显示尾端信息位查询表，以几个以上列出的编码率为例子：
表格3
   编码率1/2    编码率1/3    编码率1/4
 尾端信息位       11       111      1111
对于每个信息位，读取致能产生器112根据(i)解码率，(ii)被解码的替代码，以及(iii)被译码的信息位(例如，奇数或奇数，数据或尾端)使用特定的压缩样式。读取致能产生器112顺序通过这些位。如果目前的位为‘1’，就会由存储器104产生一个读取致能讯号TD_RE的选通。如果目前的位为‘0’，读取致能讯号TD_RE为不操作状态(inactive)，且不由存储器104读取符号，由0(或其它先前决定的样式)代替提供。不同状态(例如，‘0’由存储器104读取，或‘1’由先前决定样式表示)可用以实现特定架构的设计条件。
查询表122包括许多CC1和CC2的压缩样式。查询表122可包括针对偶数和奇数数据的信息位和尾端位的压缩样式。查询表122的输出可传送到并列到串行电路124。多任务器132和modulo R-1计数器130(例如，由0计数至R-1)可用以选择特定位(例如，D[0]-D[R-1])。该特定位是在多任务器132的输入端所接收的压缩样式得知。然而，其它构造也可用于达成特定架构的设计条件。当该并行对串行电路124的输出为‘1’时，读取致能讯号TD_RE为有效的，且符号由存储器104读取以供给涡轮码译码器106。当输出为‘0’，读取致能讯号TD_RE便不动，且没有由存储器104的读取操作。当该读取致能信号为不操作状态时，送至涡轮码译码器106的数据为“忽略”，也可为0。不同状况(例如，‘0’由存储器读取或‘1’由先前决定样式表示)可用以实现特定架构的设计条件。
地址产生器120通常根据被译码的替代码和被译码的信息位调整，产生地址给查询表122例如，偶数或奇数，数据或尾端。地址产生器120也可用信号END_OF_FRAME于CC1和CC2间转换。也可使用其它不在此显示的控制信号，例如，重置(reset)，使致能(enable)等等。
既然涡轮码译码使用一些读取符号框的循环，并且解开CC1或CC2，在整个解码操作中可节省很多读取操作。使用本发明的芯片，其整体电力消耗将会减低。
参考图4，图4为使用两个1/3替代码的涡轮码译码器106的示意图。译码器106通常包括区块或电路304，区块或电路306，区块或电路308，区块或电路310，区块或电路312，区块或电路314，和区块或电路316。该电路304可由替代码译码器构成。电路306和316可由交错电路实现。电路308可由替代码译码器实现。电路310可由解交错电路实现。该电路312可由决定或选择电路实现。电路108有一组表示编码符号例如，X，Y0，Y1，Y’0，Y’1的输出320a-320n。该编码符号X，Y0和Y1可由一组上述电路304的输入324a-324n表示。该编码符号Y’0，Y’1和交错符号X’(上述交错器316输出)可由一组上述电路308的输入326a-326n表示。涡轮码译码器106在特定期间可以选择性和重复性地读取解交错符号。涡轮码译码器106有两个译码状态，用该译码器304解CC1，和用该译码器308解CC2。上述译码器106以先前定义的循环次数在两个状态的一中交替。
对于每个信息位，该编码符号使用上述译码器304或上述译码器308译码。当解CC1时，只需要为CC1产生的编码符号。同样的，当解CC2时，只需要为CC2产生的编码符号。译码器106由解交错符号存储器104读取符号，选择性的使用由特定替代码产生的该编码符号，完成整个帧的译码。译码器106然后再次重新开始，且由解交错符号存储器104读取器其它替代码产生的符号，完成整个框的译码。整个过程以特定循环数目重复，直到译码器106达到满意的收敛。逻辑312可用在译码最后，由该CC1译码器304和该CC2译码器308输出软性值(soft value)，以监测该软性值的正负号(sign)，例如该加法器318的输出，得到信息位。当软性值为正，译码信息位可为‘0’。当软性值为负，译码信息位可为‘1’。控制器314可传送用于该存储器地址产生器114的重置信号和致能信号。
参照图5，图5为本发明实施例中涡轮码编码器20的方块图。在某些例子中，储存于符号存储器的符号可以用涡轮码编码器20产生。涡轮码编码器20通常包括区块或电路402，区块或电路404，区块或电路406，和区块或电路402。电路404可由涡轮码交错器实现。电路406可由替代码编码器实现。电路408可由符号压缩和重复电路实现。电路402和电路404可接收由并行或串行串接式回旋码(concatenated convolutional code)格式信息位，有时称为涡轮码。整体编码率1/R可由正确的两个替代码编码器404和406的压缩和重复输出实现。
在某些例子中，本发明可被用于产生CDMA2002移动通讯系统涡轮码。然而，本发明可广义的使用于其它编码标准。
本发明许多信号通常为“开”，例如，数字高，或1，或“关”，例如，数字低，或0。然而，此种信号依照达成特定构成的设计条件，可特别调整极性(例如，反向)为“打开”(例如，置入)和“关闭”(例如，反置入(de-assert))状态。在加上反向器可加入以改变特定信号极性。
虽然于此本发明以较佳实施例作了描述，但应了解的是在不偏离本发明的精神和范围的前提下，本领域的技术人员可对本发明作若干不同形式的改变和修改。

Claims (14)

1.一种电子装置，包括：
第一电路，根据读取致能信号读取数据信号；
第二电路，根据信息位种类和预先决定的压缩样式产生上述读取致能信号；以及
第三电路，当上述读取致能信号为第一状态时，传递上述数据信号，以及当上述读取致能信号为第二状态时，传递一默认值。
2.如权利要求1所述的电子装置，其中上述第一电路包括符号存储器。
3.如权利要求1所述的电子装置，其中上述第二电路包括读取致能产生器，且还根据上述数据的速率产生上述读取致能信号。
4.如权利要求1所述的电子装置，其中上述第三电路包括逻辑门。
5.如权利要求1所述的电子装置，其中上述数据信号包括一个序列的编码位。
6.如权利要求3所述的电子装置，其中上述读取致能产生器包括储存多个压缩样式的查询表。
7.如权利要求6所述的电子装置，其中上述查询表包括对应上述数据信号的许多位的压缩样式。
8.如权利要求7所述的电子装置，其中上述许多位包括偶数数据信息位，奇数数据信息位和尾端位。
9.如权利要求8所述的电子装置，其中上述读取致能产生器还包括，根据被译码的替代码，产生地址给上述查询表的地址产生器。
10.如权利要求1所述的电子装置，其中上述读取致能信号的上述第一和第二状态根据第一替代码和第二替代码产生。
11.一种电子装置，包括：
根据读取致能信号读取数据信号的组件；
根据信息位种类和预先决定的压缩样式，产生上述读取致能信号的组件；以及
当上述读取致能信号为第一状态时，传递上述数据信号，以及当上述读取致能信号为第二状态时，传递一默认值的组件。
12.一种产生涡轮码译码器读取致能信号的方法，包括下列步骤：
(A)根据读取致能信号读取数据信号；
(B)根据信息位种类和预先决定的压缩样式产生上述读取致能信号；以及
(C)当上述读取致能信号为第一状态时，传送上述数据信号，以及当上述读取致能信号为第二状态时，传送一默认值。
13.一种数据传输的方法，包括下列步骤：
(A)产生读取致能信号；
(B)根据上述读取致能信号读取数据信号；以及
(C)当上述读取致能信号为第一状态时，传递上述数据信号，以及当上述读取致能信号为第二状态时，传递一默认值。
14.如权利要求13所述的数据传输的方法，其中上述读取致能信号，由根据信息位种类和预先决定的压缩样式产生。
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